| 99032c45 |
1 | #------------------------------------------------------------------------------\r |
| 2 | #*\r |
| 3 | #* Copyright 2006, Intel Corporation \r |
| 4 | #* All rights reserved. This program and the accompanying materials \r |
| 5 | #* are licensed and made available under the terms and conditions of the BSD License \r |
| 6 | #* which accompanies this distribution. The full text of the license may be found at \r |
| 7 | #* http://opensource.org/licenses/bsd-license.php \r |
| 8 | #* \r |
| 9 | #* THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r |
| 10 | #* WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r |
| 11 | #* \r |
| 12 | #* CpuInterrupt.S\r |
| 13 | #* \r |
| 14 | #* Abstract:\r |
| 15 | #*\r |
| 16 | #------------------------------------------------------------------------------\r |
| 17 | \r |
| 18 | #PUBLIC SystemTimerHandler\r |
| 19 | #PUBLIC SystemExceptionHandler\r |
| 20 | #EXTERNDEF mExceptionCodeSize:DWORD\r |
| 21 | \r |
| 22 | #EXTERN TimerHandler: NEAR\r |
| 23 | #EXTERN ExceptionHandler: NEAR\r |
| 24 | #EXTERN mTimerVector: DWORD\r |
| 25 | \r |
| 26 | .data\r |
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27 | ASM_GLOBAL ASM_PFX(mExceptionCodeSize)\r |
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28 | ASM_PFX(mExceptionCodeSize): .long 9\r |
| 29 | \r |
| 30 | .text\r |
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31 | ASM_GLOBAL ASM_PFX(InitDescriptor)\r |
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32 | \r |
| 33 | ASM_PFX(InitDescriptor):\r |
| 34 | movq $GDT_BASE,%rax # EAX=PHYSICAL address of gdt\r |
| 35 | movq %rax, gdtr + 2 # Put address of gdt into the gdtr\r |
| 36 | lgdt gdtr\r |
| 37 | movq $0x18, %rax\r |
| 38 | movq %rax, %gs\r |
| 39 | movq %rax, %fs\r |
| 40 | movq $IDT_BASE,%rax # EAX=PHYSICAL address of idt\r |
| 41 | movq %rax, idtr + 2 # Put address of idt into the idtr\r |
| 42 | lidt idtr\r |
| 43 | ret\r |
| 44 | \r |
| 45 | # VOID\r |
| 46 | # InstallInterruptHandler (\r |
| 47 | # UINTN Vector,\r |
| 48 | # VOID (*Handler)(VOID)\r |
| 49 | # )\r |
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50 | ASM_GLOBAL ASM_PFX(InstallInterruptHandler)\r |
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51 | ASM_PFX(InstallInterruptHandler):\r |
| 52 | # Vector:DWORD @ 4(%esp)\r |
| 53 | # Handler:DWORD @ 8(%esp)\r |
| 54 | push %rbx\r |
| 55 | pushfq # save eflags\r |
| 56 | cli # turn off interrupts\r |
| 57 | subq $0x10, %rsp # open some space on the stack\r |
| 58 | movq %rsp, %rbx\r |
| 59 | \r |
| 60 | sidt (%rbx) # get fword address of IDT\r |
| 61 | movq 2(%rbx), %rbx # move offset of IDT into RBX\r |
| 62 | addq $0x10, %rsp # correct stack\r |
| 63 | movq %rcx, %rax # Get vector number\r |
| 64 | shlq $4, %rax # multiply by 16 to get offset\r |
| 65 | addq %rax, %rbx # add to IDT base to get entry\r |
| 66 | movq %rdx, %rax # load new address into IDT entry\r |
| 67 | movw %ax, (%rbx) # write bits 15..0 of offset\r |
| 68 | shrq $16, %rax # use ax to copy 31..16 to descriptors\r |
| 69 | movw %ax, 6(%rbx) # write bits 31..16 of offset\r |
| 70 | shrq $16, %rax # use eax to copy 63..32 to descriptors\r |
| 71 | movl %eax, 8(%rbx) # write bits 63..32 of offset\r |
| 72 | popfq # restore flags (possible enabling interrupts)\r |
| 73 | pop %rbx\r |
| 74 | ret\r |
| 75 | \r |
| 76 | .macro JmpCommonIdtEntry\r |
| 77 | # jmp commonIdtEntry - this must be hand coded to keep the assembler from\r |
| 78 | # using a 8 bit reletive jump when the entries are\r |
| 79 | # within 255 bytes of the common entry. This must\r |
| 80 | # be done to maintain the consistency of the size\r |
| 81 | # of entry points...\r |
| 82 | .byte 0xe9 # jmp 16 bit reletive \r |
| 83 | .long commonIdtEntry - . - 4 # offset to jump to\r |
| 84 | .endm\r |
| 85 | \r |
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86 | .p2align 1\r |
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87 | ASM_GLOBAL ASM_PFX(SystemExceptionHandler)\r |
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88 | ASM_PFX(SystemExceptionHandler):\r |
| 89 | INT0:\r |
| 90 | push $0x0 # push error code place holder on the stack\r |
| 91 | push $0x0 \r |
| 92 | JmpCommonIdtEntry\r |
| 93 | # db 0e9h # jmp 16 bit reletive \r |
| 94 | # dd commonIdtEntry - $ - 4 # offset to jump to\r |
| 95 | \r |
| 96 | INT1:\r |
| 97 | push $0x0 # push error code place holder on the stack\r |
| 98 | push $0x1 \r |
| 99 | JmpCommonIdtEntry\r |
| 100 | \r |
| 101 | INT2:\r |
| 102 | push $0x0 # push error code place holder on the stack\r |
| 103 | push $0x2 \r |
| 104 | JmpCommonIdtEntry\r |
| 105 | \r |
| 106 | INT3:\r |
| 107 | push $0x0 # push error code place holder on the stack\r |
| 108 | push $0x3 \r |
| 109 | JmpCommonIdtEntry\r |
| 110 | \r |
| 111 | INT4:\r |
| 112 | push $0x0 # push error code place holder on the stack\r |
| 113 | push $0x4 \r |
| 114 | JmpCommonIdtEntry\r |
| 115 | \r |
| 116 | INT5:\r |
| 117 | push $0x0 # push error code place holder on the stack\r |
| 118 | push $0x5 \r |
| 119 | JmpCommonIdtEntry\r |
| 120 | \r |
| 121 | INT6:\r |
| 122 | push $0x0 # push error code place holder on the stack\r |
| 123 | push $0x6 \r |
| 124 | JmpCommonIdtEntry\r |
| 125 | \r |
| 126 | INT7:\r |
| 127 | push $0x0 # push error code place holder on the stack\r |
| 128 | push $0x7 \r |
| 129 | JmpCommonIdtEntry\r |
| 130 | \r |
| 131 | INT8:\r |
| 132 | # Double fault causes an error code to be pushed so no phony push necessary\r |
| 133 | nop\r |
| 134 | nop\r |
| 135 | push $0x8 \r |
| 136 | JmpCommonIdtEntry\r |
| 137 | \r |
| 138 | INT9:\r |
| 139 | push $0x0 # push error code place holder on the stack\r |
| 140 | push $0x9 \r |
| 141 | JmpCommonIdtEntry\r |
| 142 | \r |
| 143 | INT10:\r |
| 144 | # Invalid TSS causes an error code to be pushed so no phony push necessary\r |
| 145 | nop\r |
| 146 | nop\r |
| 147 | push $10\r |
| 148 | JmpCommonIdtEntry\r |
| 149 | \r |
| 150 | INT11:\r |
| 151 | # Segment Not Present causes an error code to be pushed so no phony push necessary\r |
| 152 | nop\r |
| 153 | nop\r |
| 154 | push $11\r |
| 155 | JmpCommonIdtEntry\r |
| 156 | \r |
| 157 | INT12:\r |
| 158 | # Stack fault causes an error code to be pushed so no phony push necessary\r |
| 159 | nop\r |
| 160 | nop\r |
| 161 | push $12\r |
| 162 | JmpCommonIdtEntry\r |
| 163 | \r |
| 164 | INT13:\r |
| 165 | # GP fault causes an error code to be pushed so no phony push necessary\r |
| 166 | nop\r |
| 167 | nop\r |
| 168 | push $13\r |
| 169 | JmpCommonIdtEntry\r |
| 170 | \r |
| 171 | INT14:\r |
| 172 | # Page fault causes an error code to be pushed so no phony push necessary\r |
| 173 | nop\r |
| 174 | nop\r |
| 175 | push $14\r |
| 176 | JmpCommonIdtEntry\r |
| 177 | \r |
| 178 | INT15:\r |
| 179 | push $0x0 # push error code place holder on the stack\r |
| 180 | push $15\r |
| 181 | JmpCommonIdtEntry\r |
| 182 | \r |
| 183 | INT16:\r |
| 184 | push $0x0 # push error code place holder on the stack\r |
| 185 | push $16\r |
| 186 | JmpCommonIdtEntry\r |
| 187 | \r |
| 188 | INT17:\r |
| 189 | # Alignment check causes an error code to be pushed so no phony push necessary\r |
| 190 | nop\r |
| 191 | nop\r |
| 192 | push $17\r |
| 193 | JmpCommonIdtEntry\r |
| 194 | \r |
| 195 | INT18:\r |
| 196 | push $0x0 # push error code place holder on the stack\r |
| 197 | push $18\r |
| 198 | JmpCommonIdtEntry\r |
| 199 | \r |
| 200 | INT19:\r |
| 201 | push $0x0 # push error code place holder on the stack\r |
| 202 | push $19\r |
| 203 | JmpCommonIdtEntry\r |
| 204 | \r |
| 205 | INTUnknown:\r |
| 206 | .rept (32 - 20)\r |
| 207 | push $0x0 # push error code place holder on the stack\r |
| 208 | # push xxh # push vector number\r |
| 209 | .byte 0x6a\r |
| 210 | .byte ( . - INTUnknown - 3 ) / 9 + 20 # vector number\r |
| 211 | JmpCommonIdtEntry\r |
| 212 | .endr\r |
| 213 | \r |
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214 | ASM_GLOBAL ASM_PFX(SystemTimerHandler)\r |
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215 | ASM_PFX(SystemTimerHandler):\r |
| 216 | push $0\r |
| 217 | push $ASM_PFX(mTimerVector)\r |
| 218 | JmpCommonIdtEntry\r |
| 219 | \r |
| 220 | commonIdtEntry:\r |
| 221 | # +---------------------+\r |
| 222 | # + EFlags +\r |
| 223 | # +---------------------+\r |
| 224 | # + CS +\r |
| 225 | # +---------------------+\r |
| 226 | # + EIP +\r |
| 227 | # +---------------------+\r |
| 228 | # + Error Code +\r |
| 229 | # +---------------------+\r |
| 230 | # + Vector Number +\r |
| 231 | # +---------------------+\r |
| 232 | # + EBP +\r |
| 233 | # +---------------------+ <-- EBP\r |
| 234 | \r |
| 235 | cli\r |
| 236 | push %rbp\r |
| 237 | movq %rsp,%rbp\r |
| 238 | \r |
| 239 | #\r |
| 240 | # Since here the stack pointer is 16-byte aligned, so\r |
| 241 | # EFI_FX_SAVE_STATE_X64 of EFI_SYSTEM_CONTEXT_x64\r |
| 242 | # is 16-byte aligned\r |
| 243 | # \r |
| 244 | \r |
| 245 | ## UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax#\r |
| 246 | ## UINT64 R8, R9, R10, R11, R12, R13, R14, R15#\r |
| 247 | push %r15\r |
| 248 | push %r14\r |
| 249 | push %r13\r |
| 250 | push %r12\r |
| 251 | push %r11\r |
| 252 | push %r10\r |
| 253 | push %r9\r |
| 254 | push %r8\r |
| 255 | push %rax\r |
| 256 | push %rcx\r |
| 257 | push %rdx\r |
| 258 | push %rbx\r |
| 259 | push 6*8(%rbp)\r |
| 260 | push (%rbp)\r |
| 261 | push %rsi\r |
| 262 | push %rdi\r |
| 263 | \r |
| 264 | ## UINT64 Gs, Fs, Es, Ds, Cs, Ss# insure high 16 bits of each is zero\r |
| 265 | movzx 7*8(%rbp), %rax\r |
| 266 | push %rax # for ss\r |
| 267 | movzx 4*8(%rbp), %rax\r |
| 268 | push %rax # for cs\r |
| 269 | movq %ds, %rax\r |
| 270 | push %rax\r |
| 271 | movq %es, %rax\r |
| 272 | push %rax\r |
| 273 | movq %fs, %rax\r |
| 274 | push %rax\r |
| 275 | movq %gs, %rax\r |
| 276 | push %rax\r |
| 277 | \r |
| 278 | ## UINT64 Rip#\r |
| 279 | push 3*8(%rbp)\r |
| 280 | \r |
| 281 | ## UINT64 Gdtr[2], Idtr[2]#\r |
| 282 | subq $16, %rsp\r |
| 283 | sidt (%rsp)\r |
| 284 | subq $16, %rsp\r |
| 285 | sgdt (%rsp)\r |
| 286 | \r |
| 287 | ## UINT64 Ldtr, Tr#\r |
| 288 | xorq %rax, %rax\r |
| 289 | str %ax\r |
| 290 | push %rax\r |
| 291 | sldt %ax\r |
| 292 | push %rax\r |
| 293 | \r |
| 294 | ## UINT64 RFlags#\r |
| 295 | push 5*8(%rbp)\r |
| 296 | \r |
| 297 | ## UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8#\r |
| 298 | movq %cr8, %rax\r |
| 299 | push %rax\r |
| 300 | movq %cr4, %rax\r |
| 301 | orq $0x208, %rax\r |
| 302 | movq %rax, %cr4\r |
| 303 | push %rax\r |
| 304 | movq %cr3, %rax\r |
| 305 | push %rax\r |
| 306 | movq %cr2, %rax\r |
| 307 | push %rax\r |
| 308 | xorq %rax, %rax\r |
| 309 | push %rax\r |
| 310 | movq %cr0, %rax\r |
| 311 | push %rax\r |
| 312 | \r |
| 313 | ## UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7#\r |
| 314 | movq %dr7, %rax\r |
| 315 | push %rax\r |
| 316 | \r |
| 317 | ## clear Dr7 while executing debugger itself\r |
| 318 | xorq %rax, %rax\r |
| 319 | movq %rax, %dr7\r |
| 320 | \r |
| 321 | movq %dr6, %rax\r |
| 322 | push %rax\r |
| 323 | \r |
| 324 | ## insure all status bits in dr6 are clear...\r |
| 325 | xorq %rax, %rax\r |
| 326 | movq %rax, %dr6\r |
| 327 | \r |
| 328 | movq %dr3, %rax\r |
| 329 | push %rax\r |
| 330 | movq %dr2, %rax\r |
| 331 | push %rax\r |
| 332 | movq %dr1, %rax\r |
| 333 | push %rax\r |
| 334 | movq %dr0, %rax\r |
| 335 | push %rax\r |
| 336 | \r |
| 337 | \r |
| 338 | ## FX_SAVE_STATE_X64 FxSaveState#\r |
| 339 | subq $512, %rsp\r |
| 340 | movq %rsp, %rdi\r |
| 341 | fxsave (%rdi)\r |
| 342 | \r |
| 343 | ## UINT64 ExceptionData#\r |
| 344 | push 2*8 (%rbp) \r |
| 345 | \r |
| 346 | ## call into exception handler\r |
| 347 | ## Prepare parameter and call\r |
| 348 | movq 1*8(%rbp), %rcx\r |
| 349 | movq %rsp, %rdx\r |
| 350 | #\r |
| 351 | # Per X64 calling convention, allocate maximum parameter stack space\r |
| 352 | # and make sure RSP is 16-byte aligned\r |
| 353 | #\r |
| 354 | subq $(4*8+8), %rsp\r |
| 355 | cmpq $32, %rcx\r |
| 356 | jb CallException\r |
| 357 | call ASM_PFX(TimerHandler)\r |
| 358 | jmp ExceptionDone\r |
| 359 | CallException:\r |
| 360 | call ASM_PFX(ExceptionHandler)\r |
| 361 | ExceptionDone:\r |
| 362 | addq $(4*8+8), %rsp\r |
| 363 | \r |
| 364 | cli\r |
| 365 | \r |
| 366 | ## UINT64 ExceptionData#\r |
| 367 | addq $8, %rsp\r |
| 368 | \r |
| 369 | ## FX_SAVE_STATE_X64 FxSaveState#\r |
| 370 | movq %rsp, %rsi\r |
| 371 | fxrstor (%esi)\r |
| 372 | addq $512, %rsp\r |
| 373 | \r |
| 374 | \r |
| 375 | ## UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7#\r |
| 376 | pop %rax\r |
| 377 | movq %rax, %dr0\r |
| 378 | pop %rax\r |
| 379 | movq %rax, %dr1\r |
| 380 | pop %rax\r |
| 381 | movq %rax, %dr2\r |
| 382 | pop %rax\r |
| 383 | movq %rax, %dr3\r |
| 384 | ## skip restore of dr6. We cleared dr6 during the context save.\r |
| 385 | addq $8, %rsp\r |
| 386 | pop %rax\r |
| 387 | movq %rax, %dr7\r |
| 388 | \r |
| 389 | ## UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8#\r |
| 390 | pop %rax\r |
| 391 | movq %rax, %cr0\r |
| 392 | addq $8, %rsp # not for Cr1\r |
| 393 | pop %rax\r |
| 394 | movq %rax, %cr2\r |
| 395 | pop %rax\r |
| 396 | movq %rax, %cr3\r |
| 397 | pop %rax\r |
| 398 | movq %rax, %cr4\r |
| 399 | pop %rax\r |
| 400 | mov %rax, %cr8\r |
| 401 | \r |
| 402 | ## UINT64 RFlags#\r |
| 403 | pop 5*8(%rbp) \r |
| 404 | \r |
| 405 | ## UINT64 Ldtr, Tr#\r |
| 406 | ## UINT64 Gdtr[2], Idtr[2]#\r |
| 407 | ## Best not let anyone mess with these particular registers...\r |
| 408 | addq $48, %rsp\r |
| 409 | \r |
| 410 | ## UINT64 Rip#\r |
| 411 | pop 3*8(%rbp)\r |
| 412 | \r |
| 413 | ## UINT64 Gs, Fs, Es, Ds, Cs, Ss#\r |
| 414 | pop %rax\r |
| 415 | # mov gs, rax # not for gs\r |
| 416 | pop %rax\r |
| 417 | # mov fs, rax # not for fs\r |
| 418 | # (X64 will not use fs and gs, so we do not restore it)\r |
| 419 | pop %rax\r |
| 420 | movq %rax, %es\r |
| 421 | pop %rax\r |
| 422 | movq %rax, %ds\r |
| 423 | pop 4*8(%rbp) # for cs\r |
| 424 | pop 7*8(%rbp) # for ss\r |
| 425 | \r |
| 426 | ## UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax#\r |
| 427 | ## UINT64 R8, R9, R10, R11, R12, R13, R14, R15#\r |
| 428 | pop %rdi\r |
| 429 | pop %rsi\r |
| 430 | addq $8, %rsp # not for rbp\r |
| 431 | pop 6*8(%rbp) # for rsp\r |
| 432 | pop %rbx\r |
| 433 | pop %rdx\r |
| 434 | pop %rcx\r |
| 435 | pop %rax\r |
| 436 | pop %r8\r |
| 437 | pop %r9\r |
| 438 | pop %r10\r |
| 439 | pop %r11\r |
| 440 | pop %r12\r |
| 441 | pop %r13\r |
| 442 | pop %r14\r |
| 443 | pop %r15\r |
| 444 | \r |
| 445 | movq %rbp, %rsp\r |
| 446 | pop %rbp\r |
| 447 | addq $16, %rsp\r |
| 448 | iretq\r |
| 449 | \r |
| 450 | \r |
| 451 | ##############################################################################\r |
| 452 | # data\r |
| 453 | ##############################################################################\r |
| 454 | \r |
| 455 | .data\r |
| 9811c392 |
456 | .p2align 4\r |
| 99032c45 |
457 | \r |
| 458 | gdtr: .short GDT_END - GDT_BASE - 1 # GDT limit\r |
| 459 | .quad 0 # (GDT base gets set above)\r |
| 460 | ##############################################################################\r |
| 461 | # global descriptor table (GDT)\r |
| 462 | ##############################################################################\r |
| 463 | \r |
| 9811c392 |
464 | .p2align 4\r |
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465 | \r |
| 466 | GDT_BASE:\r |
| 467 | # null descriptor\r |
| 468 | NULL_SEL = .-GDT_BASE\r |
| 469 | .short 0 # limit 15:0\r |
| 470 | .short 0 # base 15:0\r |
| 471 | .byte 0 # base 23:16\r |
| 472 | .byte 0 # type\r |
| 473 | .byte 0 # limit 19:16, flags\r |
| 474 | .byte 0 # base 31:24\r |
| 475 | \r |
| 476 | # linear data segment descriptor\r |
| 477 | LINEAR_SEL = .-GDT_BASE\r |
| 478 | .short 0x0FFFF # limit 0xFFFFF\r |
| 479 | .short 0 # base 0\r |
| 480 | .byte 0\r |
| 481 | .byte 0x092 # present, ring 0, data, expand-up, writable\r |
| 482 | .byte 0x0CF # page-granular, 32-bit\r |
| 483 | .byte 0\r |
| 484 | \r |
| 485 | # linear code segment descriptor\r |
| 486 | LINEAR_CODE_SEL = .-GDT_BASE\r |
| 487 | .short 0x0FFFF # limit 0xFFFFF\r |
| 488 | .short 0 # base 0\r |
| 489 | .byte 0\r |
| 490 | .byte 0x09A # present, ring 0, data, expand-up, writable\r |
| 491 | .byte 0x0CF # page-granular, 32-bit\r |
| 492 | .byte 0\r |
| 493 | \r |
| 494 | # system data segment descriptor\r |
| 495 | SYS_DATA_SEL = .-GDT_BASE\r |
| 496 | .short 0x0FFFF # limit 0xFFFFF\r |
| 497 | .short 0 # base 0\r |
| 498 | .byte 0\r |
| 499 | .byte 0x092 # present, ring 0, data, expand-up, writable\r |
| 500 | .byte 0x0CF # page-granular, 32-bit\r |
| 501 | .byte 0\r |
| 502 | \r |
| 503 | # system code segment descriptor\r |
| 504 | SYS_CODE_SEL = .-GDT_BASE\r |
| 505 | .short 0x0FFFF # limit 0xFFFFF\r |
| 506 | .short 0 # base 0\r |
| 507 | .byte 0\r |
| 508 | .byte 0x09A # present, ring 0, data, expand-up, writable\r |
| 509 | .byte 0x0CF # page-granular, 32-bit\r |
| 510 | .byte 0\r |
| 511 | \r |
| 512 | # spare segment descriptor\r |
| 513 | SPARE3_SEL = .-GDT_BASE\r |
| 514 | .short 0 # limit 0xFFFFF\r |
| 515 | .short 0 # base 0\r |
| 516 | .byte 0\r |
| 517 | .byte 0 # present, ring 0, data, expand-up, writable\r |
| 518 | .byte 0 # page-granular, 32-bit\r |
| 519 | .byte 0\r |
| 520 | \r |
| 521 | # spare segment descriptor\r |
| 522 | SPARE4_SEL = .-GDT_BASE\r |
| 523 | .short 0 # limit 0xFFFFF\r |
| 524 | .short 0 # base 0\r |
| 525 | .byte 0\r |
| 526 | .byte 0 # present, ring 0, data, expand-up, writable\r |
| 527 | .byte 0 # page-granular, 32-bit\r |
| 528 | .byte 0\r |
| 529 | \r |
| 530 | # spare segment descriptor\r |
| 531 | SPARE5_SEL = .-GDT_BASE\r |
| 532 | .short 0 # limit 0xFFFFF\r |
| 533 | .short 0 # base 0\r |
| 534 | .byte 0\r |
| 535 | .byte 0 # present, ring 0, data, expand-up, writable\r |
| 536 | .byte 0 # page-granular, 32-bit\r |
| 537 | .byte 0\r |
| 538 | \r |
| 539 | GDT_END:\r |
| 540 | \r |
| 9811c392 |
541 | .p2align 2\r |
| 99032c45 |
542 | \r |
| 543 | \r |
| 544 | \r |
| 545 | idtr: .short IDT_END - IDT_BASE - 1 # IDT limit\r |
| 546 | .quad 0 # (IDT base gets set above)\r |
| 547 | ##############################################################################\r |
| 548 | # interrupt descriptor table (IDT)\r |
| 549 | #\r |
| 550 | # Note: The hardware IRQ's specified in this table are the normal PC/AT IRQ\r |
| 551 | # mappings. This implementation only uses the system timer and all other\r |
| 552 | # IRQs will remain masked. The descriptors for vectors 33+ are provided\r |
| 553 | # for convenience.\r |
| 554 | ##############################################################################\r |
| 555 | \r |
| 556 | #idt_tag .byte "IDT",0 \r |
| 9811c392 |
557 | .p2align 2\r |
| 99032c45 |
558 | \r |
| 559 | IDT_BASE:\r |
| 560 | # divide by zero (INT 0)\r |
| 561 | DIV_ZERO_SEL = .-IDT_BASE\r |
| 562 | .short 0 # offset 15:0\r |
| 563 | .short SYS_CODE_SEL # selector 15:0\r |
| 564 | .byte 0 # 0 for interrupt gate\r |
| 565 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| 566 | .short 0 # offset 31:16\r |
| 567 | \r |
| 568 | # debug exception (INT 1)\r |
| 569 | DEBUG_EXCEPT_SEL = .-IDT_BASE\r |
| 570 | .short 0 # offset 15:0\r |
| 571 | .short SYS_CODE_SEL # selector 15:0\r |
| 572 | .byte 0 # 0 for interrupt gate\r |
| 573 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| 574 | .short 0 # offset 31:16\r |
| 575 | \r |
| 576 | # NMI (INT 2)\r |
| 577 | NMI_SEL = .-IDT_BASE\r |
| 578 | .short 0 # offset 15:0\r |
| 579 | .short SYS_CODE_SEL # selector 15:0\r |
| 580 | .byte 0 # 0 for interrupt gate\r |
| 581 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| 582 | .short 0 # offset 31:16\r |
| 583 | \r |
| 584 | # soft breakpoint (INT 3)\r |
| 585 | BREAKPOINT_SEL = .-IDT_BASE\r |
| 586 | .short 0 # offset 15:0\r |
| 587 | .short SYS_CODE_SEL # selector 15:0\r |
| 588 | .byte 0 # 0 for interrupt gate\r |
| 589 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| 590 | .short 0 # offset 31:16\r |
| 591 | \r |
| 592 | # overflow (INT 4)\r |
| 593 | OVERFLOW_SEL = .-IDT_BASE\r |
| 594 | .short 0 # offset 15:0\r |
| 595 | .short SYS_CODE_SEL # selector 15:0\r |
| 596 | .byte 0 # 0 for interrupt gate\r |
| 597 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| 598 | .short 0 # offset 31:16\r |
| 599 | \r |
| 600 | # bounds check (INT 5)\r |
| 601 | BOUNDS_CHECK_SEL = .-IDT_BASE\r |
| 602 | .short 0 # offset 15:0\r |
| 603 | .short SYS_CODE_SEL # selector 15:0\r |
| 604 | .byte 0 # 0 for interrupt gate\r |
| 605 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| 606 | .short 0 # offset 31:16\r |
| 607 | \r |
| 608 | # invalid opcode (INT 6)\r |
| 609 | INVALID_OPCODE_SEL = .-IDT_BASE\r |
| 610 | .short 0 # offset 15:0\r |
| 611 | .short SYS_CODE_SEL # selector 15:0\r |
| 612 | .byte 0 # 0 for interrupt gate\r |
| 613 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| 614 | .short 0 # offset 31:16\r |
| 615 | \r |
| 616 | # device not available (INT 7)\r |
| 617 | DEV_NOT_AVAIL_SEL = .-IDT_BASE\r |
| 618 | .short 0 # offset 15:0\r |
| 619 | .short SYS_CODE_SEL # selector 15:0\r |
| 620 | .byte 0 # 0 for interrupt gate\r |
| 621 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| 622 | .short 0 # offset 31:16\r |
| 623 | \r |
| 624 | # double fault (INT 8)\r |
| 625 | DOUBLE_FAULT_SEL = .-IDT_BASE\r |
| 626 | .short 0 # offset 15:0\r |
| 627 | .short SYS_CODE_SEL # selector 15:0\r |
| 628 | .byte 0 # 0 for interrupt gate\r |
| 629 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| 630 | .short 0 # offset 31:16\r |
| 631 | \r |
| 632 | # Coprocessor segment overrun - reserved (INT 9)\r |
| 633 | RSVD_INTR_SEL1 = .-IDT_BASE\r |
| 634 | .short 0 # offset 15:0\r |
| 635 | .short SYS_CODE_SEL # selector 15:0\r |
| 636 | .byte 0 # 0 for interrupt gate\r |
| 637 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| 638 | .short 0 # offset 31:16\r |
| 639 | \r |
| 640 | # invalid TSS (INT 0ah)\r |
| 641 | INVALID_TSS_SEL = .-IDT_BASE\r |
| 642 | .short 0 # offset 15:0\r |
| 643 | .short SYS_CODE_SEL # selector 15:0\r |
| 644 | .byte 0 # 0 for interrupt gate\r |
| 645 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| 646 | .short 0 # offset 31:16\r |
| 647 | \r |
| 648 | # segment not present (INT 0bh)\r |
| 649 | SEG_NOT_PRESENT_SEL = .-IDT_BASE\r |
| 650 | .short 0 # offset 15:0\r |
| 651 | .short SYS_CODE_SEL # selector 15:0\r |
| 652 | .byte 0 # 0 for interrupt gate\r |
| 653 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| 654 | .short 0 # offset 31:16\r |
| 655 | \r |
| 656 | # stack fault (INT 0ch)\r |
| 657 | STACK_FAULT_SEL = .-IDT_BASE\r |
| 658 | .short 0 # offset 15:0\r |
| 659 | .short SYS_CODE_SEL # selector 15:0\r |
| 660 | .byte 0 # 0 for interrupt gate\r |
| 661 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| 662 | .short 0 # offset 31:16\r |
| 663 | \r |
| 664 | # general protection (INT 0dh)\r |
| 665 | GP_FAULT_SEL = .-IDT_BASE\r |
| 666 | .short 0 # offset 15:0\r |
| 667 | .short SYS_CODE_SEL # selector 15:0\r |
| 668 | .byte 0 # 0 for interrupt gate\r |
| 669 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| 670 | .short 0 # offset 31:16\r |
| 671 | \r |
| 672 | # page fault (INT 0eh)\r |
| 673 | PAGE_FAULT_SEL = .-IDT_BASE\r |
| 674 | .short 0 # offset 15:0\r |
| 675 | .short SYS_CODE_SEL # selector 15:0\r |
| 676 | .byte 0 # 0 for interrupt gate\r |
| 677 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| 678 | .short 0 # offset 31:16\r |
| 679 | \r |
| 680 | # Intel reserved - do not use (INT 0fh)\r |
| 681 | RSVD_INTR_SEL2 = .-IDT_BASE\r |
| 682 | .short 0 # offset 15:0\r |
| 683 | .short SYS_CODE_SEL # selector 15:0\r |
| 684 | .byte 0 # 0 for interrupt gate\r |
| 685 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| 686 | .short 0 # offset 31:16\r |
| 687 | \r |
| 688 | # floating point error (INT 0x10)\r |
| 689 | FLT_POINT_ERR_SEL = .-IDT_BASE\r |
| 690 | .short 0 # offset 15:0\r |
| 691 | .short SYS_CODE_SEL # selector 15:0\r |
| 692 | .byte 0 # 0 for interrupt gate\r |
| 693 | .byte 0x0e | 0x80 # type = 386 interrupt gate, present\r |
| 694 | .short 0 # offset 31:16\r |
| 695 | \r |
| 696 | # alignment check (INT 0x11)\r |
| 697 | ALIGNMENT_CHECK_SEL = .-IDT_BASE\r |
| 698 | .short 0 # offset 15:0\r |
| 699 | .short SYS_CODE_SEL # selector 15:0\r |
| 700 | .byte 0 # 0 for interrupt gate\r |
| 701 | .byte 0x0e | 0x80 # (10001110)type = 386 interrupt gate, present\r |
| 702 | .short 0 # offset 31:16\r |
| 703 | \r |
| 704 | # machine check (INT 0x12)\r |
| 705 | MACHINE_CHECK_SEL = .-IDT_BASE\r |
| 706 | .short 0 # offset 15:0\r |
| 707 | .short SYS_CODE_SEL # selector 15:0\r |
| 708 | .byte 0 # 0 for interrupt gate\r |
| 709 | .byte 0x0e | 0x80 # (10001110)type = 386 interrupt gate, present\r |
| 710 | .short 0 # offset 31:16\r |
| 711 | \r |
| 712 | # SIMD floating-point exception (INT 0x13)\r |
| 713 | SIMD_EXCEPTION_SEL = .-IDT_BASE\r |
| 714 | .short 0 # offset 15:0\r |
| 715 | .short SYS_CODE_SEL # selector 15:0\r |
| 716 | .byte 0 # 0 for interrupt gate\r |
| 717 | .byte 0x0e | 0x80 # (10001110)type = 386 interrupt gate, present\r |
| 718 | .short 0 # offset 31:16\r |
| 719 | \r |
| 720 | .rept (32 - 20)\r |
| 721 | .short 0 # offset 15:0\r |
| 722 | .short SYS_CODE_SEL # selector 15:0\r |
| 723 | .byte 0 # 0 for interrupt gate\r |
| 724 | .byte 0x0e | 0x80 # (10001110)type = 386 interrupt gate, present\r |
| 725 | .short 0 # offset 31:16\r |
| 726 | .endr\r |
| 727 | \r |
| 728 | # 72 unspecified descriptors\r |
| 08b1f486 |
729 | .fill 72 * 8, 1, 0\r |
| 99032c45 |
730 | \r |
| 731 | # IRQ 0 (System timer) - (INT 0x68)\r |
| 732 | IRQ0_SEL = .-IDT_BASE\r |
| 733 | .short 0 # offset 15:0\r |
| 734 | .short SYS_CODE_SEL # selector 15:0\r |
| 735 | .byte 0 # 0 for interrupt gate\r |
| 736 | .byte 0x0e | 0x80 # (10001110)type = 386 interrupt gate, present\r |
| 737 | .short 0 # offset 31:16\r |
| 738 | \r |
| 739 | # IRQ 1 (8042 Keyboard controller) - (INT 0x69)\r |
| 740 | IRQ1_SEL = .-IDT_BASE\r |
| 741 | .short 0 # offset 15:0\r |
| 742 | .short SYS_CODE_SEL # selector 15:0\r |
| 743 | .byte 0 # 0 for interrupt gate\r |
| 744 | .byte 0x0e | 0x80 # (10001110)type = 386 interrupt gate, present\r |
| 745 | .short 0 # offset 31:16\r |
| 746 | \r |
| 747 | # Reserved - IRQ 2 redirect (IRQ 2) - DO NOT USE!!! - (INT 6ah)\r |
| 748 | IRQ2_SEL = .-IDT_BASE\r |
| 749 | .short 0 # offset 15:0\r |
| 750 | .short SYS_CODE_SEL # selector 15:0\r |
| 751 | .byte 0 # 0 for interrupt gate\r |
| 752 | .byte 0x0e | 0x80 # (10001110)type = 386 interrupt gate, present\r |
| 753 | .short 0 # offset 31:16\r |
| 754 | \r |
| 755 | # IRQ 3 (COM 2) - (INT 6bh)\r |
| 756 | IRQ3_SEL = .-IDT_BASE\r |
| 757 | .short 0 # offset 15:0\r |
| 758 | .short SYS_CODE_SEL # selector 15:0\r |
| 759 | .byte 0 # 0 for interrupt gate\r |
| 760 | .byte 0x0e | 0x80 # (10001110)type = 386 interrupt gate, present\r |
| 761 | .short 0 # offset 31:16\r |
| 762 | \r |
| 763 | # IRQ 4 (COM 1) - (INT 6ch)\r |
| 764 | IRQ4_SEL = .-IDT_BASE\r |
| 765 | .short 0 # offset 15:0\r |
| 766 | .short SYS_CODE_SEL # selector 15:0\r |
| 767 | .byte 0 # 0 for interrupt gate\r |
| 768 | .byte 0x0e | 0x80 # (10001110)type = 386 interrupt gate, present\r |
| 769 | .short 0 # offset 31:16\r |
| 770 | \r |
| 771 | # IRQ 5 (LPT 2) - (INT 6dh)\r |
| 772 | IRQ5_SEL = .-IDT_BASE\r |
| 773 | .short 0 # offset 15:0\r |
| 774 | .short SYS_CODE_SEL # selector 15:0\r |
| 775 | .byte 0 # 0 for interrupt gate\r |
| 776 | .byte 0x0e | 0x80 # (10001110)type = 386 interrupt gate, present\r |
| 777 | .short 0 # offset 31:16\r |
| 778 | \r |
| 779 | # IRQ 6 (Floppy controller) - (INT 6eh)\r |
| 780 | IRQ6_SEL = .-IDT_BASE\r |
| 781 | .short 0 # offset 15:0\r |
| 782 | .short SYS_CODE_SEL # selector 15:0\r |
| 783 | .byte 0 # 0 for interrupt gate\r |
| 784 | .byte 0x0e | 0x80 # (10001110)type = 386 interrupt gate, present\r |
| 785 | .short 0 # offset 31:16\r |
| 786 | \r |
| 787 | # IRQ 7 (LPT 1) - (INT 6fh)\r |
| 788 | IRQ7_SEL = .-IDT_BASE\r |
| 789 | .short 0 # offset 15:0\r |
| 790 | .short SYS_CODE_SEL # selector 15:0\r |
| 791 | .byte 0 # 0 for interrupt gate\r |
| 792 | .byte 0x0e | 0x80 # (10001110)type = 386 interrupt gate, present\r |
| 793 | .short 0 # offset 31:16\r |
| 794 | \r |
| 795 | # IRQ 8 (RTC Alarm) - (INT 0x70)\r |
| 796 | IRQ8_SEL = .-IDT_BASE\r |
| 797 | .short 0 # offset 15:0\r |
| 798 | .short SYS_CODE_SEL # selector 15:0\r |
| 799 | .byte 0 # 0 for interrupt gate\r |
| 800 | .byte 0x0e | 0x80 # (10001110)type = 386 interrupt gate, present\r |
| 801 | .short 0 # offset 31:16\r |
| 802 | \r |
| 803 | # IRQ 9 - (INT 0x71)\r |
| 804 | IRQ9_SEL = .-IDT_BASE\r |
| 805 | .short 0 # offset 15:0\r |
| 806 | .short SYS_CODE_SEL # selector 15:0\r |
| 807 | .byte 0 # 0 for interrupt gate\r |
| 808 | .byte 0x0e | 0x80 # (10001110)type = 386 interrupt gate, present\r |
| 809 | .short 0 # offset 31:16\r |
| 810 | \r |
| 811 | # IRQ 10 - (INT 0x72)\r |
| 812 | IRQ10_SEL = .-IDT_BASE\r |
| 813 | .short 0 # offset 15:0\r |
| 814 | .short SYS_CODE_SEL # selector 15:0\r |
| 815 | .byte 0 # 0 for interrupt gate\r |
| 816 | .byte 0x0e | 0x80 # (10001110)type = 386 interrupt gate, present\r |
| 817 | .short 0 # offset 31:16\r |
| 818 | \r |
| 819 | # IRQ 11 - (INT 0x73)\r |
| 820 | IRQ11_SEL = .-IDT_BASE\r |
| 821 | .short 0 # offset 15:0\r |
| 822 | .short SYS_CODE_SEL # selector 15:0\r |
| 823 | .byte 0 # 0 for interrupt gate\r |
| 824 | .byte 0x0e | 0x80 # (10001110)type = 386 interrupt gate, present\r |
| 825 | .short 0 # offset 31:16\r |
| 826 | \r |
| 827 | # IRQ 12 (PS/2 mouse) - (INT 0x74)\r |
| 828 | IRQ12_SEL = .-IDT_BASE\r |
| 829 | .short 0 # offset 15:0\r |
| 830 | .short SYS_CODE_SEL # selector 15:0\r |
| 831 | .byte 0 # 0 for interrupt gate\r |
| 832 | .byte 0x0e | 0x80 # (10001110)type = 386 interrupt gate, present\r |
| 833 | .short 0 # offset 31:16\r |
| 834 | \r |
| 835 | # IRQ 13 (Floating point error) - (INT 0x75)\r |
| 836 | IRQ13_SEL = .-IDT_BASE\r |
| 837 | .short 0 # offset 15:0\r |
| 838 | .short SYS_CODE_SEL # selector 15:0\r |
| 839 | .byte 0 # 0 for interrupt gate\r |
| 840 | .byte 0x0e | 0x80 # (10001110)type = 386 interrupt gate, present\r |
| 841 | .short 0 # offset 31:16\r |
| 842 | \r |
| 843 | # IRQ 14 (Secondary IDE) - (INT 0x76)\r |
| 844 | IRQ14_SEL = .-IDT_BASE\r |
| 845 | .short 0 # offset 15:0\r |
| 846 | .short SYS_CODE_SEL # selector 15:0\r |
| 847 | .byte 0 # 0 for interrupt gate\r |
| 848 | .byte 0x0e | 0x80 # (10001110)type = 386 interrupt gate, present\r |
| 849 | .short 0 # offset 31:16\r |
| 850 | \r |
| 851 | # IRQ 15 (Primary IDE) - (INT 0x77)\r |
| 852 | IRQ15_SEL = .-IDT_BASE\r |
| 853 | .short 0 # offset 15:0\r |
| 854 | .short SYS_CODE_SEL # selector 15:0\r |
| 855 | .byte 0 # 0 for interrupt gate\r |
| 856 | .byte 0x0e | 0x80 # (10001110)type = 386 interrupt gate, present\r |
| 857 | .short 0 # offset 31:16\r |
| 858 | \r |
| 08b1f486 |
859 | .fill 16, 1, 0\r |
| 99032c45 |
860 | \r |
| 861 | IDT_END:\r |
| 862 | \r |
projects / mirror_edk2.git / blame