Reviewed the description of ECP in the .dec file for clarity and completeness, and...

[mirror_edk2.git] / EdkCompatibilityPkg / Compatibility / Include / Ppi / EcpPciCfg.h

/** @file\r
This PPI is the same as the PPI in the framework PciCfg, with one exception: this PPI does not include a modify API, while the PPI in the framework PciCfg does. \r
\r
Copyright (c) 2008, Intel Corporation                                                         \r
All rights reserved. This program and the accompanying materials                          \r
are licensed and made available under the terms and conditions of the BSD License         \r
which accompanies this distribution.  The full text of the license may be found at        \r
http://opensource.org/licenses/bsd-license.php                                            \r
                                                                                          \r
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     \r
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             \r
\r
**/\r
\r
#ifndef _PEI_PCI_CFG_H_\r
#define _PEI_PCI_CFG_H_\r
\r
#include <Ppi/PciCfg.h>\r
\r
#define ECP_PEI_PCI_CFG_PPI_GUID \\r
  {0xb0ee53d4, 0xa049, 0x4a79, { 0xb2, 0xff, 0x19, 0xd9, 0xfa, 0xef, 0xaa, 0x94}}\r
\r
typedef struct _ECP_PEI_PCI_CFG_PPI ECP_PEI_PCI_CFG_PPI;\r
\r
/**\r
  PCI read and write operation.\r
  \r
  Writes to or reads from a given location in the PCI configuration space.\r
\r
  @param  PeiServices                   An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
  @param  This                              Pointer to local data for the interface.\r
  @param  Width                            The width of the access. Enumerated in bytes.\r
                                                    See EFI_PEI_PCI_CFG_PPI_WIDTH in MDEPkg.\r
  @param  Address                         The physical address of the access. The format of\r
                                                    the address is described by EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS.\r
  @param  Buffer                            A pointer to the buffer of data.\r
  @retval EFI_SUCCESS                   The function completed successfully.\r
  @retval EFI_DEVICE_ERROR          There was a problem with the transaction.\r
  @retval EFI_DEVICE_NOT_READY  The device is not capable of supporting the operation at this\r
                                                 time.\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *ECP_PEI_PCI_CFG_PPI_IO) (\r
  IN EFI_PEI_SERVICES         **PeiServices,\r
  IN EFI_PEI_PCI_CFG_PPI      * This,\r
  IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r
  IN UINT64                   Address,\r
  IN OUT VOID                 *Buffer\r
  );\r
\r
/**\r
  The ECP_PEI_PCI_CFG_PPI interfaces are used to abstract accesses to PCI \r
  controllers behind a PCI root bridge controller.\r
  @param Read\r
  PCI read services.  See the Read() function description.\r
  @param Write\r
  PCI write services.  See the Write() function description.\r
\r
**/\r
\r
struct _ECP_PEI_PCI_CFG_PPI {\r
  ECP_PEI_PCI_CFG_PPI_IO  Read;\r
  ECP_PEI_PCI_CFG_PPI_IO  Write;\r
};\r
\r
extern EFI_GUID gEcpPeiPciCfgPpiGuid;\r
\r
#endif\r