[mirror_edk2.git] / EdkCompatibilityPkg / Foundation / Efi / Protocol / PciRootBridgeIo / PciRootBridgeIo.h

/*++\r
\r
Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials                          \r
are licensed and made available under the terms and conditions of the BSD License         \r
which accompanies this distribution.  The full text of the license may be found at        \r
http://opensource.org/licenses/bsd-license.php                                            \r
                                                                                          \r
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     \r
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             \r
\r
Module Name:\r
\r
  PciRootBridgeIo.h\r
\r
Abstract:\r
\r
  PCI Root Bridge I/O protocol as defined in the EFI 1.1 specification.\r
\r
  PCI Root Bridge I/O protocol is used by PCI Bus Driver to perform PCI Memory, PCI I/O, \r
  and PCI Configuration cycles on a PCI Root Bridge. It also provides services to perform \r
  defferent types of bus mastering DMA\r
\r
--*/\r
\r
#ifndef _PCI_ROOT_BRIDGE_IO_H_\r
#define _PCI_ROOT_BRIDGE_IO_H_\r
\r
#define EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_GUID \\r
  { \\r
    0x2f707ebb, 0x4a1a, 0x11d4, {0x9a, 0x38, 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d} \\r
  }\r
\r
EFI_FORWARD_DECLARATION (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL);\r
\r
typedef enum {\r
  EfiPciWidthUint8,\r
  EfiPciWidthUint16,\r
  EfiPciWidthUint32,\r
  EfiPciWidthUint64,\r
  EfiPciWidthFifoUint8,\r
  EfiPciWidthFifoUint16,\r
  EfiPciWidthFifoUint32,\r
  EfiPciWidthFifoUint64,\r
  EfiPciWidthFillUint8,\r
  EfiPciWidthFillUint16,\r
  EfiPciWidthFillUint32,\r
  EfiPciWidthFillUint64,\r
  EfiPciWidthMaximum\r
} EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH;\r
\r
typedef enum {\r
  EfiPciOperationBusMasterRead,\r
  EfiPciOperationBusMasterWrite,\r
  EfiPciOperationBusMasterCommonBuffer,\r
  EfiPciOperationBusMasterRead64,\r
  EfiPciOperationBusMasterWrite64,\r
  EfiPciOperationBusMasterCommonBuffer64,\r
  EfiPciOperationMaximum\r
} EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION;\r
\r
#define EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO          0x0001\r
#define EFI_PCI_ATTRIBUTE_ISA_IO                      0x0002\r
#define EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO              0x0004\r
#define EFI_PCI_ATTRIBUTE_VGA_MEMORY                  0x0008\r
#define EFI_PCI_ATTRIBUTE_VGA_IO                      0x0010\r
#define EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO              0x0020\r
#define EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO            0x0040\r
#define EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE        0x0080\r
#define EFI_PCI_ATTRIBUTE_MEMORY_CACHED               0x0800\r
#define EFI_PCI_ATTRIBUTE_MEMORY_DISABLE              0x1000\r
#define EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE          0x8000\r
//\r
// The following definition is added in EFI1.1 spec update and UEFI2.0 spec.\r
//\r
#define EFI_PCI_ATTRIBUTE_ISA_IO_16                   0x10000\r
#define EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO_16           0x20000\r
#define EFI_PCI_ATTRIBUTE_VGA_IO_16                   0x40000\r
\r
#define EFI_PCI_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER   (EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE | EFI_PCI_ATTRIBUTE_MEMORY_CACHED | EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE)\r
\r
#define EFI_PCI_ATTRIBUTE_INVALID_FOR_ALLOCATE_BUFFER (~EFI_PCI_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER)\r
\r
#define EFI_PCI_ADDRESS(bus, dev, func, reg) \\r
    ((UINT64) ((((UINTN) bus) << 24) + (((UINTN) dev) << 16) + (((UINTN) func) << 8) + ((UINTN) reg)))\r
\r
typedef struct {\r
  UINT8   Register;\r
  UINT8   Function;\r
  UINT8   Device;\r
  UINT8   Bus;\r
  UINT32  ExtendedRegister;\r
} EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS;\r
\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_POLL_IO_MEM) (\r
  IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL           * This,\r
  IN  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH    Width,\r
  IN  UINT64                                   Address,\r
  IN  UINT64                                   Mask,\r
  IN  UINT64                                   Value,\r
  IN  UINT64                                   Delay,\r
  OUT UINT64                                   *Result\r
  );\r
\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_IO_MEM) (\r
  IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL              * This,\r
  IN     EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH    Width,\r
  IN     UINT64                                   Address,\r
  IN     UINTN                                    Count,\r
  IN OUT VOID                                     *Buffer\r
  );\r
\r
typedef struct {\r
  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_IO_MEM  Read;\r
  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_IO_MEM  Write;\r
} EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS;\r
\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_COPY_MEM) (\r
  IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL              * This,\r
  IN     EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH    Width,\r
  IN     UINT64                                   DestAddress,\r
  IN     UINT64                                   SrcAddress,\r
  IN     UINTN                                    Count\r
  );\r
\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_MAP) (\r
  IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL                * This,\r
  IN     EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION  Operation,\r
  IN     VOID                                       *HostAddress,\r
  IN OUT UINTN                                      *NumberOfBytes,\r
  OUT    EFI_PHYSICAL_ADDRESS                       * DeviceAddress,\r
  OUT    VOID                                       **Mapping\r
  );\r
\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_UNMAP) (\r
  IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL           * This,\r
  IN  VOID                                     *Mapping\r
  );\r
\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ALLOCATE_BUFFER) (\r
  IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL              * This,\r
  IN     EFI_ALLOCATE_TYPE                        Type,\r
  IN     EFI_MEMORY_TYPE                          MemoryType,\r
  IN     UINTN                                    Pages,\r
  IN OUT VOID                                     **HostAddress,\r
  IN     UINT64                                   Attributes\r
  );\r
\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FREE_BUFFER) (\r
  IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL           * This,\r
  IN  UINTN                                    Pages,\r
  IN  VOID                                     *HostAddress\r
  );\r
\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FLUSH) (\r
  IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL  * This\r
  );\r
\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_GET_ATTRIBUTES) (\r
  IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL           * This,\r
  OUT UINT64                                   *Supports,\r
  OUT UINT64                                   *Attributes\r
  );\r
\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_SET_ATTRIBUTES) (\r
  IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL              * This,\r
  IN     UINT64                                   Attributes,\r
  IN OUT UINT64                                   *ResourceBase,\r
  IN OUT UINT64                                   *ResourceLength\r
  );\r
\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_CONFIGURATION) (\r
  IN  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL          * This,\r
  OUT VOID                                     **Resources\r
  );\r
\r
struct _EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL {\r
  EFI_HANDLE                                      ParentHandle;\r
  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_POLL_IO_MEM     PollMem;\r
  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_POLL_IO_MEM     PollIo;\r
  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS          Mem;\r
  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS          Io;\r
  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS          Pci;\r
  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_COPY_MEM        CopyMem;\r
  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_MAP             Map;\r
  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_UNMAP           Unmap;\r
  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ALLOCATE_BUFFER AllocateBuffer;\r
  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FREE_BUFFER     FreeBuffer;\r
  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FLUSH           Flush;\r
  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_GET_ATTRIBUTES  GetAttributes;\r
  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_SET_ATTRIBUTES  SetAttributes;\r
  EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_CONFIGURATION   Configuration;\r
  UINT32                                          SegmentNumber;\r
};\r
\r
extern EFI_GUID gEfiPciRootBridgeIoProtocolGuid;\r
\r
#endif\r
Commit	Line	Data
3eb9473e	1	/*++\r
3eb9473e	2	\r
f57387d5 HT	3	Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR>\r
f57387d5 HT	4	This program and the accompanying materials \r
3eb9473e	5	are licensed and made available under the terms and conditions of the BSD License \r
	6	which accompanies this distribution. The full text of the license may be found at \r
	7	http://opensource.org/licenses/bsd-license.php \r
	8	\r
	9	THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
	10	WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
	11	\r
	12	Module Name:\r
	13	\r
	14	PciRootBridgeIo.h\r
	15	\r
	16	Abstract:\r
	17	\r
	18	PCI Root Bridge I/O protocol as defined in the EFI 1.1 specification.\r
	19	\r
	20	PCI Root Bridge I/O protocol is used by PCI Bus Driver to perform PCI Memory, PCI I/O, \r
	21	and PCI Configuration cycles on a PCI Root Bridge. It also provides services to perform \r
	22	defferent types of bus mastering DMA\r
	23	\r
	24	--*/\r
	25	\r
	26	#ifndef _PCI_ROOT_BRIDGE_IO_H_\r
	27	#define _PCI_ROOT_BRIDGE_IO_H_\r
	28	\r
	29	#define EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_GUID \\r
	30	{ \\r
7ccf38a3	31	0x2f707ebb, 0x4a1a, 0x11d4, {0x9a, 0x38, 0x00, 0x90, 0x27, 0x3f, 0xc1, 0x4d} \\r
3eb9473e	32	}\r
	33	\r
	34	EFI_FORWARD_DECLARATION (EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL);\r
	35	\r
	36	typedef enum {\r
	37	EfiPciWidthUint8,\r
	38	EfiPciWidthUint16,\r
	39	EfiPciWidthUint32,\r
	40	EfiPciWidthUint64,\r
	41	EfiPciWidthFifoUint8,\r
	42	EfiPciWidthFifoUint16,\r
	43	EfiPciWidthFifoUint32,\r
	44	EfiPciWidthFifoUint64,\r
	45	EfiPciWidthFillUint8,\r
	46	EfiPciWidthFillUint16,\r
	47	EfiPciWidthFillUint32,\r
	48	EfiPciWidthFillUint64,\r
	49	EfiPciWidthMaximum\r
	50	} EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH;\r
	51	\r
	52	typedef enum {\r
	53	EfiPciOperationBusMasterRead,\r
	54	EfiPciOperationBusMasterWrite,\r
	55	EfiPciOperationBusMasterCommonBuffer,\r
	56	EfiPciOperationBusMasterRead64,\r
	57	EfiPciOperationBusMasterWrite64,\r
	58	EfiPciOperationBusMasterCommonBuffer64,\r
	59	EfiPciOperationMaximum\r
	60	} EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION;\r
	61	\r
	62	#define EFI_PCI_ATTRIBUTE_ISA_MOTHERBOARD_IO 0x0001\r
	63	#define EFI_PCI_ATTRIBUTE_ISA_IO 0x0002\r
	64	#define EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO 0x0004\r
	65	#define EFI_PCI_ATTRIBUTE_VGA_MEMORY 0x0008\r
	66	#define EFI_PCI_ATTRIBUTE_VGA_IO 0x0010\r
	67	#define EFI_PCI_ATTRIBUTE_IDE_PRIMARY_IO 0x0020\r
	68	#define EFI_PCI_ATTRIBUTE_IDE_SECONDARY_IO 0x0040\r
	69	#define EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE 0x0080\r
	70	#define EFI_PCI_ATTRIBUTE_MEMORY_CACHED 0x0800\r
	71	#define EFI_PCI_ATTRIBUTE_MEMORY_DISABLE 0x1000\r
	72	#define EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE 0x8000\r
	73	//\r
	74	// The following definition is added in EFI1.1 spec update and UEFI2.0 spec.\r
	75	//\r
	76	#define EFI_PCI_ATTRIBUTE_ISA_IO_16 0x10000\r
	77	#define EFI_PCI_ATTRIBUTE_VGA_PALETTE_IO_16 0x20000\r
	78	#define EFI_PCI_ATTRIBUTE_VGA_IO_16 0x40000\r
	79	\r
	80	#define EFI_PCI_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER (EFI_PCI_ATTRIBUTE_MEMORY_WRITE_COMBINE \| EFI_PCI_ATTRIBUTE_MEMORY_CACHED \| EFI_PCI_ATTRIBUTE_DUAL_ADDRESS_CYCLE)\r
	81	\r
	82	#define EFI_PCI_ATTRIBUTE_INVALID_FOR_ALLOCATE_BUFFER (~EFI_PCI_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER)\r
	83	\r
	84	#define EFI_PCI_ADDRESS(bus, dev, func, reg) \\r
	85	((UINT64) ((((UINTN) bus) << 24) + (((UINTN) dev) << 16) + (((UINTN) func) << 8) + ((UINTN) reg)))\r
	86	\r
	87	typedef struct {\r
	88	UINT8 Register;\r
	89	UINT8 Function;\r
	90	UINT8 Device;\r
	91	UINT8 Bus;\r
	92	UINT32 ExtendedRegister;\r
	93	} EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS;\r
	94	\r
	95	typedef\r
96	EFI_STATUS\r
97	(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_POLL_IO_MEM) (\r
98	IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL * This,\r
99	IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,\r
100	IN UINT64 Address,\r
101	IN UINT64 Mask,\r
102	IN UINT64 Value,\r
103	IN UINT64 Delay,\r
104	OUT UINT64 *Result\r
105	);\r
106	\r
107	typedef\r
108	EFI_STATUS\r
109	(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_IO_MEM) (\r
110	IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL * This,\r
111	IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,\r
112	IN UINT64 Address,\r
113	IN UINTN Count,\r
114	IN OUT VOID *Buffer\r
115	);\r
116	\r
117	typedef struct {\r
118	EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_IO_MEM Read;\r
119	EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_IO_MEM Write;\r
120	} EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS;\r
121	\r
122	typedef\r
123	EFI_STATUS\r
124	(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_COPY_MEM) (\r
125	IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL * This,\r
126	IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH Width,\r
127	IN UINT64 DestAddress,\r
128	IN UINT64 SrcAddress,\r
129	IN UINTN Count\r
130	);\r
131	\r
132	typedef\r
133	EFI_STATUS\r
134	(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_MAP) (\r
135	IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL * This,\r
136	IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_OPERATION Operation,\r
137	IN VOID *HostAddress,\r
138	IN OUT UINTN *NumberOfBytes,\r
139	OUT EFI_PHYSICAL_ADDRESS * DeviceAddress,\r
140	OUT VOID **Mapping\r
141	);\r
142	\r
143	typedef\r
144	EFI_STATUS\r
145	(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_UNMAP) (\r
146	IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL * This,\r
147	IN VOID *Mapping\r
148	);\r
149	\r
150	typedef\r
151	EFI_STATUS\r
152	(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ALLOCATE_BUFFER) (\r
153	IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL * This,\r
154	IN EFI_ALLOCATE_TYPE Type,\r
155	IN EFI_MEMORY_TYPE MemoryType,\r
156	IN UINTN Pages,\r
157	IN OUT VOID **HostAddress,\r
158	IN UINT64 Attributes\r
159	);\r
160	\r
161	typedef\r
162	EFI_STATUS\r
163	(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FREE_BUFFER) (\r
164	IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL * This,\r
165	IN UINTN Pages,\r
166	IN VOID *HostAddress\r
167	);\r
168	\r
169	typedef\r
170	EFI_STATUS\r
171	(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FLUSH) (\r
172	IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL * This\r
173	);\r
174	\r
175	typedef\r
176	EFI_STATUS\r
177	(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_GET_ATTRIBUTES) (\r
178	IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL * This,\r
179	OUT UINT64 *Supports,\r
180	OUT UINT64 *Attributes\r
181	);\r
182	\r
183	typedef\r
184	EFI_STATUS\r
185	(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_SET_ATTRIBUTES) (\r
186	IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL * This,\r
187	IN UINT64 Attributes,\r
188	IN OUT UINT64 *ResourceBase,\r
189	IN OUT UINT64 *ResourceLength\r
190	);\r
191	\r
192	typedef\r
193	EFI_STATUS\r
194	(EFIAPI *EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_CONFIGURATION) (\r
195	IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL * This,\r
196	OUT VOID **Resources\r
197	);\r
198	\r
e5bce275	199	struct _EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL {\r
3eb9473e	200	EFI_HANDLE ParentHandle;\r
	201	EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_POLL_IO_MEM PollMem;\r
	202	EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_POLL_IO_MEM PollIo;\r
	203	EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS Mem;\r
	204	EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS Io;\r
	205	EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ACCESS Pci;\r
	206	EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_COPY_MEM CopyMem;\r
	207	EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_MAP Map;\r
	208	EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_UNMAP Unmap;\r
	209	EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_ALLOCATE_BUFFER AllocateBuffer;\r
	210	EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FREE_BUFFER FreeBuffer;\r
	211	EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_FLUSH Flush;\r
	212	EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_GET_ATTRIBUTES GetAttributes;\r
	213	EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_SET_ATTRIBUTES SetAttributes;\r
	214	EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_CONFIGURATION Configuration;\r
	215	UINT32 SegmentNumber;\r
e5bce275	216	};\r
3eb9473e	217	\r
	218	extern EFI_GUID gEfiPciRootBridgeIoProtocolGuid;\r
	219	\r
	220	#endif\r