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Sync all bug fixes between EDK1.04 and EDK1.06 into EdkCompatibilityPkg.
[mirror_edk2.git] / EdkCompatibilityPkg / Foundation / Framework / Protocol / IdeControllerInit / IdeControllerInit.h
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3eb9473e 1/*++\r
2\r
3e99020d 3Copyright (c) 2004 - 2010, Intel Corporation. All rights reserved.<BR>\r
f57387d5 4This program and the accompanying materials \r
3eb9473e 5are licensed and made available under the terms and conditions of the BSD License \r
6which accompanies this distribution. The full text of the license may be found at \r
7http://opensource.org/licenses/bsd-license.php \r
8 \r
9THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
10WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
11\r
12Module Name:\r
13 \r
14 IdeControllerInit.h\r
15 \r
16Abstract:\r
17\r
18 EFI Platform IDE Init Protocol\r
19\r
20Revision History\r
21 \r
22 0.01 - Draft, 5-01-2002\r
23 Add Atapi6 Identify structure definition, 8-14-2002\r
24\r
25--*/\r
26\r
27#ifndef _EFI_IDE_CONTROLLER_INIT_PROTOCOL_H\r
28#define _EFI_IDE_CONTROLLER_INIT_PROTOCOL_H\r
29\r
30//\r
31// Global ID for the EFI Platform IDE Protocol GUID\r
32//\r
33#define EFI_IDE_CONTROLLER_INIT_PROTOCOL_GUID \\r
7ccf38a3 34 { 0xa1e37052, 0x80d9, 0x4e65, {0xa3, 0x17, 0x3e, 0x9a, 0x55, 0xc4, 0x3e, 0xc9} }\r
3eb9473e 35\r
36////////////////////////////////////////////////////////////////////////////////////////\r
37// Forward reference, ANSI compatability\r
38//\r
39EFI_FORWARD_DECLARATION (EFI_IDE_CONTROLLER_INIT_PROTOCOL);\r
40\r
41//\r
42//////////////////////////////////////////////////////////////////////////////////////////\r
43// EFI_IDE_BUS_ENUMERATION_PHASE\r
44// EFI_IDE_CONTROLLER_ENUM_PHASE\r
45//\r
46typedef enum{\r
47 EfiIdeBeforeChannelEnumeration,\r
48 EfiIdeAfterChannelEnumeration,\r
49 EfiIdeBeforeChannelReset,\r
50 EfiIdeAfterChannelReset,\r
51 EfiIdeBusBeforeDevicePresenceDetection,\r
52 EfiIdeBusAfterDevicePresenceDetection,\r
53 EfiIdeResetMode,\r
54 EfiIdeBusPhaseMaximum\r
55} EFI_IDE_CONTROLLER_ENUM_PHASE;\r
56\r
57//\r
58//******************************************************\r
59// EFI_ATA_EXT_TRANSFER_PROTOCOL\r
60//******************************************************\r
61//\r
62// This extended mode describes the SATA physical protocol.\r
63// SATA physical layers can operate at different speeds. \r
64// These speeds are defined below. Various PATA protocols \r
65// and associated modes are not applicable to SATA devices.\r
66//\r
67\r
68typedef enum {\r
69 EfiAtaSataTransferProtocol \r
70} EFI_ATA_EXT_TRANSFER_PROTOCOL;\r
71\r
72#define EFI_SATA_AUTO_SPEED 0\r
73#define EFI_SATA_GEN1_SPEED 1\r
74#define EFI_SATA_GEN2_SPEED 2\r
75\r
76//\r
77//*******************************************************\r
78// EFI_IDE_CABLE_TYPE\r
79//*******************************************************\r
80//\r
81typedef enum {\r
82 EfiIdeCableTypeUnknown,\r
83 EfiIdeCableType40pin,\r
84 EfiIdeCableType80Pin,\r
85 EfiIdeCableTypeSerial,\r
86 EfiIdeCableTypeMaximum\r
87} EFI_IDE_CABLE_TYPE;\r
88\r
89//\r
90//******************************************************\r
91// EFI_ATA_MODE\r
92//******************************************************\r
93//\r
94typedef struct {\r
95 BOOLEAN Valid;\r
96 UINT32 Mode; \r
97} EFI_ATA_MODE;\r
98\r
99//\r
100//******************************************************\r
101// EFI_ATA_EXTENDED_MODE\r
102//******************************************************\r
103//\r
104typedef struct {\r
105 EFI_ATA_EXT_TRANSFER_PROTOCOL TransferProtocol;\r
106 UINT32 Mode;\r
107} EFI_ATA_EXTENDED_MODE;\r
108\r
109//\r
110//******************************************************\r
111// EFI_ATA_COLLECTIVE_MODE\r
112//******************************************************\r
113//\r
114typedef struct {\r
115 EFI_ATA_MODE PioMode; \r
116 EFI_ATA_MODE SingleWordDmaMode;\r
117 EFI_ATA_MODE MultiWordDmaMode;\r
118 EFI_ATA_MODE UdmaMode;\r
119 UINT32 ExtModeCount;\r
120 EFI_ATA_EXTENDED_MODE ExtMode[1]; \r
121} EFI_ATA_COLLECTIVE_MODE;\r
122\r
123//\r
124//*******************************************************\r
125// EFI_ATA_IDENTIFY_DATA\r
126//*******************************************************\r
127//\r
128\r
129#pragma pack(1)\r
130\r
131typedef struct { \r
132 UINT16 config; // General Configuration\r
133 UINT16 cylinders; // Number of Cylinders\r
134 UINT16 reserved_2;\r
135 UINT16 heads; //Number of logical heads\r
136 UINT16 vendor_data1;\r
137 UINT16 vendor_data2;\r
138 UINT16 sectors_per_track;\r
139 UINT16 vendor_specific_7_9[3];\r
140 CHAR8 SerialNo[20]; // ASCII \r
141 UINT16 vendor_specific_20_21[2]; \r
142 UINT16 ecc_bytes_available; \r
143 CHAR8 FirmwareVer[8]; // ASCII \r
144 CHAR8 ModelName[40]; // ASCII \r
145 UINT16 multi_sector_cmd_max_sct_cnt;\r
146 UINT16 reserved_48;\r
147 UINT16 capabilities;\r
148 UINT16 reserved_50; \r
149 UINT16 pio_cycle_timing; \r
150 UINT16 reserved_52; \r
151 UINT16 field_validity; \r
152 UINT16 current_cylinders;\r
153 UINT16 current_heads;\r
154 UINT16 current_sectors; \r
155 UINT16 CurrentCapacityLsb;\r
156 UINT16 CurrentCapacityMsb; \r
157 UINT16 reserved_59; \r
158 UINT16 user_addressable_sectors_lo;\r
159 UINT16 user_addressable_sectors_hi;\r
160 UINT16 reserved_62; \r
161 UINT16 multi_word_dma_mode; \r
162 UINT16 advanced_pio_modes;\r
163 UINT16 min_multi_word_dma_cycle_time;\r
164 UINT16 rec_multi_word_dma_cycle_time;\r
165 UINT16 min_pio_cycle_time_without_flow_control;\r
166 UINT16 min_pio_cycle_time_with_flow_control;\r
167 UINT16 reserved_69_79[11]; \r
168 UINT16 major_version_no;\r
169 UINT16 minor_version_no;\r
170 UINT16 command_set_supported_82; // word 82\r
171 UINT16 command_set_supported_83; // word 83\r
172 UINT16 command_set_feature_extn; // word 84\r
173 UINT16 command_set_feature_enb_85; // word 85\r
174 UINT16 command_set_feature_enb_86; // word 86\r
175 UINT16 command_set_feature_default; // word 87\r
176 UINT16 ultra_dma_mode; // word 88\r
3e99020d
LG		 177 UINT16 reserved_89_105[17];\r
178 UINT16 phy_logic_sector_support; // word 106\r
179 UINT16 reserved_107_116[10];\r
180 UINT16 logic_sector_size_lo; // word 117\r
181 UINT16 logic_sector_size_hi; // word 118\r
182 UINT16 reserved_119_127[9];\r
3eb9473e 183 UINT16 security_status;\r
184 UINT16 vendor_data_129_159[31];\r
3e99020d
LG		 185 UINT16 reserved_160_208[49];\r
186 UINT16 alignment_logic_in_phy_blocks; // word 209\r
187 UINT16 reserved_210_255[46];\r
3eb9473e 188} EFI_ATA_IDENTIFY_DATA;\r
189\r
190#pragma pack()\r
191//\r
192//*******************************************************\r
193// EFI_ATAPI_IDENTIFY_DATA\r
194//*******************************************************\r
195//\r
196#pragma pack(1)\r
197typedef struct {\r
198 UINT16 config; // General Configuration\r
199 UINT16 obsolete_1;\r
200 UINT16 specific_config;\r
201 UINT16 obsolete_3; \r
202 UINT16 retired_4_5[2];\r
203 UINT16 obsolete_6; \r
204 UINT16 cfa_reserved_7_8[2];\r
205 UINT16 retired_9;\r
206 CHAR8 SerialNo[20]; // ASCII \r
207 UINT16 retired_20_21[2];\r
208 UINT16 obsolete_22;\r
209 CHAR8 FirmwareVer[8]; // ASCII \r
210 CHAR8 ModelName[40]; // ASCII \r
211 UINT16 multi_sector_cmd_max_sct_cnt;\r
212 UINT16 reserved_48;\r
213 UINT16 capabilities_49;\r
214 UINT16 capabilities_50;\r
215 UINT16 obsolete_51_52[2]; \r
216 UINT16 field_validity;\r
217 UINT16 obsolete_54_58[5];\r
218 UINT16 mutil_sector_setting;\r
219 UINT16 user_addressable_sectors_lo;\r
220 UINT16 user_addressable_sectors_hi;\r
221 UINT16 obsolete_62;\r
222 UINT16 multi_word_dma_mode;\r
223 UINT16 advanced_pio_modes;\r
224 UINT16 min_multi_word_dma_cycle_time;\r
225 UINT16 rec_multi_word_dma_cycle_time;\r
226 UINT16 min_pio_cycle_time_without_flow_control;\r
227 UINT16 min_pio_cycle_time_with_flow_control;\r
228 UINT16 reserved_69_74[6];\r
229 UINT16 queue_depth;\r
230 UINT16 reserved_76_79[4];\r
231 UINT16 major_version_no;\r
232 UINT16 minor_version_no;\r
233 UINT16 cmd_set_support_82;\r
234 UINT16 cmd_set_support_83;\r
235 UINT16 cmd_feature_support;\r
236 UINT16 cmd_feature_enable_85;\r
237 UINT16 cmd_feature_enable_86;\r
238 UINT16 cmd_feature_default;\r
239 UINT16 ultra_dma_select;\r
240 UINT16 time_required_for_sec_erase;\r
241 UINT16 time_required_for_enhanced_sec_erase;\r
242 UINT16 current_advanced_power_mgmt_value;\r
243 UINT16 master_pwd_revison_code;\r
244 UINT16 hardware_reset_result;\r
245 UINT16 current_auto_acoustic_mgmt_value;\r
246 UINT16 reserved_95_99[5];\r
247 UINT16 max_user_lba_for_48bit_addr[4];\r
248 UINT16 reserved_104_126[23];\r
249 UINT16 removable_media_status_notification_support;\r
250 UINT16 security_status;\r
251 UINT16 vendor_data_129_159[31];\r
252 UINT16 cfa_power_mode;\r
253 UINT16 cfa_reserved_161_175[15];\r
254 UINT16 current_media_serial_no[30];\r
255 UINT16 reserved_206_254[49];\r
256 UINT16 integrity_word;\r
257} EFI_ATAPI_IDENTIFY_DATA;\r
258\r
259#pragma pack()\r
260//\r
261//*******************************************************\r
262// EFI_IDENTIFY_DATA\r
263//*******************************************************\r
264//\r
265typedef union {\r
266 EFI_ATA_IDENTIFY_DATA AtaData;\r
267 EFI_ATAPI_IDENTIFY_DATA AtapiData;\r
268} EFI_IDENTIFY_DATA; \r
269\r
270#define EFI_ATAPI_DEVICE_IDENTIFY_DATA 0x8000\r
271\r
272//\r
273/////////////////////////////////////////////////////////////////////////////////////////\r
274// Function prototype declaration, for ANSI compatability\r
275//\r
276typedef \r
277EFI_STATUS\r
278(EFIAPI *EFI_IDE_CONTROLLER_GET_CHANNEL_INFO) (\r
279 IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This,\r
280 IN UINT8 Channel, \r
281 OUT BOOLEAN *Enabled,\r
282 OUT UINT8 *MaxDevices\r
283\r
284);\r
285\r
286typedef \r
287EFI_STATUS\r
288(EFIAPI *EFI_IDE_CONTROLLER_NOTIFY_PHASE) (\r
289 IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This,\r
290 IN EFI_IDE_CONTROLLER_ENUM_PHASE Phase,\r
291 IN UINT8 Channel\r
292);\r
293\r
294typedef \r
295EFI_STATUS\r
296(EFIAPI *EFI_IDE_CONTROLLER_SUBMIT_DATA) (\r
297 IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This,\r
298 IN UINT8 Channel,\r
299 IN UINT8 Device,\r
300 IN EFI_IDENTIFY_DATA *IdentifyData\r
301);\r
302\r
303\r
304typedef\r
305EFI_STATUS\r
306(EFIAPI *EFI_IDE_CONTROLLER_DISQUALIFY_MODE) (\r
307 IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This,\r
308 IN UINT8 Channel,\r
309 IN UINT8 Device,\r
310 IN EFI_ATA_COLLECTIVE_MODE *BadModes\r
311);\r
312\r
313typedef\r
314EFI_STATUS\r
315(EFIAPI *EFI_IDE_CONTROLLER_CALCULATE_MODE) (\r
316 IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This,\r
317 IN UINT8 Channel,\r
318 IN UINT8 Device,\r
319 OUT EFI_ATA_COLLECTIVE_MODE **SupportedModes\r
320);\r
321\r
322//\r
323// ?? What happen to EFI_IDE_CONTROLLER_SET_TIMING ???\r
324//\r
325typedef\r
326EFI_STATUS\r
327(EFIAPI *EFI_IDE_CONTROLLER_SET_TIMING) (\r
328 IN EFI_IDE_CONTROLLER_INIT_PROTOCOL *This,\r
329 IN UINT8 Channel,\r
330 IN UINT8 Device,\r
331 IN EFI_ATA_COLLECTIVE_MODE *Modes\r
332);\r
333\r
334//\r
335////////////////////////////////////////////////////////////////////////////////////////////////////\r
336// Interface structure \r
337// EFI_IDE_CONTROLLER_INIT_PROTOCOL protocol provides the chipset specific information to the IDE bus driver.\r
338// An IDE Bus driver wants to manage an IDE bus and possible IDE devices will have to retrieve the \r
339// EFI_IDE_CONTROLLER_INIT_PROTOCOL instances.\r
340//\r
5d46191d 341struct _EFI_IDE_CONTROLLER_INIT_PROTOCOL {\r
3eb9473e 342 EFI_IDE_CONTROLLER_GET_CHANNEL_INFO GetChannelInfo;\r
343 EFI_IDE_CONTROLLER_NOTIFY_PHASE NotifyPhase;\r
344 EFI_IDE_CONTROLLER_SUBMIT_DATA SubmitData;\r
345 EFI_IDE_CONTROLLER_DISQUALIFY_MODE DisqualifyMode;\r
346 EFI_IDE_CONTROLLER_CALCULATE_MODE CalculateMode;\r
347 EFI_IDE_CONTROLLER_SET_TIMING SetTiming;\r
348 BOOLEAN EnumAll;\r
349 UINT8 ChannelCount; \r
5d46191d 350};\r
3eb9473e 351\r
352\r
353extern EFI_GUID gEfiIdeControllerInitProtocolGuid;\r
354\r
355#endif\r
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