]>
Commit | Line | Data |
---|---|---|
3eb9473e | 1 | /*++\r |
2 | \r | |
f57387d5 HT |
3 | Copyright (c) 2007, Intel Corporation. All rights reserved.<BR>\r |
4 | This program and the accompanying materials \r | |
3eb9473e | 5 | are licensed and made available under the terms and conditions of the BSD License \r |
6 | which accompanies this distribution. The full text of the license may be found at \r | |
7 | http://opensource.org/licenses/bsd-license.php \r | |
8 | \r | |
9 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r | |
10 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r | |
11 | \r | |
12 | Module Name:\r | |
13 | \r | |
14 | LegacyBiosMpTable.h\r | |
15 | \r | |
16 | Abstract:\r | |
17 | Defives data structures per Multi Processor Specification Ver 1.4.\r | |
18 | \r | |
19 | --*/\r | |
20 | \r | |
21 | #ifndef LEGACY_BIOS_MPTABLE_H_\r | |
22 | #define LEGACY_BIOS_MPTABLE_H_\r | |
23 | \r | |
24 | #include "Tiano.h"\r | |
25 | \r | |
26 | #define EFI_LEGACY_MP_TABLE_REV_1_4 0x04\r | |
27 | \r | |
28 | //\r | |
29 | // Define MP table structures. All are packed.\r | |
30 | //\r | |
88b6bcec | 31 | #pragma pack(1)\r |
3eb9473e | 32 | \r |
33 | #define EFI_LEGACY_MP_TABLE_FLOATING_POINTER_SIGNATURE EFI_SIGNATURE_32 ('_', 'M', 'P', '_')\r | |
34 | typedef struct {\r | |
35 | UINT32 Signature;\r | |
36 | UINT32 PhysicalAddress;\r | |
37 | UINT8 Length;\r | |
38 | UINT8 SpecRev;\r | |
39 | UINT8 Checksum;\r | |
40 | UINT8 FeatureByte1;\r | |
41 | struct {\r | |
42 | UINT32 Reserved1 : 6;\r | |
43 | UINT32 MutipleClk : 1;\r | |
44 | UINT32 Imcr : 1;\r | |
45 | UINT32 Reserved2 : 24;\r | |
46 | } FeatureByte2_5;\r | |
47 | } EFI_LEGACY_MP_TABLE_FLOATING_POINTER;\r | |
48 | \r | |
49 | #define EFI_LEGACY_MP_TABLE_HEADER_SIGNATURE EFI_SIGNATURE_32 ('P', 'C', 'M', 'P')\r | |
50 | typedef struct {\r | |
51 | UINT32 Signature;\r | |
52 | UINT16 BaseTableLength;\r | |
53 | UINT8 SpecRev;\r | |
54 | UINT8 Checksum;\r | |
55 | CHAR8 OemId[8];\r | |
56 | CHAR8 OemProductId[12];\r | |
57 | UINT32 OemTablePointer;\r | |
58 | UINT16 OemTableSize;\r | |
59 | UINT16 EntryCount;\r | |
60 | UINT32 LocalApicAddress;\r | |
61 | UINT16 ExtendedTableLength;\r | |
62 | UINT8 ExtendedChecksum;\r | |
63 | UINT8 Reserved;\r | |
64 | } EFI_LEGACY_MP_TABLE_HEADER;\r | |
65 | \r | |
66 | typedef struct {\r | |
67 | UINT8 EntryType;\r | |
68 | } EFI_LEGACY_MP_TABLE_ENTRY_TYPE;\r | |
69 | \r | |
70 | //\r | |
71 | // Entry Type 0: Processor.\r | |
72 | //\r | |
73 | #define EFI_LEGACY_MP_TABLE_ENTRY_TYPE_PROCESSOR 0x00\r | |
74 | typedef struct {\r | |
75 | UINT8 EntryType;\r | |
76 | UINT8 Id;\r | |
77 | UINT8 Ver;\r | |
78 | struct {\r | |
79 | UINT8 Enabled : 1;\r | |
80 | UINT8 Bsp : 1;\r | |
81 | UINT8 Reserved : 6;\r | |
82 | } Flags;\r | |
83 | struct {\r | |
84 | UINT32 Stepping : 4;\r | |
85 | UINT32 Model : 4;\r | |
86 | UINT32 Family : 4;\r | |
87 | UINT32 Reserved : 20;\r | |
88 | } Signature;\r | |
89 | struct {\r | |
90 | UINT32 Fpu : 1;\r | |
91 | UINT32 Reserved1 : 6;\r | |
92 | UINT32 Mce : 1;\r | |
93 | UINT32 Cx8 : 1;\r | |
94 | UINT32 Apic : 1;\r | |
95 | UINT32 Reserved2 : 22;\r | |
96 | } Features;\r | |
97 | UINT32 Reserved1;\r | |
98 | UINT32 Reserved2;\r | |
99 | } EFI_LEGACY_MP_TABLE_ENTRY_PROCESSOR;\r | |
100 | \r | |
101 | //\r | |
102 | // Entry Type 1: Bus.\r | |
103 | //\r | |
104 | #define EFI_LEGACY_MP_TABLE_ENTRY_TYPE_BUS 0x01\r | |
105 | typedef struct {\r | |
106 | UINT8 EntryType;\r | |
107 | UINT8 Id;\r | |
108 | CHAR8 TypeString[6];\r | |
109 | } EFI_LEGACY_MP_TABLE_ENTRY_BUS;\r | |
110 | \r | |
111 | #define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_CBUS "CBUS " // Corollary CBus\r | |
112 | #define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_CBUSII "CBUSII" // Corollary CBUS II\r | |
113 | #define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_EISA "EISA " // Extended ISA\r | |
114 | #define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_FUTURE "FUTURE" // IEEE FutureBus\r | |
115 | #define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_INTERN "INTERN" // Internal bus\r | |
116 | #define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_ISA "ISA " // Industry Standard Architecture\r | |
117 | #define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_MBI "MBI " // Multibus I\r | |
118 | #define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_MBII "MBII " // Multibus II\r | |
119 | #define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_MCA "MCA " // Micro Channel Architecture\r | |
120 | #define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_MPI "MPI " // MPI\r | |
121 | #define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_MPSA "MPSA " // MPSA\r | |
122 | #define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_NUBUS "NUBUS " // Apple Macintosh NuBus\r | |
123 | #define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_PCI "PCI " // Peripheral Component Interconnect\r | |
124 | #define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_PCMCIA "PCMCIA" // PC Memory Card International Assoc.\r | |
125 | #define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_TC "TC " // DEC TurboChannel\r | |
126 | #define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_VL "VL " // VESA Local Bus\r | |
127 | #define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_VME "VME " // VMEbus\r | |
128 | #define EFI_LEGACY_MP_TABLE_ENTRY_BUS_STRING_XPRESS "XPRESS" // Express System Bus\r | |
129 | //\r | |
130 | // Entry Type 2: I/O APIC.\r | |
131 | //\r | |
132 | #define EFI_LEGACY_MP_TABLE_ENTRY_TYPE_IOAPIC 0x02\r | |
133 | typedef struct {\r | |
134 | UINT8 EntryType;\r | |
135 | UINT8 Id;\r | |
136 | UINT8 Ver;\r | |
137 | struct {\r | |
138 | UINT8 Enabled : 1;\r | |
139 | UINT8 Reserved : 7;\r | |
140 | } Flags;\r | |
141 | UINT32 Address;\r | |
142 | } EFI_LEGACY_MP_TABLE_ENTRY_IOAPIC;\r | |
143 | \r | |
144 | //\r | |
145 | // Entry Type 3: I/O Interrupt Assignment.\r | |
146 | //\r | |
147 | #define EFI_LEGACY_MP_TABLE_ENTRY_TYPE_IO_INT 0x03\r | |
148 | typedef struct {\r | |
149 | UINT8 EntryType;\r | |
150 | UINT8 IntType;\r | |
151 | struct {\r | |
152 | UINT16 Polarity : 2;\r | |
153 | UINT16 Trigger : 2;\r | |
154 | UINT16 Reserved : 12;\r | |
155 | } Flags;\r | |
156 | UINT8 SourceBusId;\r | |
157 | union {\r | |
158 | struct {\r | |
159 | UINT8 IntNo : 2;\r | |
160 | UINT8 Dev : 5;\r | |
161 | UINT8 Reserved : 1;\r | |
162 | } fields;\r | |
163 | UINT8 byte;\r | |
164 | } SourceBusIrq;\r | |
165 | UINT8 DestApicId;\r | |
166 | UINT8 DestApicIntIn;\r | |
167 | } EFI_LEGACY_MP_TABLE_ENTRY_IO_INT;\r | |
168 | \r | |
169 | typedef enum {\r | |
170 | EfiLegacyMpTableEntryIoIntTypeInt = 0,\r | |
171 | EfiLegacyMpTableEntryIoIntTypeNmi = 1,\r | |
172 | EfiLegacyMpTableEntryIoIntTypeSmi = 2,\r | |
173 | EfiLegacyMpTableEntryIoIntTypeExtInt= 3,\r | |
174 | } EFI_LEGACY_MP_TABLE_ENTRY_IO_INT_TYPE;\r | |
175 | \r | |
176 | typedef enum {\r | |
177 | EfiLegacyMpTableEntryIoIntFlagsPolaritySpec = 0x0,\r | |
178 | EfiLegacyMpTableEntryIoIntFlagsPolarityActiveHigh = 0x1,\r | |
179 | EfiLegacyMpTableEntryIoIntFlagsPolarityReserved = 0x2,\r | |
180 | EfiLegacyMpTableEntryIoIntFlagsPolarityActiveLow = 0x3,\r | |
181 | } EFI_LEGACY_MP_TABLE_ENTRY_IO_INT_FLAGS_POLARITY;\r | |
182 | \r | |
183 | typedef enum {\r | |
184 | EfiLegacyMpTableEntryIoIntFlagsTriggerSpec = 0x0,\r | |
185 | EfiLegacyMpTableEntryIoIntFlagsTriggerEdge = 0x1,\r | |
186 | EfiLegacyMpTableEntryIoIntFlagsTriggerReserved = 0x2,\r | |
187 | EfiLegacyMpTableEntryIoIntFlagsTriggerLevel = 0x3,\r | |
188 | } EFI_LEGACY_MP_TABLE_ENTRY_IO_INT_FLAGS_TRIGGER;\r | |
189 | \r | |
190 | //\r | |
191 | // Entry Type 4: Local Interrupt Assignment.\r | |
192 | //\r | |
193 | #define EFI_LEGACY_MP_TABLE_ENTRY_TYPE_LOCAL_INT 0x04\r | |
194 | typedef struct {\r | |
195 | UINT8 EntryType;\r | |
196 | UINT8 IntType;\r | |
197 | struct {\r | |
198 | UINT16 Polarity : 2;\r | |
199 | UINT16 Trigger : 2;\r | |
200 | UINT16 Reserved : 12;\r | |
201 | } Flags;\r | |
202 | UINT8 SourceBusId;\r | |
203 | UINT8 SourceBusIrq;\r | |
204 | UINT8 DestApicId;\r | |
205 | UINT8 DestApicIntIn;\r | |
206 | } EFI_LEGACY_MP_TABLE_ENTRY_LOCAL_INT;\r | |
207 | \r | |
208 | typedef enum {\r | |
209 | EfiLegacyMpTableEntryLocalIntTypeInt = 0,\r | |
210 | EfiLegacyMpTableEntryLocalIntTypeNmi = 1,\r | |
211 | EfiLegacyMpTableEntryLocalIntTypeSmi = 2,\r | |
212 | EfiLegacyMpTableEntryLocalIntTypeExtInt = 3,\r | |
213 | } EFI_LEGACY_MP_TABLE_ENTRY_LOCAL_INT_TYPE;\r | |
214 | \r | |
215 | typedef enum {\r | |
216 | EfiLegacyMpTableEntryLocalIntFlagsPolaritySpec = 0x0,\r | |
217 | EfiLegacyMpTableEntryLocalIntFlagsPolarityActiveHigh= 0x1,\r | |
218 | EfiLegacyMpTableEntryLocalIntFlagsPolarityReserved = 0x2,\r | |
219 | EfiLegacyMpTableEntryLocalIntFlagsPolarityActiveLow = 0x3,\r | |
220 | } EFI_LEGACY_MP_TABLE_ENTRY_LOCAL_INT_FLAGS_POLARITY;\r | |
221 | \r | |
222 | typedef enum {\r | |
223 | EfiLegacyMpTableEntryLocalIntFlagsTriggerSpec = 0x0,\r | |
224 | EfiLegacyMpTableEntryLocalIntFlagsTriggerEdge = 0x1,\r | |
225 | EfiLegacyMpTableEntryLocalIntFlagsTriggerReserved = 0x2,\r | |
226 | EfiLegacyMpTableEntryLocalIntFlagsTriggerLevel = 0x3,\r | |
227 | } EFI_LEGACY_MP_TABLE_ENTRY_LOCAL_INT_FLAGS_TRIGGER;\r | |
228 | \r | |
229 | //\r | |
230 | // Entry Type 128: System Address Space Mapping.\r | |
231 | //\r | |
232 | #define EFI_LEGACY_MP_TABLE_ENTRY_EXT_TYPE_SYS_ADDR_SPACE_MAPPING 0x80\r | |
233 | typedef struct {\r | |
234 | UINT8 EntryType;\r | |
235 | UINT8 Length;\r | |
236 | UINT8 BusId;\r | |
237 | UINT8 AddressType;\r | |
238 | UINT64 AddressBase;\r | |
239 | UINT64 AddressLength;\r | |
240 | } EFI_LEGACY_MP_TABLE_ENTRY_EXT_SYS_ADDR_SPACE_MAPPING;\r | |
241 | \r | |
242 | typedef enum {\r | |
243 | EfiLegacyMpTableEntryExtSysAddrSpaceMappingIo = 0,\r | |
244 | EfiLegacyMpTableEntryExtSysAddrSpaceMappingMemory = 1,\r | |
245 | EfiLegacyMpTableEntryExtSysAddrSpaceMappingPrefetch = 2,\r | |
246 | } EFI_LEGACY_MP_TABLE_ENTRY_EXT_SYS_ADDR_SPACE_MAPPING_TYPE;\r | |
247 | \r | |
248 | //\r | |
249 | // Entry Type 129: Bus Hierarchy.\r | |
250 | //\r | |
251 | #define EFI_LEGACY_MP_TABLE_ENTRY_EXT_TYPE_BUS_HIERARCHY 0x81\r | |
252 | typedef struct {\r | |
253 | UINT8 EntryType;\r | |
254 | UINT8 Length;\r | |
255 | UINT8 BusId;\r | |
256 | struct {\r | |
257 | UINT8 SubtractiveDecode : 1;\r | |
258 | UINT8 Reserved : 7;\r | |
259 | } BusInfo;\r | |
260 | UINT8 ParentBus;\r | |
261 | UINT8 Reserved1;\r | |
262 | UINT8 Reserved2;\r | |
263 | UINT8 Reserved3;\r | |
264 | } EFI_LEGACY_MP_TABLE_ENTRY_EXT_BUS_HIERARCHY;\r | |
265 | \r | |
266 | //\r | |
267 | // Entry Type 130: Compatibility Bus Address Space Modifier.\r | |
268 | //\r | |
269 | #define EFI_LEGACY_MP_TABLE_ENTRY_EXT_TYPE_COMPAT_BUS_ADDR_SPACE_MODIFIER 0x82\r | |
270 | typedef struct {\r | |
271 | UINT8 EntryType;\r | |
272 | UINT8 Length;\r | |
273 | UINT8 BusId;\r | |
274 | struct {\r | |
275 | UINT8 RangeMode : 1;\r | |
276 | UINT8 Reserved : 7;\r | |
277 | } AddrMode;\r | |
278 | UINT32 PredefinedRangeList;\r | |
279 | } EFI_LEGACY_MP_TABLE_ENTRY_EXT_COMPAT_BUS_ADDR_SPACE_MODIFIER;\r | |
280 | \r | |
88b6bcec | 281 | #pragma pack()\r |
3eb9473e | 282 | \r |
283 | #endif\r |