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3eb9473e | 1 | /*++\r |
2 | \r | |
2c7e5c2f HT |
3 | Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR>\r |
4 | This program and the accompanying materials \r | |
3eb9473e | 5 | are licensed and made available under the terms and conditions of the BSD License \r |
6 | which accompanies this distribution. The full text of the license may be found at \r | |
7 | http://opensource.org/licenses/bsd-license.php \r | |
8 | \r | |
9 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r | |
10 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r | |
11 | \r | |
12 | \r | |
13 | Module Name:\r | |
14 | \r | |
15 | PeCoffLoaderEx.c\r | |
16 | \r | |
17 | Abstract: \r | |
18 | \r | |
19 | IA-32 Specific relocation fixups.\r | |
20 | \r | |
21 | --*/\r | |
22 | \r | |
23 | #include "BasePeCoffLibInternals.h"\r | |
24 | \r | |
25 | #define EFI_IMAGE_MACHINE_IPF EFI_IMAGE_MACHINE_IA64\r | |
26 | \r | |
27 | #define EXT_IMM64(Value, Address, Size, InstPos, ValPos) \\r | |
28 | Value |= (((UINT64)((*(Address) >> InstPos) & (((UINT64)1 << Size) - 1))) << ValPos)\r | |
29 | \r | |
30 | #define INS_IMM64(Value, Address, Size, InstPos, ValPos) \\r | |
31 | *(UINT32*)Address = (*(UINT32*)Address & ~(((1 << Size) - 1) << InstPos)) | \\r | |
32 | ((UINT32)((((UINT64)Value >> ValPos) & (((UINT64)1 << Size) - 1))) << InstPos)\r | |
33 | \r | |
34 | #define IMM64_IMM7B_INST_WORD_X 3\r | |
35 | #define IMM64_IMM7B_SIZE_X 7\r | |
36 | #define IMM64_IMM7B_INST_WORD_POS_X 4\r | |
37 | #define IMM64_IMM7B_VAL_POS_X 0\r | |
38 | \r | |
39 | #define IMM64_IMM9D_INST_WORD_X 3\r | |
40 | #define IMM64_IMM9D_SIZE_X 9\r | |
41 | #define IMM64_IMM9D_INST_WORD_POS_X 18\r | |
42 | #define IMM64_IMM9D_VAL_POS_X 7\r | |
43 | \r | |
44 | #define IMM64_IMM5C_INST_WORD_X 3\r | |
45 | #define IMM64_IMM5C_SIZE_X 5\r | |
46 | #define IMM64_IMM5C_INST_WORD_POS_X 13\r | |
47 | #define IMM64_IMM5C_VAL_POS_X 16\r | |
48 | \r | |
49 | #define IMM64_IC_INST_WORD_X 3\r | |
50 | #define IMM64_IC_SIZE_X 1\r | |
51 | #define IMM64_IC_INST_WORD_POS_X 12\r | |
52 | #define IMM64_IC_VAL_POS_X 21\r | |
53 | \r | |
54 | #define IMM64_IMM41a_INST_WORD_X 1\r | |
55 | #define IMM64_IMM41a_SIZE_X 10\r | |
56 | #define IMM64_IMM41a_INST_WORD_POS_X 14\r | |
57 | #define IMM64_IMM41a_VAL_POS_X 22\r | |
58 | \r | |
59 | #define IMM64_IMM41b_INST_WORD_X 1\r | |
60 | #define IMM64_IMM41b_SIZE_X 8\r | |
61 | #define IMM64_IMM41b_INST_WORD_POS_X 24\r | |
62 | #define IMM64_IMM41b_VAL_POS_X 32\r | |
63 | \r | |
64 | #define IMM64_IMM41c_INST_WORD_X 2\r | |
65 | #define IMM64_IMM41c_SIZE_X 23\r | |
66 | #define IMM64_IMM41c_INST_WORD_POS_X 0\r | |
67 | #define IMM64_IMM41c_VAL_POS_X 40\r | |
68 | \r | |
69 | #define IMM64_SIGN_INST_WORD_X 3\r | |
70 | #define IMM64_SIGN_SIZE_X 1\r | |
71 | #define IMM64_SIGN_INST_WORD_POS_X 27\r | |
72 | #define IMM64_SIGN_VAL_POS_X 63\r | |
73 | \r | |
74 | /**\r | |
75 | Performs an Itanium-based specific relocation fixup.\r | |
76 | \r | |
77 | @param Reloc Pointer to the relocation record.\r | |
78 | @param Fixup Pointer to the address to fix up.\r | |
79 | @param FixupData Pointer to a buffer to log the fixups.\r | |
80 | @param Adjust The offset to adjust the fixup.\r | |
81 | \r | |
82 | @return Status code.\r | |
83 | \r | |
84 | **/\r | |
85 | RETURN_STATUS\r | |
86 | GluePeCoffLoaderRelocateImageEx (\r | |
87 | IN UINT16 *Reloc,\r | |
88 | IN OUT CHAR8 *Fixup,\r | |
89 | IN OUT CHAR8 **FixupData,\r | |
90 | IN UINT64 Adjust\r | |
91 | )\r | |
92 | {\r | |
93 | UINT64 *F64;\r | |
94 | UINT64 FixupVal;\r | |
95 | \r | |
96 | switch ((*Reloc) >> 12) {\r | |
97 | case EFI_IMAGE_REL_BASED_IA64_IMM64:\r | |
98 | \r | |
99 | //\r | |
100 | // Align it to bundle address before fixing up the\r | |
101 | // 64-bit immediate value of the movl instruction.\r | |
102 | //\r | |
103 | \r | |
104 | Fixup = (CHAR8 *)((UINTN) Fixup & (UINTN) ~(15));\r | |
105 | FixupVal = (UINT64)0;\r | |
106 | \r | |
107 | //\r | |
108 | // Extract the lower 32 bits of IMM64 from bundle\r | |
109 | //\r | |
110 | EXT_IMM64(FixupVal,\r | |
111 | (UINT32 *)Fixup + IMM64_IMM7B_INST_WORD_X,\r | |
112 | IMM64_IMM7B_SIZE_X,\r | |
113 | IMM64_IMM7B_INST_WORD_POS_X,\r | |
114 | IMM64_IMM7B_VAL_POS_X\r | |
115 | );\r | |
116 | \r | |
117 | EXT_IMM64(FixupVal,\r | |
118 | (UINT32 *)Fixup + IMM64_IMM9D_INST_WORD_X,\r | |
119 | IMM64_IMM9D_SIZE_X,\r | |
120 | IMM64_IMM9D_INST_WORD_POS_X,\r | |
121 | IMM64_IMM9D_VAL_POS_X\r | |
122 | );\r | |
123 | \r | |
124 | EXT_IMM64(FixupVal,\r | |
125 | (UINT32 *)Fixup + IMM64_IMM5C_INST_WORD_X,\r | |
126 | IMM64_IMM5C_SIZE_X,\r | |
127 | IMM64_IMM5C_INST_WORD_POS_X,\r | |
128 | IMM64_IMM5C_VAL_POS_X\r | |
129 | );\r | |
130 | \r | |
131 | EXT_IMM64(FixupVal,\r | |
132 | (UINT32 *)Fixup + IMM64_IC_INST_WORD_X,\r | |
133 | IMM64_IC_SIZE_X,\r | |
134 | IMM64_IC_INST_WORD_POS_X,\r | |
135 | IMM64_IC_VAL_POS_X\r | |
136 | );\r | |
137 | \r | |
138 | EXT_IMM64(FixupVal,\r | |
139 | (UINT32 *)Fixup + IMM64_IMM41a_INST_WORD_X,\r | |
140 | IMM64_IMM41a_SIZE_X,\r | |
141 | IMM64_IMM41a_INST_WORD_POS_X,\r | |
142 | IMM64_IMM41a_VAL_POS_X\r | |
143 | );\r | |
144 | \r | |
145 | //\r | |
146 | // Update 64-bit address\r | |
147 | //\r | |
148 | FixupVal += Adjust;\r | |
149 | \r | |
150 | //\r | |
151 | // Insert IMM64 into bundle\r | |
152 | //\r | |
153 | INS_IMM64(FixupVal,\r | |
154 | ((UINT32 *)Fixup + IMM64_IMM7B_INST_WORD_X),\r | |
155 | IMM64_IMM7B_SIZE_X,\r | |
156 | IMM64_IMM7B_INST_WORD_POS_X,\r | |
157 | IMM64_IMM7B_VAL_POS_X\r | |
158 | );\r | |
159 | \r | |
160 | INS_IMM64(FixupVal,\r | |
161 | ((UINT32 *)Fixup + IMM64_IMM9D_INST_WORD_X),\r | |
162 | IMM64_IMM9D_SIZE_X,\r | |
163 | IMM64_IMM9D_INST_WORD_POS_X,\r | |
164 | IMM64_IMM9D_VAL_POS_X\r | |
165 | );\r | |
166 | \r | |
167 | INS_IMM64(FixupVal,\r | |
168 | ((UINT32 *)Fixup + IMM64_IMM5C_INST_WORD_X),\r | |
169 | IMM64_IMM5C_SIZE_X,\r | |
170 | IMM64_IMM5C_INST_WORD_POS_X,\r | |
171 | IMM64_IMM5C_VAL_POS_X\r | |
172 | );\r | |
173 | \r | |
174 | INS_IMM64(FixupVal,\r | |
175 | ((UINT32 *)Fixup + IMM64_IC_INST_WORD_X),\r | |
176 | IMM64_IC_SIZE_X,\r | |
177 | IMM64_IC_INST_WORD_POS_X,\r | |
178 | IMM64_IC_VAL_POS_X\r | |
179 | );\r | |
180 | \r | |
181 | INS_IMM64(FixupVal,\r | |
182 | ((UINT32 *)Fixup + IMM64_IMM41a_INST_WORD_X),\r | |
183 | IMM64_IMM41a_SIZE_X,\r | |
184 | IMM64_IMM41a_INST_WORD_POS_X,\r | |
185 | IMM64_IMM41a_VAL_POS_X\r | |
186 | );\r | |
187 | \r | |
188 | INS_IMM64(FixupVal,\r | |
189 | ((UINT32 *)Fixup + IMM64_IMM41b_INST_WORD_X),\r | |
190 | IMM64_IMM41b_SIZE_X,\r | |
191 | IMM64_IMM41b_INST_WORD_POS_X,\r | |
192 | IMM64_IMM41b_VAL_POS_X\r | |
193 | );\r | |
194 | \r | |
195 | INS_IMM64(FixupVal,\r | |
196 | ((UINT32 *)Fixup + IMM64_IMM41c_INST_WORD_X),\r | |
197 | IMM64_IMM41c_SIZE_X,\r | |
198 | IMM64_IMM41c_INST_WORD_POS_X,\r | |
199 | IMM64_IMM41c_VAL_POS_X\r | |
200 | );\r | |
201 | \r | |
202 | INS_IMM64(FixupVal,\r | |
203 | ((UINT32 *)Fixup + IMM64_SIGN_INST_WORD_X),\r | |
204 | IMM64_SIGN_SIZE_X,\r | |
205 | IMM64_SIGN_INST_WORD_POS_X,\r | |
206 | IMM64_SIGN_VAL_POS_X\r | |
207 | );\r | |
208 | \r | |
209 | F64 = (UINT64 *) Fixup;\r | |
210 | if (*FixupData != NULL) {\r | |
211 | *FixupData = ALIGN_POINTER(*FixupData, sizeof(UINT64));\r | |
212 | *(UINT64 *)(*FixupData) = *F64;\r | |
213 | *FixupData = *FixupData + sizeof(UINT64);\r | |
214 | }\r | |
215 | break;\r | |
216 | \r | |
217 | default:\r | |
218 | return RETURN_UNSUPPORTED;\r | |
219 | }\r | |
220 | \r | |
221 | return RETURN_SUCCESS;\r | |
222 | }\r | |
223 | \r | |
224 | /**\r | |
225 | Returns TRUE if the machine type of PE/COFF image is supported. Supported\r | |
226 | does not mean the image can be executed it means the PE/COFF loader supports\r | |
227 | loading and relocating of the image type. It's up to the caller to support\r | |
228 | the entry point.\r | |
229 | \r | |
230 | This function implies the basic PE/COFF loader/relocator supports IA32, EBC,\r | |
231 | & X64 images. Calling the entry point in a correct mannor is up to the\r | |
232 | consumer of this library. This version also supports the special relocations\r | |
233 | for Itanium.\r | |
234 | \r | |
235 | @param Machine Machine type from the PE Header.\r | |
236 | \r | |
237 | @return TRUE if this PE/COFF loader can load the image\r | |
238 | \r | |
239 | **/\r | |
240 | BOOLEAN\r | |
241 | PeCoffLoaderImageFormatSupported (\r | |
242 | IN UINT16 Machine\r | |
243 | )\r | |
244 | {\r | |
245 | if ((Machine == EFI_IMAGE_MACHINE_IPF) || (Machine == EFI_IMAGE_MACHINE_IA32) ||\r | |
246 | (Machine == EFI_IMAGE_MACHINE_EBC) || (Machine == EFI_IMAGE_MACHINE_X64)) {\r | |
247 | return TRUE;\r | |
248 | }\r | |
249 | \r | |
250 | return FALSE;\r | |
251 | }\r | |
252 | \r | |
253 | \r | |
254 | /**\r | |
255 | ImageRead function that operates on a memory buffer whos base is passed into\r | |
256 | FileHandle.\r | |
257 | \r | |
258 | @param Reloc Ponter to baes of the input stream\r | |
259 | @param Fixup Offset to the start of the buffer\r | |
260 | @param FixupData Number of bytes to copy into the buffer\r | |
261 | @param Adjust Location to place results of read\r | |
262 | \r | |
263 | @retval RETURN_SUCCESS Data is read from FileOffset from the Handle into\r | |
264 | the buffer.\r | |
265 | **/\r | |
266 | RETURN_STATUS\r | |
267 | GluePeHotRelocateImageEx (\r | |
268 | IN UINT16 *Reloc,\r | |
269 | IN OUT CHAR8 *Fixup,\r | |
270 | IN OUT CHAR8 **FixupData,\r | |
271 | IN UINT64 Adjust\r | |
272 | )\r | |
273 | {\r | |
274 | UINT64 *F64;\r | |
275 | UINT64 FixupVal;\r | |
276 | \r | |
277 | switch ((*Reloc) >> 12) {\r | |
278 | case EFI_IMAGE_REL_BASED_DIR64:\r | |
279 | F64 = (UINT64 *) Fixup;\r | |
280 | *FixupData = ALIGN_POINTER (*FixupData, sizeof (UINT64));\r | |
281 | if (*(UINT64 *) (*FixupData) == *F64) {\r | |
282 | *F64 = *F64 + (UINT64) Adjust;\r | |
283 | }\r | |
284 | \r | |
285 | *FixupData = *FixupData + sizeof (UINT64);\r | |
286 | break;\r | |
287 | \r | |
288 | case EFI_IMAGE_REL_BASED_IA64_IMM64:\r | |
289 | F64 = (UINT64 *) Fixup;\r | |
290 | *FixupData = ALIGN_POINTER (*FixupData, sizeof (UINT64));\r | |
291 | if (*(UINT64 *) (*FixupData) == *F64) {\r | |
292 | //\r | |
293 | // Align it to bundle address before fixing up the\r | |
294 | // 64-bit immediate value of the movl instruction.\r | |
295 | //\r | |
296 | //\r | |
297 | Fixup = (CHAR8 *) ((UINT64) Fixup & (UINT64)~(15));\r | |
298 | FixupVal = (UINT64) 0;\r | |
299 | \r | |
300 | //\r | |
301 | // Extract the lower 32 bits of IMM64 from bundle\r | |
302 | //\r | |
303 | EXT_IMM64 (\r | |
304 | FixupVal,\r | |
305 | (UINT32 *) Fixup + IMM64_IMM7B_INST_WORD_X,\r | |
306 | IMM64_IMM7B_SIZE_X,\r | |
307 | IMM64_IMM7B_INST_WORD_POS_X,\r | |
308 | IMM64_IMM7B_VAL_POS_X\r | |
309 | );\r | |
310 | \r | |
311 | EXT_IMM64 (\r | |
312 | FixupVal,\r | |
313 | (UINT32 *) Fixup + IMM64_IMM9D_INST_WORD_X,\r | |
314 | IMM64_IMM9D_SIZE_X,\r | |
315 | IMM64_IMM9D_INST_WORD_POS_X,\r | |
316 | IMM64_IMM9D_VAL_POS_X\r | |
317 | );\r | |
318 | \r | |
319 | EXT_IMM64 (\r | |
320 | FixupVal,\r | |
321 | (UINT32 *) Fixup + IMM64_IMM5C_INST_WORD_X,\r | |
322 | IMM64_IMM5C_SIZE_X,\r | |
323 | IMM64_IMM5C_INST_WORD_POS_X,\r | |
324 | IMM64_IMM5C_VAL_POS_X\r | |
325 | );\r | |
326 | \r | |
327 | EXT_IMM64 (\r | |
328 | FixupVal,\r | |
329 | (UINT32 *) Fixup + IMM64_IC_INST_WORD_X,\r | |
330 | IMM64_IC_SIZE_X,\r | |
331 | IMM64_IC_INST_WORD_POS_X,\r | |
332 | IMM64_IC_VAL_POS_X\r | |
333 | );\r | |
334 | \r | |
335 | EXT_IMM64 (\r | |
336 | FixupVal,\r | |
337 | (UINT32 *) Fixup + IMM64_IMM41a_INST_WORD_X,\r | |
338 | IMM64_IMM41a_SIZE_X,\r | |
339 | IMM64_IMM41a_INST_WORD_POS_X,\r | |
340 | IMM64_IMM41a_VAL_POS_X\r | |
341 | );\r | |
342 | \r | |
343 | //\r | |
344 | // Update 64-bit address\r | |
345 | //\r | |
346 | FixupVal += Adjust;\r | |
347 | \r | |
348 | //\r | |
349 | // Insert IMM64 into bundle\r | |
350 | //\r | |
351 | INS_IMM64 (\r | |
352 | FixupVal,\r | |
353 | ((UINT32 *) Fixup + IMM64_IMM7B_INST_WORD_X),\r | |
354 | IMM64_IMM7B_SIZE_X,\r | |
355 | IMM64_IMM7B_INST_WORD_POS_X,\r | |
356 | IMM64_IMM7B_VAL_POS_X\r | |
357 | );\r | |
358 | \r | |
359 | INS_IMM64 (\r | |
360 | FixupVal,\r | |
361 | ((UINT32 *) Fixup + IMM64_IMM9D_INST_WORD_X),\r | |
362 | IMM64_IMM9D_SIZE_X,\r | |
363 | IMM64_IMM9D_INST_WORD_POS_X,\r | |
364 | IMM64_IMM9D_VAL_POS_X\r | |
365 | );\r | |
366 | \r | |
367 | INS_IMM64 (\r | |
368 | FixupVal,\r | |
369 | ((UINT32 *) Fixup + IMM64_IMM5C_INST_WORD_X),\r | |
370 | IMM64_IMM5C_SIZE_X,\r | |
371 | IMM64_IMM5C_INST_WORD_POS_X,\r | |
372 | IMM64_IMM5C_VAL_POS_X\r | |
373 | );\r | |
374 | \r | |
375 | INS_IMM64 (\r | |
376 | FixupVal,\r | |
377 | ((UINT32 *) Fixup + IMM64_IC_INST_WORD_X),\r | |
378 | IMM64_IC_SIZE_X,\r | |
379 | IMM64_IC_INST_WORD_POS_X,\r | |
380 | IMM64_IC_VAL_POS_X\r | |
381 | );\r | |
382 | \r | |
383 | INS_IMM64 (\r | |
384 | FixupVal,\r | |
385 | ((UINT32 *) Fixup + IMM64_IMM41a_INST_WORD_X),\r | |
386 | IMM64_IMM41a_SIZE_X,\r | |
387 | IMM64_IMM41a_INST_WORD_POS_X,\r | |
388 | IMM64_IMM41a_VAL_POS_X\r | |
389 | );\r | |
390 | \r | |
391 | INS_IMM64 (\r | |
392 | FixupVal,\r | |
393 | ((UINT32 *) Fixup + IMM64_IMM41b_INST_WORD_X),\r | |
394 | IMM64_IMM41b_SIZE_X,\r | |
395 | IMM64_IMM41b_INST_WORD_POS_X,\r | |
396 | IMM64_IMM41b_VAL_POS_X\r | |
397 | );\r | |
398 | \r | |
399 | INS_IMM64 (\r | |
400 | FixupVal,\r | |
401 | ((UINT32 *) Fixup + IMM64_IMM41c_INST_WORD_X),\r | |
402 | IMM64_IMM41c_SIZE_X,\r | |
403 | IMM64_IMM41c_INST_WORD_POS_X,\r | |
404 | IMM64_IMM41c_VAL_POS_X\r | |
405 | );\r | |
406 | \r | |
407 | INS_IMM64 (\r | |
408 | FixupVal,\r | |
409 | ((UINT32 *) Fixup + IMM64_SIGN_INST_WORD_X),\r | |
410 | IMM64_SIGN_SIZE_X,\r | |
411 | IMM64_SIGN_INST_WORD_POS_X,\r | |
412 | IMM64_SIGN_VAL_POS_X\r | |
413 | );\r | |
414 | \r | |
415 | *(UINT64 *) (*FixupData) = *F64;\r | |
416 | }\r | |
417 | \r | |
418 | *FixupData = *FixupData + sizeof (UINT64);\r | |
419 | break;\r | |
420 | \r | |
421 | default:\r | |
422 | DEBUG ((EFI_D_ERROR, "PeHotRelocateEx:unknown fixed type\n"));\r | |
423 | return RETURN_UNSUPPORTED;\r | |
424 | }\r | |
425 | \r | |
426 | return RETURN_SUCCESS;\r | |
427 | }\r | |
428 | \r | |
429 | \r | |
430 | \r |