]>
Commit | Line | Data |
---|---|---|
3eb9473e | 1 | /*++\r |
2 | \r | |
3e99020d | 3 | Copyright (c) 2004 - 2010, Intel Corporation. All rights reserved.<BR>\r |
4ea9375a | 4 | This program and the accompanying materials \r |
3eb9473e | 5 | are licensed and made available under the terms and conditions of the BSD License \r |
6 | which accompanies this distribution. The full text of the license may be found at \r | |
7 | http://opensource.org/licenses/bsd-license.php \r | |
8 | \r | |
9 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r | |
10 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r | |
11 | \r | |
12 | Module Name:\r | |
13 | \r | |
14 | misc.c\r | |
15 | \r | |
16 | Abstract:\r | |
17 | \r | |
18 | --*/\r | |
19 | \r | |
20 | #include "Tiano.h"\r | |
21 | #include "pei.h"\r | |
22 | #include "cpuio.h"\r | |
3e99020d LG |
23 | #include EFI_PPI_CONSUMER (PciCfg)\r |
24 | #include EFI_PPI_CONSUMER (PciCfg2)\r | |
3eb9473e | 25 | #include EFI_PROTOCOL_CONSUMER (PciRootBridgeIo)\r |
26 | \r | |
27 | //\r | |
28 | // Modular variable used by common libiary in PEI phase\r | |
29 | //\r | |
30 | EFI_GUID mPeiCpuIoPpiGuid = PEI_CPU_IO_PPI_GUID;\r | |
31 | #if (PI_SPECIFICATION_VERSION < 0x00010000)\r | |
32 | EFI_GUID mPeiPciCfgPpiGuid = PEI_PCI_CFG_PPI_GUID;\r | |
33 | PEI_PCI_CFG_PPI *PciCfgPpi = NULL;\r | |
34 | #else\r | |
35 | EFI_GUID mPeiPciCfgPpiGuid = EFI_PEI_PCI_CFG2_PPI_GUID;\r | |
36 | EFI_PEI_PCI_CFG2_PPI *PciCfgPpi = NULL;\r | |
37 | #endif\r | |
38 | EFI_PEI_SERVICES **mPeiServices = NULL;\r | |
39 | PEI_CPU_IO_PPI *CpuIoPpi = NULL;\r | |
40 | \r | |
41 | //\r | |
42 | // Modular variable used by common libiary in DXE phase\r | |
43 | //\r | |
44 | EFI_SYSTEM_TABLE *mST = NULL;\r | |
45 | EFI_BOOT_SERVICES *mBS = NULL;\r | |
46 | EFI_RUNTIME_SERVICES *mRT = NULL;\r | |
47 | \r | |
48 | EFI_STATUS\r | |
49 | EfiInitializeCommonDriverLib (\r | |
50 | IN EFI_HANDLE ImageHandle,\r | |
51 | IN VOID *SystemTable\r | |
52 | )\r | |
53 | /*++\r | |
54 | \r | |
55 | Routine Description:\r | |
56 | \r | |
57 | Initialize lib function calling phase: PEI or DXE\r | |
58 | \r | |
59 | Arguments:\r | |
60 | \r | |
61 | ImageHandle - The firmware allocated handle for the EFI image.\r | |
62 | \r | |
63 | SystemTable - A pointer to the EFI System Table.\r | |
64 | \r | |
65 | Returns: \r | |
66 | \r | |
67 | EFI_STATUS always returns EFI_SUCCESS\r | |
68 | \r | |
69 | --*/\r | |
70 | {\r | |
3eb9473e | 71 | mPeiServices = NULL;\r |
72 | CpuIoPpi = NULL;\r | |
73 | PciCfgPpi = NULL;\r | |
74 | \r | |
75 | if (ImageHandle == NULL) {\r | |
76 | //\r | |
77 | // The function is called in PEI phase, use PEI interfaces\r | |
78 | //\r | |
79 | mPeiServices = (EFI_PEI_SERVICES **) SystemTable;\r | |
80 | ASSERT (mPeiServices == NULL);\r | |
81 | \r | |
82 | CpuIoPpi = (**mPeiServices).CpuIo;\r | |
83 | PciCfgPpi = (**mPeiServices).PciCfg;\r | |
84 | \r | |
85 | } else {\r | |
86 | //\r | |
87 | // ImageHandle is not NULL. The function is called in DXE phase\r | |
88 | //\r | |
89 | mST = SystemTable;\r | |
90 | ASSERT (mST != NULL);\r | |
91 | \r | |
92 | mBS = mST->BootServices;\r | |
93 | mRT = mST->RuntimeServices;\r | |
94 | ASSERT (mBS != NULL);\r | |
95 | ASSERT (mRT != NULL);\r | |
96 | \r | |
97 | //\r | |
98 | // Should be at EFI_D_INFO, but lets us know things are running\r | |
99 | //\r | |
100 | DEBUG ((EFI_D_INFO, "EfiInitializeCommonDriverLib: Started in DXE\n"));\r | |
101 | return EFI_SUCCESS;\r | |
102 | }\r | |
103 | \r | |
104 | return EFI_SUCCESS;\r | |
105 | }\r | |
106 | \r | |
107 | \r | |
108 | EFI_STATUS\r | |
109 | EfiCommonIoWrite (\r | |
110 | IN UINT8 Width,\r | |
111 | IN UINTN Address,\r | |
112 | IN UINTN Count,\r | |
113 | IN OUT VOID *Buffer\r | |
114 | )\r | |
115 | /*++\r | |
116 | \r | |
117 | Routine Description:\r | |
118 | \r | |
119 | Io write operation.\r | |
120 | \r | |
121 | Arguments:\r | |
122 | \r | |
123 | Width - Width of write operation\r | |
124 | Address - Start IO address to write\r | |
125 | Count - Write count\r | |
126 | Buffer - Buffer to write to the address\r | |
127 | \r | |
128 | Returns: \r | |
129 | \r | |
130 | Status code\r | |
131 | \r | |
132 | --*/\r | |
133 | {\r | |
134 | EFI_STATUS Status;\r | |
135 | EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *RootBridgeIo;\r | |
136 | \r | |
3e99020d | 137 | if (mPeiServices != NULL) {\r |
3eb9473e | 138 | //\r |
139 | // The function is called in PEI phase, use PEI interfaces\r | |
140 | //\r | |
141 | Status = CpuIoPpi->Io.Write (\r | |
142 | mPeiServices,\r | |
143 | CpuIoPpi,\r | |
144 | Width,\r | |
145 | Address,\r | |
146 | Count,\r | |
147 | Buffer\r | |
148 | );\r | |
149 | } else {\r | |
150 | //\r | |
151 | // The function is called in DXE phase\r | |
152 | //\r | |
153 | Status = mBS->LocateProtocol (\r | |
154 | &gEfiPciRootBridgeIoProtocolGuid,\r | |
155 | NULL,\r | |
156 | (VOID **) &RootBridgeIo\r | |
157 | );\r | |
158 | if (EFI_ERROR (Status)) {\r | |
159 | return Status;\r | |
160 | }\r | |
161 | \r | |
162 | Status = RootBridgeIo->Io.Write (RootBridgeIo, Width, Address, Count, Buffer);\r | |
163 | }\r | |
164 | \r | |
165 | return Status;\r | |
166 | }\r | |
167 | \r | |
168 | \r | |
169 | EFI_STATUS\r | |
170 | EfiCommonIoRead (\r | |
171 | IN UINT8 Width,\r | |
172 | IN UINTN Address,\r | |
173 | IN UINTN Count,\r | |
174 | IN OUT VOID *Buffer\r | |
175 | )\r | |
176 | /*++\r | |
177 | \r | |
178 | Routine Description:\r | |
179 | \r | |
180 | Io read operation.\r | |
181 | \r | |
182 | Arguments:\r | |
183 | \r | |
184 | Width - Width of read operation\r | |
185 | Address - Start IO address to read\r | |
186 | Count - Read count\r | |
187 | Buffer - Buffer to store result\r | |
188 | \r | |
189 | Returns: \r | |
190 | \r | |
191 | Status code\r | |
192 | \r | |
193 | --*/\r | |
194 | {\r | |
195 | EFI_STATUS Status;\r | |
196 | EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *RootBridgeIo;\r | |
197 | \r | |
3e99020d | 198 | if (mPeiServices != NULL) {\r |
3eb9473e | 199 | //\r |
200 | // The function is called in PEI phase, use PEI interfaces\r | |
201 | //\r | |
202 | Status = CpuIoPpi->Io.Read (\r | |
203 | mPeiServices,\r | |
204 | CpuIoPpi,\r | |
205 | Width,\r | |
206 | Address,\r | |
207 | Count,\r | |
208 | Buffer\r | |
209 | );\r | |
210 | } else {\r | |
211 | //\r | |
212 | // The function is called in DXE phase\r | |
213 | //\r | |
214 | Status = mBS->LocateProtocol (\r | |
215 | &gEfiPciRootBridgeIoProtocolGuid,\r | |
216 | NULL,\r | |
217 | (VOID **) &RootBridgeIo\r | |
218 | );\r | |
219 | if (EFI_ERROR (Status)) {\r | |
220 | return Status;\r | |
221 | }\r | |
222 | \r | |
223 | Status = RootBridgeIo->Io.Read (RootBridgeIo, Width, Address, Count, Buffer);\r | |
224 | }\r | |
225 | \r | |
226 | return Status;\r | |
227 | }\r | |
228 | \r | |
229 | \r | |
230 | EFI_STATUS\r | |
231 | EfiCommonPciWrite (\r | |
232 | IN UINT8 Width,\r | |
233 | IN UINT64 Address,\r | |
234 | IN UINTN Count,\r | |
235 | IN OUT VOID *Buffer\r | |
236 | )\r | |
237 | /*++\r | |
238 | \r | |
239 | Routine Description:\r | |
240 | \r | |
241 | Pci write operation\r | |
242 | \r | |
243 | Arguments:\r | |
244 | \r | |
245 | Width - Width of PCI write\r | |
246 | Address - PCI address to write\r | |
247 | Count - Write count\r | |
248 | Buffer - Buffer to write to the address\r | |
249 | \r | |
250 | Returns: \r | |
251 | \r | |
252 | Status code\r | |
253 | \r | |
254 | --*/\r | |
255 | {\r | |
256 | EFI_STATUS Status;\r | |
257 | UINTN Index;\r | |
258 | UINT8 *Buffer8;\r | |
259 | EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *RootBridgeIo;\r | |
260 | \r | |
3e99020d | 261 | if (mPeiServices != NULL) {\r |
3eb9473e | 262 | //\r |
263 | // The function is called in PEI phase, use PEI interfaces\r | |
264 | //\r | |
265 | Buffer8 = Buffer;\r | |
266 | for (Index = 0; Index < Count; Index++) {\r | |
267 | Status = PciCfgPpi->Write (\r | |
268 | mPeiServices,\r | |
269 | PciCfgPpi,\r | |
270 | Width,\r | |
271 | Address,\r | |
272 | Buffer8\r | |
273 | );\r | |
274 | \r | |
275 | if (EFI_ERROR (Status)) {\r | |
276 | return Status;\r | |
277 | }\r | |
278 | \r | |
279 | Buffer8 += Width;\r | |
280 | }\r | |
281 | \r | |
282 | } else {\r | |
283 | //\r | |
284 | // The function is called in DXE phase\r | |
285 | //\r | |
286 | Status = mBS->LocateProtocol (\r | |
287 | &gEfiPciRootBridgeIoProtocolGuid,\r | |
288 | NULL,\r | |
289 | (VOID **) &RootBridgeIo\r | |
290 | );\r | |
291 | if (EFI_ERROR (Status)) {\r | |
292 | return Status;\r | |
293 | }\r | |
294 | \r | |
295 | Status = RootBridgeIo->Pci.Write (\r | |
296 | RootBridgeIo,\r | |
297 | Width,\r | |
298 | Address,\r | |
299 | Count,\r | |
300 | Buffer\r | |
301 | );\r | |
302 | }\r | |
303 | \r | |
304 | return EFI_SUCCESS;\r | |
305 | }\r | |
306 | \r | |
307 | EFI_STATUS\r | |
308 | EfiCommonPciRead (\r | |
309 | IN UINT8 Width,\r | |
310 | IN UINT64 Address,\r | |
311 | IN UINTN Count,\r | |
312 | IN OUT VOID *Buffer\r | |
313 | )\r | |
314 | /*++\r | |
315 | \r | |
316 | Routine Description:\r | |
317 | \r | |
318 | Pci read operation\r | |
319 | \r | |
320 | Arguments:\r | |
321 | \r | |
322 | Width - Width of PCI read\r | |
323 | Address - PCI address to read\r | |
324 | Count - Read count\r | |
325 | Buffer - Output buffer for the read\r | |
326 | \r | |
327 | Returns: \r | |
328 | \r | |
329 | Status code\r | |
330 | \r | |
331 | --*/\r | |
332 | {\r | |
333 | EFI_STATUS Status;\r | |
334 | UINTN Index;\r | |
335 | UINT8 *Buffer8;\r | |
336 | EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *RootBridgeIo;\r | |
337 | \r | |
5d36285d | 338 | if (mPeiServices != NULL) {\r |
3eb9473e | 339 | //\r |
340 | // The function is called in PEI phase, use PEI interfaces\r | |
341 | //\r | |
342 | Buffer8 = Buffer;\r | |
343 | for (Index = 0; Index < Count; Index++) {\r | |
344 | Status = PciCfgPpi->Read (\r | |
345 | mPeiServices,\r | |
346 | PciCfgPpi,\r | |
347 | Width,\r | |
348 | Address,\r | |
349 | Buffer8\r | |
350 | );\r | |
351 | \r | |
352 | if (EFI_ERROR (Status)) {\r | |
353 | return Status;\r | |
354 | }\r | |
355 | \r | |
356 | Buffer8 += Width;\r | |
357 | }\r | |
358 | \r | |
359 | } else {\r | |
360 | //\r | |
361 | // The function is called in DXE phase\r | |
362 | //\r | |
363 | Status = mBS->LocateProtocol (\r | |
364 | &gEfiPciRootBridgeIoProtocolGuid,\r | |
365 | NULL,\r | |
366 | (VOID **) &RootBridgeIo\r | |
367 | );\r | |
368 | if (EFI_ERROR (Status)) {\r | |
369 | return Status;\r | |
370 | }\r | |
371 | \r | |
372 | Status = RootBridgeIo->Pci.Read (\r | |
373 | RootBridgeIo,\r | |
374 | Width,\r | |
375 | Address,\r | |
376 | Count,\r | |
377 | Buffer\r | |
378 | );\r | |
379 | }\r | |
380 | \r | |
381 | return EFI_SUCCESS;\r | |
382 | }\r |