[mirror_edk2.git] / EdkCompatibilityPkg / Foundation / Library / Pei / PeiLib / Ipf / PeCoffLoaderEx.c

/*++\r
\r
Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR>\r
This program and the accompanying materials                          \r
are licensed and made available under the terms and conditions of the BSD License         \r
which accompanies this distribution.  The full text of the license may be found at        \r
http://opensource.org/licenses/bsd-license.php                                            \r
                                                                                          \r
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     \r
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             \r
\r
Module Name:\r
\r
    PeCoffLoaderEx.c\r
\r
Abstract:\r
\r
    Fixes Intel Itanium(TM) specific relocation types\r
\r
\r
Revision History\r
\r
--*/\r
\r
#include "TianoCommon.h"\r
#include "EfiImage.h"\r
\r
#define EXT_IMM64(Value, Address, Size, InstPos, ValPos)  \\r
    Value |= (((UINT64)((*(Address) >> InstPos) & (((UINT64)1 << Size) - 1))) << ValPos)\r
\r
#define INS_IMM64(Value, Address, Size, InstPos, ValPos)  \\r
    *(UINT32*)Address = (*(UINT32*)Address & ~(((1 << Size) - 1) << InstPos)) | \\r
          ((UINT32)((((UINT64)Value >> ValPos) & (((UINT64)1 << Size) - 1))) << InstPos)\r
\r
#define IMM64_IMM7B_INST_WORD_X         3  \r
#define IMM64_IMM7B_SIZE_X              7  \r
#define IMM64_IMM7B_INST_WORD_POS_X     4  \r
#define IMM64_IMM7B_VAL_POS_X           0  \r
\r
#define IMM64_IMM9D_INST_WORD_X         3  \r
#define IMM64_IMM9D_SIZE_X              9  \r
#define IMM64_IMM9D_INST_WORD_POS_X     18  \r
#define IMM64_IMM9D_VAL_POS_X           7  \r
\r
#define IMM64_IMM5C_INST_WORD_X         3  \r
#define IMM64_IMM5C_SIZE_X              5  \r
#define IMM64_IMM5C_INST_WORD_POS_X     13  \r
#define IMM64_IMM5C_VAL_POS_X           16  \r
\r
#define IMM64_IC_INST_WORD_X            3  \r
#define IMM64_IC_SIZE_X                 1  \r
#define IMM64_IC_INST_WORD_POS_X        12  \r
#define IMM64_IC_VAL_POS_X              21  \r
\r
#define IMM64_IMM41a_INST_WORD_X        1  \r
#define IMM64_IMM41a_SIZE_X             10  \r
#define IMM64_IMM41a_INST_WORD_POS_X    14  \r
#define IMM64_IMM41a_VAL_POS_X          22  \r
\r
#define IMM64_IMM41b_INST_WORD_X        1  \r
#define IMM64_IMM41b_SIZE_X             8  \r
#define IMM64_IMM41b_INST_WORD_POS_X    24  \r
#define IMM64_IMM41b_VAL_POS_X          32  \r
\r
#define IMM64_IMM41c_INST_WORD_X        2  \r
#define IMM64_IMM41c_SIZE_X             23  \r
#define IMM64_IMM41c_INST_WORD_POS_X    0  \r
#define IMM64_IMM41c_VAL_POS_X          40  \r
\r
#define IMM64_SIGN_INST_WORD_X          3  \r
#define IMM64_SIGN_SIZE_X               1  \r
#define IMM64_SIGN_INST_WORD_POS_X      27  \r
#define IMM64_SIGN_VAL_POS_X            63  \r
\r
EFI_STATUS\r
PeCoffLoaderRelocateImageEx (\r
  IN UINT16      *Reloc,\r
  IN OUT CHAR8   *Fixup, \r
  IN OUT CHAR8   **FixupData,\r
  IN UINT64      Adjust\r
  )\r
/*++\r
\r
Routine Description:\r
\r
  Performs an Itanium-based specific relocation fixup\r
\r
Arguments:\r
\r
  Reloc      - Pointer to the relocation record\r
\r
  Fixup      - Pointer to the address to fix up\r
\r
  FixupData  - Pointer to a buffer to log the fixups\r
\r
  Adjust     - The offset to adjust the fixup\r
\r
Returns:\r
\r
  Status code\r
\r
--*/\r
{\r
  UINT64      *F64;\r
  UINT64      FixupVal;\r
\r
  switch ((*Reloc) >> 12) {\r
\r
    case EFI_IMAGE_REL_BASED_IA64_IMM64:\r
\r
      //\r
      // Align it to bundle address before fixing up the\r
      // 64-bit immediate value of the movl instruction.\r
      //\r
\r
      Fixup = (CHAR8 *)((UINTN) Fixup & (UINTN) ~(15));\r
      FixupVal = (UINT64)0;\r
                       \r
      // \r
      // Extract the lower 32 bits of IMM64 from bundle\r
      //\r
      EXT_IMM64(FixupVal,\r
                (UINT32 *)Fixup + IMM64_IMM7B_INST_WORD_X,\r
                IMM64_IMM7B_SIZE_X,\r
                IMM64_IMM7B_INST_WORD_POS_X,\r
                IMM64_IMM7B_VAL_POS_X\r
                );\r
\r
      EXT_IMM64(FixupVal,\r
                (UINT32 *)Fixup + IMM64_IMM9D_INST_WORD_X,\r
                IMM64_IMM9D_SIZE_X,\r
                IMM64_IMM9D_INST_WORD_POS_X,\r
                IMM64_IMM9D_VAL_POS_X\r
                );\r
\r
      EXT_IMM64(FixupVal,\r
                (UINT32 *)Fixup + IMM64_IMM5C_INST_WORD_X,\r
                IMM64_IMM5C_SIZE_X,\r
                IMM64_IMM5C_INST_WORD_POS_X,\r
                IMM64_IMM5C_VAL_POS_X\r
                );\r
\r
      EXT_IMM64(FixupVal,\r
                (UINT32 *)Fixup + IMM64_IC_INST_WORD_X,\r
                IMM64_IC_SIZE_X,\r
                IMM64_IC_INST_WORD_POS_X,\r
                IMM64_IC_VAL_POS_X\r
                );\r
\r
      EXT_IMM64(FixupVal,\r
                (UINT32 *)Fixup + IMM64_IMM41a_INST_WORD_X,\r
                IMM64_IMM41a_SIZE_X,\r
                IMM64_IMM41a_INST_WORD_POS_X,\r
                IMM64_IMM41a_VAL_POS_X\r
                );\r
                       \r
      // \r
      // Update 64-bit address\r
      //\r
      FixupVal += Adjust;\r
\r
      // \r
      // Insert IMM64 into bundle\r
      //\r
      INS_IMM64(FixupVal,\r
                ((UINT32 *)Fixup + IMM64_IMM7B_INST_WORD_X),\r
                IMM64_IMM7B_SIZE_X,\r
                IMM64_IMM7B_INST_WORD_POS_X,\r
                IMM64_IMM7B_VAL_POS_X\r
                );\r
\r
      INS_IMM64(FixupVal,\r
                ((UINT32 *)Fixup + IMM64_IMM9D_INST_WORD_X),\r
                IMM64_IMM9D_SIZE_X,\r
                IMM64_IMM9D_INST_WORD_POS_X,\r
                IMM64_IMM9D_VAL_POS_X\r
                );\r
\r
      INS_IMM64(FixupVal,\r
                ((UINT32 *)Fixup + IMM64_IMM5C_INST_WORD_X),\r
                IMM64_IMM5C_SIZE_X,\r
                IMM64_IMM5C_INST_WORD_POS_X,\r
                IMM64_IMM5C_VAL_POS_X\r
                );\r
\r
      INS_IMM64(FixupVal,\r
                ((UINT32 *)Fixup + IMM64_IC_INST_WORD_X),\r
                IMM64_IC_SIZE_X,\r
                IMM64_IC_INST_WORD_POS_X,\r
                IMM64_IC_VAL_POS_X\r
                );\r
\r
      INS_IMM64(FixupVal,\r
                ((UINT32 *)Fixup + IMM64_IMM41a_INST_WORD_X),\r
                IMM64_IMM41a_SIZE_X,\r
                IMM64_IMM41a_INST_WORD_POS_X,\r
                IMM64_IMM41a_VAL_POS_X\r
                );\r
\r
      INS_IMM64(FixupVal,\r
                ((UINT32 *)Fixup + IMM64_IMM41b_INST_WORD_X),\r
                IMM64_IMM41b_SIZE_X,\r
                IMM64_IMM41b_INST_WORD_POS_X,\r
                IMM64_IMM41b_VAL_POS_X\r
                );\r
\r
      INS_IMM64(FixupVal,\r
                ((UINT32 *)Fixup + IMM64_IMM41c_INST_WORD_X),\r
                IMM64_IMM41c_SIZE_X,\r
                IMM64_IMM41c_INST_WORD_POS_X,\r
                IMM64_IMM41c_VAL_POS_X\r
                );\r
\r
      INS_IMM64(FixupVal,\r
                ((UINT32 *)Fixup + IMM64_SIGN_INST_WORD_X),\r
                IMM64_SIGN_SIZE_X,\r
                IMM64_SIGN_INST_WORD_POS_X,\r
                IMM64_SIGN_VAL_POS_X\r
                );\r
\r
      F64 = (UINT64 *) Fixup;\r
      if (*FixupData != NULL) {\r
        *FixupData = ALIGN_POINTER(*FixupData, sizeof(UINT64));\r
        *(UINT64 *)(*FixupData) = *F64;\r
        *FixupData = *FixupData + sizeof(UINT64);\r
      }\r
      break;\r
\r
    default:\r
      return EFI_UNSUPPORTED;\r
  }\r
\r
  return EFI_SUCCESS;\r
}\r
\r
BOOLEAN\r
PeCoffLoaderImageFormatSupported (\r
  IN  UINT16  Machine\r
  )\r
/*++\r
Routine Description:\r
\r
  Returns TRUE if the machine type of PE/COFF image is supported. Supported \r
  does not mean the image can be executed it means the PE/COFF loader supports\r
  loading and relocating of the image type. It's up to the caller to support\r
  the entry point. \r
\r
  This function implies the basic PE/COFF loader/relocator supports IPF, EBC,\r
  images. Calling the entry point in a correct mannor is up to the \r
  consumer of this library.\r
\r
Arguments:\r
\r
  Machine   - Machine type from the PE Header.\r
\r
Returns:\r
\r
  TRUE      - if this PE/COFF loader can load the image\r
  FALSE     - if this PE/COFF loader cannot load the image\r
\r
--*/\r
{\r
  if ((Machine == EFI_IMAGE_MACHINE_IA64) || (Machine == EFI_IMAGE_MACHINE_EBC)) {\r
    return TRUE; \r
  }\r
\r
  return FALSE;\r
}\r
Commit	Line	Data
3eb9473e	1	/*++\r
3eb9473e	2	\r
4ea9375a HT	3	Copyright (c) 2004 - 2006, Intel Corporation. All rights reserved.<BR>\r
4ea9375a HT	4	This program and the accompanying materials \r
3eb9473e	5	are licensed and made available under the terms and conditions of the BSD License \r
	6	which accompanies this distribution. The full text of the license may be found at \r
	7	http://opensource.org/licenses/bsd-license.php \r
	8	\r
	9	THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
	10	WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
	11	\r
	12	Module Name:\r
	13	\r
	14	PeCoffLoaderEx.c\r
	15	\r
	16	Abstract:\r
	17	\r
	18	Fixes Intel Itanium(TM) specific relocation types\r
	19	\r
	20	\r
	21	Revision History\r
	22	\r
	23	--*/\r
	24	\r
	25	#include "TianoCommon.h"\r
	26	#include "EfiImage.h"\r
	27	\r
	28	#define EXT_IMM64(Value, Address, Size, InstPos, ValPos) \\r
	29	Value \|= (((UINT64)((*(Address) >> InstPos) & (((UINT64)1 << Size) - 1))) << ValPos)\r
	30	\r
	31	#define INS_IMM64(Value, Address, Size, InstPos, ValPos) \\r
	32	(UINT32)Address = ((UINT32)Address & ~(((1 << Size) - 1) << InstPos)) \| \\r
	33	((UINT32)((((UINT64)Value >> ValPos) & (((UINT64)1 << Size) - 1))) << InstPos)\r
	34	\r
	35	#define IMM64_IMM7B_INST_WORD_X 3 \r
	36	#define IMM64_IMM7B_SIZE_X 7 \r
	37	#define IMM64_IMM7B_INST_WORD_POS_X 4 \r
	38	#define IMM64_IMM7B_VAL_POS_X 0 \r
	39	\r
	40	#define IMM64_IMM9D_INST_WORD_X 3 \r
	41	#define IMM64_IMM9D_SIZE_X 9 \r
	42	#define IMM64_IMM9D_INST_WORD_POS_X 18 \r
	43	#define IMM64_IMM9D_VAL_POS_X 7 \r
	44	\r
	45	#define IMM64_IMM5C_INST_WORD_X 3 \r
	46	#define IMM64_IMM5C_SIZE_X 5 \r
	47	#define IMM64_IMM5C_INST_WORD_POS_X 13 \r
	48	#define IMM64_IMM5C_VAL_POS_X 16 \r
	49	\r
	50	#define IMM64_IC_INST_WORD_X 3 \r
	51	#define IMM64_IC_SIZE_X 1 \r
	52	#define IMM64_IC_INST_WORD_POS_X 12 \r
	53	#define IMM64_IC_VAL_POS_X 21 \r
	54	\r
	55	#define IMM64_IMM41a_INST_WORD_X 1 \r
	56	#define IMM64_IMM41a_SIZE_X 10 \r
	57	#define IMM64_IMM41a_INST_WORD_POS_X 14 \r
	58	#define IMM64_IMM41a_VAL_POS_X 22 \r
	59	\r
	60	#define IMM64_IMM41b_INST_WORD_X 1 \r
	61	#define IMM64_IMM41b_SIZE_X 8 \r
	62	#define IMM64_IMM41b_INST_WORD_POS_X 24 \r
	63	#define IMM64_IMM41b_VAL_POS_X 32 \r
	64	\r
	65	#define IMM64_IMM41c_INST_WORD_X 2 \r
	66	#define IMM64_IMM41c_SIZE_X 23 \r
	67	#define IMM64_IMM41c_INST_WORD_POS_X 0 \r
	68	#define IMM64_IMM41c_VAL_POS_X 40 \r
69	\r
70	#define IMM64_SIGN_INST_WORD_X 3 \r
71	#define IMM64_SIGN_SIZE_X 1 \r
72	#define IMM64_SIGN_INST_WORD_POS_X 27 \r
73	#define IMM64_SIGN_VAL_POS_X 63 \r
74	\r
75	EFI_STATUS\r
76	PeCoffLoaderRelocateImageEx (\r
77	IN UINT16 *Reloc,\r
78	IN OUT CHAR8 *Fixup, \r
79	IN OUT CHAR8 **FixupData,\r
80	IN UINT64 Adjust\r
81	)\r
82	/*++\r
83	\r
84	Routine Description:\r
85	\r
86	Performs an Itanium-based specific relocation fixup\r
87	\r
88	Arguments:\r
89	\r
90	Reloc - Pointer to the relocation record\r
91	\r
92	Fixup - Pointer to the address to fix up\r
93	\r
94	FixupData - Pointer to a buffer to log the fixups\r
95	\r
96	Adjust - The offset to adjust the fixup\r
97	\r
98	Returns:\r
99	\r
100	Status code\r
101	\r
102	--*/\r
103	{\r
104	UINT64 *F64;\r
105	UINT64 FixupVal;\r
106	\r
107	switch ((*Reloc) >> 12) {\r
108	\r
109	case EFI_IMAGE_REL_BASED_IA64_IMM64:\r
110	\r
111	//\r
112	// Align it to bundle address before fixing up the\r
113	// 64-bit immediate value of the movl instruction.\r
114	//\r
115	\r
116	Fixup = (CHAR8 *)((UINTN) Fixup & (UINTN) ~(15));\r
117	FixupVal = (UINT64)0;\r
118	\r
119	// \r
120	// Extract the lower 32 bits of IMM64 from bundle\r
121	//\r
122	EXT_IMM64(FixupVal,\r
123	(UINT32 *)Fixup + IMM64_IMM7B_INST_WORD_X,\r
124	IMM64_IMM7B_SIZE_X,\r
125	IMM64_IMM7B_INST_WORD_POS_X,\r
126	IMM64_IMM7B_VAL_POS_X\r
127	);\r
128	\r
129	EXT_IMM64(FixupVal,\r
130	(UINT32 *)Fixup + IMM64_IMM9D_INST_WORD_X,\r
131	IMM64_IMM9D_SIZE_X,\r
132	IMM64_IMM9D_INST_WORD_POS_X,\r
133	IMM64_IMM9D_VAL_POS_X\r
134	);\r
135	\r
136	EXT_IMM64(FixupVal,\r
137	(UINT32 *)Fixup + IMM64_IMM5C_INST_WORD_X,\r
138	IMM64_IMM5C_SIZE_X,\r
139	IMM64_IMM5C_INST_WORD_POS_X,\r
140	IMM64_IMM5C_VAL_POS_X\r
141	);\r
142	\r
143	EXT_IMM64(FixupVal,\r
144	(UINT32 *)Fixup + IMM64_IC_INST_WORD_X,\r
145	IMM64_IC_SIZE_X,\r
146	IMM64_IC_INST_WORD_POS_X,\r
147	IMM64_IC_VAL_POS_X\r
148	);\r
149	\r
150	EXT_IMM64(FixupVal,\r
151	(UINT32 *)Fixup + IMM64_IMM41a_INST_WORD_X,\r
152	IMM64_IMM41a_SIZE_X,\r
153	IMM64_IMM41a_INST_WORD_POS_X,\r
154	IMM64_IMM41a_VAL_POS_X\r
155	);\r
156	\r
157	// \r
158	// Update 64-bit address\r
159	//\r
160	FixupVal += Adjust;\r
161	\r
162	// \r
163	// Insert IMM64 into bundle\r
164	//\r
165	INS_IMM64(FixupVal,\r
166	((UINT32 *)Fixup + IMM64_IMM7B_INST_WORD_X),\r
167	IMM64_IMM7B_SIZE_X,\r
168	IMM64_IMM7B_INST_WORD_POS_X,\r
169	IMM64_IMM7B_VAL_POS_X\r
170	);\r
171	\r
172	INS_IMM64(FixupVal,\r
173	((UINT32 *)Fixup + IMM64_IMM9D_INST_WORD_X),\r
174	IMM64_IMM9D_SIZE_X,\r
175	IMM64_IMM9D_INST_WORD_POS_X,\r
176	IMM64_IMM9D_VAL_POS_X\r
177	);\r
178	\r
179	INS_IMM64(FixupVal,\r
180	((UINT32 *)Fixup + IMM64_IMM5C_INST_WORD_X),\r
181	IMM64_IMM5C_SIZE_X,\r
182	IMM64_IMM5C_INST_WORD_POS_X,\r
183	IMM64_IMM5C_VAL_POS_X\r
184	);\r
185	\r
186	INS_IMM64(FixupVal,\r
187	((UINT32 *)Fixup + IMM64_IC_INST_WORD_X),\r
188	IMM64_IC_SIZE_X,\r
189	IMM64_IC_INST_WORD_POS_X,\r
190	IMM64_IC_VAL_POS_X\r
191	);\r
192	\r
193	INS_IMM64(FixupVal,\r
194	((UINT32 *)Fixup + IMM64_IMM41a_INST_WORD_X),\r
195	IMM64_IMM41a_SIZE_X,\r
196	IMM64_IMM41a_INST_WORD_POS_X,\r
197	IMM64_IMM41a_VAL_POS_X\r
198	);\r
199	\r
200	INS_IMM64(FixupVal,\r
201	((UINT32 *)Fixup + IMM64_IMM41b_INST_WORD_X),\r
202	IMM64_IMM41b_SIZE_X,\r
203	IMM64_IMM41b_INST_WORD_POS_X,\r
204	IMM64_IMM41b_VAL_POS_X\r
205	);\r
206	\r
207	INS_IMM64(FixupVal,\r
208	((UINT32 *)Fixup + IMM64_IMM41c_INST_WORD_X),\r
209	IMM64_IMM41c_SIZE_X,\r
210	IMM64_IMM41c_INST_WORD_POS_X,\r
211	IMM64_IMM41c_VAL_POS_X\r
212	);\r
213	\r
214	INS_IMM64(FixupVal,\r
215	((UINT32 *)Fixup + IMM64_SIGN_INST_WORD_X),\r
216	IMM64_SIGN_SIZE_X,\r
217	IMM64_SIGN_INST_WORD_POS_X,\r
218	IMM64_SIGN_VAL_POS_X\r
219	);\r
220	\r
221	F64 = (UINT64 *) Fixup;\r
222	if (*FixupData != NULL) {\r
223	FixupData = ALIGN_POINTER(FixupData, sizeof(UINT64));\r
224	(UINT64 )(FixupData) = F64;\r
225	FixupData = FixupData + sizeof(UINT64);\r
226	}\r
227	break;\r
228	\r
229	default:\r
230	return EFI_UNSUPPORTED;\r
231	}\r
232	\r
233	return EFI_SUCCESS;\r
234	}\r
235	\r
236	BOOLEAN\r
237	PeCoffLoaderImageFormatSupported (\r
238	IN UINT16 Machine\r
239	)\r
240	/*++\r
241	Routine Description:\r
242	\r
243	Returns TRUE if the machine type of PE/COFF image is supported. Supported \r
244	does not mean the image can be executed it means the PE/COFF loader supports\r
245	loading and relocating of the image type. It's up to the caller to support\r
246	the entry point. \r
247	\r
248	This function implies the basic PE/COFF loader/relocator supports IPF, EBC,\r
249	images. Calling the entry point in a correct mannor is up to the \r
250	consumer of this library.\r
251	\r
252	Arguments:\r
253	\r
254	Machine - Machine type from the PE Header.\r
255	\r
256	Returns:\r
257	\r
258	TRUE - if this PE/COFF loader can load the image\r
259	FALSE - if this PE/COFF loader cannot load the image\r
260	\r
261	--*/\r
262	{\r
263	if ((Machine == EFI_IMAGE_MACHINE_IA64) \|\| (Machine == EFI_IMAGE_MACHINE_EBC)) {\r
264	return TRUE; \r
265	}\r
266	\r
267	return FALSE;\r
268	}\r