]> git.proxmox.com Git - mirror_edk2.git/blame - EdkModulePkg/Bus/Pci/Uhci/Dxe/uhci.h
projects / mirror_edk2.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
remove unnecessary check for NULL pointer.
[mirror_edk2.git] / EdkModulePkg / Bus / Pci / Uhci / Dxe / uhci.h
CommitLineData
878ddf1f 1/*++\r
2\r
3Copyright (c) 2006, Intel Corporation \r
4All rights reserved. This program and the accompanying materials \r
5are licensed and made available under the terms and conditions of the BSD License \r
6which accompanies this distribution. The full text of the license may be found at \r
7http://opensource.org/licenses/bsd-license.php \r
8 \r
9THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
10WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
11\r
12Module Name:\r
13\r
14 Uhci.h\r
15 \r
16Abstract: \r
17 \r
18\r
19Revision History\r
20--*/\r
21\r
22#ifndef _UHCI_H\r
23#define _UHCI_H\r
24\r
25/*\r
26 * Universal Host Controller Interface data structures and defines\r
27 */\r
28\r
f0ec738d 29#include <IndustryStandard/pci22.h>\r
878ddf1f 30\r
562d2849 31#define EFI_D_UHCI EFI_D_INFO\r
878ddf1f 32\r
33//\r
34// stall time\r
35//\r
36#define STALL_1_MILLI_SECOND 1000\r
37#define STALL_1_SECOND 1000 * STALL_1_MILLI_SECOND\r
38\r
39#define FORCE_GLOBAL_RESUME_TIME 20 * STALL_1_MILLI_SECOND\r
40\r
41#define ROOT_PORT_REST_TIME 50 * STALL_1_MILLI_SECOND\r
42\r
43#define PORT_RESET_RECOVERY_TIME 10 * STALL_1_MILLI_SECOND\r
44\r
45//\r
46// 50 ms\r
47//\r
562d2849 48#define INTERRUPT_POLLING_TIME 50 * 1000 * 10\r
878ddf1f 49\r
50//\r
51// UHCI IO Space Address Register Register locates at\r
52// offset 20 ~ 23h of PCI Configuration Space (UHCI spec, Revision 1.1),\r
53// so, its BAR Index is 4.\r
54//\r
562d2849 55#define USB_BAR_INDEX 4\r
878ddf1f 56\r
57//\r
58// One memory block uses 1 page (common buffer for QH,TD use.)\r
59//\r
60#define NORMAL_MEMORY_BLOCK_UNIT_IN_PAGES 1\r
61\r
71a62114 62#define bit(a) (1 << (a))\r
878ddf1f 63\r
64//\r
65// ////////////////////////////////////////////////////////////////////////\r
66//\r
67// Universal Host Controller Registers Definitions\r
68//\r
69//////////////////////////////////////////////////////////////////////////\r
70extern UINT16 USBBaseAddr;\r
71\r
72/* Command register */\r
73#define USBCMD 0 /* Command Register Offset 00-01h */\r
74#define USBCMD_RS bit (0) /* Run/Stop */\r
75#define USBCMD_HCRESET bit (1) /* Host reset */\r
76#define USBCMD_GRESET bit (2) /* Global reset */\r
77#define USBCMD_EGSM bit (3) /* Global Suspend Mode */\r
78#define USBCMD_FGR bit (4) /* Force Global Resume */\r
79#define USBCMD_SWDBG bit (5) /* SW Debug mode */\r
80#define USBCMD_CF bit (6) /* Config Flag (sw only) */\r
81#define USBCMD_MAXP bit (7) /* Max Packet (0 = 32, 1 = 64) */\r
82\r
83/* Status register */\r
562d2849 84#define USBSTS 2 /* Status Register Offset 02-03h */\r
85#define USBSTS_USBINT bit (0) /* Interrupt due to IOC */\r
86#define USBSTS_ERROR bit (1) /* Interrupt due to error */\r
87#define USBSTS_RD bit (2) /* Resume Detect */\r
88#define USBSTS_HSE bit (3) /* Host System Error*/\r
89#define USBSTS_HCPE bit (4) /* Host Controller Process Error*/\r
90#define USBSTS_HCH bit (5) /* HC Halted */\r
878ddf1f 91\r
92/* Interrupt enable register */\r
93#define USBINTR 4 /* Interrupt Enable Register 04-05h */\r
94#define USBINTR_TIMEOUT bit (0) /* Timeout/CRC error enable */\r
95#define USBINTR_RESUME bit (1) /* Resume interrupt enable */\r
96#define USBINTR_IOC bit (2) /* Interrupt On Complete enable */\r
97#define USBINTR_SP bit (3) /* Short packet interrupt enable */\r
98\r
99/* Frame Number Register Offset 06-08h */\r
562d2849 100#define USBFRNUM 6\r
878ddf1f 101\r
102/* Frame List Base Address Register Offset 08-0Bh */\r
562d2849 103#define USBFLBASEADD 8\r
878ddf1f 104\r
105/* Start of Frame Modify Register Offset 0Ch */\r
562d2849 106#define USBSOF 0x0c\r
878ddf1f 107\r
108/* USB port status and control registers */\r
109#define USBPORTSC1 0x10 /*Port 1 offset 10-11h */\r
110#define USBPORTSC2 0x12 /*Port 2 offset 12-13h */\r
111\r
112#define USBPORTSC_CCS bit (0) /* Current Connect Status*/\r
113#define USBPORTSC_CSC bit (1) /* Connect Status Change */\r
114#define USBPORTSC_PED bit (2) /* Port Enable / Disable */\r
115#define USBPORTSC_PEDC bit (3) /* Port Enable / Disable Change */\r
116#define USBPORTSC_LSL bit (4) /* Line Status Low bit*/\r
117#define USBPORTSC_LSH bit (5) /* Line Status High bit*/\r
118#define USBPORTSC_RD bit (6) /* Resume Detect */\r
119#define USBPORTSC_LSDA bit (8) /* Low Speed Device Attached */\r
120#define USBPORTSC_PR bit (9) /* Port Reset */\r
121#define USBPORTSC_SUSP bit (12) /* Suspend */\r
122\r
123/* PCI Configuration Registers for USB */\r
124\r
125//\r
126// Class Code Register offset\r
127//\r
562d2849 128#define CLASSC 0x09\r
878ddf1f 129//\r
130// USB IO Space Base Address Register offset\r
131//\r
562d2849 132#define USBBASE 0x20\r
878ddf1f 133\r
134//\r
135// USB legacy Support\r
136//\r
562d2849 137#define USB_EMULATION 0xc0\r
878ddf1f 138\r
139//\r
140// USB Base Class Code,Sub-Class Code and Programming Interface.\r
141//\r
142#define PCI_CLASSC_PI_UHCI 0x00\r
143\r
144#define SETUP_PACKET_ID 0x2D\r
145#define INPUT_PACKET_ID 0x69\r
146#define OUTPUT_PACKET_ID 0xE1\r
147#define ERROR_PACKET_ID 0x55\r
148\r
149//\r
150// ////////////////////////////////////////////////////////////////////////\r
151//\r
152// USB Transfer Mechanism Data Structures\r
153//\r
154//////////////////////////////////////////////////////////////////////////\r
155#pragma pack(1)\r
156//\r
157// USB Class Code structure\r
158//\r
159typedef struct {\r
160 UINT8 PI;\r
161 UINT8 SubClassCode;\r
162 UINT8 BaseCode;\r
163} USB_CLASSC;\r
164\r
165typedef struct {\r
166 UINT32 QHHorizontalTerminate : 1;\r
167 UINT32 QHHorizontalQSelect : 1;\r
168 UINT32 QHHorizontalRsvd : 2;\r
169 UINT32 QHHorizontalPtr : 28;\r
170 UINT32 QHVerticalTerminate : 1;\r
171 UINT32 QHVerticalQSelect : 1;\r
172 UINT32 QHVerticalRsvd : 2;\r
173 UINT32 QHVerticalPtr : 28;\r
174} QUEUE_HEAD;\r
175\r
176typedef struct {\r
177 UINT32 TDLinkPtrTerminate : 1;\r
178 UINT32 TDLinkPtrQSelect : 1;\r
179 UINT32 TDLinkPtrDepthSelect : 1;\r
180 UINT32 TDLinkPtrRsvd : 1;\r
181 UINT32 TDLinkPtr : 28;\r
182 UINT32 TDStatusActualLength : 11;\r
183 UINT32 TDStatusRsvd : 5;\r
184 UINT32 TDStatus : 8;\r
185 UINT32 TDStatusIOC : 1;\r
186 UINT32 TDStatusIOS : 1;\r
187 UINT32 TDStatusLS : 1;\r
188 UINT32 TDStatusErr : 2;\r
189 UINT32 TDStatusSPD : 1;\r
190 UINT32 TDStatusRsvd2 : 2;\r
191 UINT32 TDTokenPID : 8;\r
192 UINT32 TDTokenDevAddr : 7;\r
193 UINT32 TDTokenEndPt : 4;\r
194 UINT32 TDTokenDataToggle : 1;\r
195 UINT32 TDTokenRsvd : 1;\r
196 UINT32 TDTokenMaxLen : 11;\r
197 UINT32 TDBufferPtr;\r
198} TD;\r
199\r
200#pragma pack()\r
201\r
202typedef struct {\r
203 QUEUE_HEAD QH;\r
204 VOID *ptrNext;\r
205 VOID *ptrDown;\r
206 VOID *ptrNextIntQH; // for interrupt transfer's special use\r
207 VOID *LoopPtr;\r
208} QH_STRUCT;\r
209\r
210typedef struct {\r
211 TD TDData;\r
212 UINT8 *pTDBuffer;\r
213 VOID *ptrNextTD;\r
214 VOID *ptrNextQH;\r
215 UINT16 TDBufferLength;\r
216 UINT16 reserved;\r
217} TD_STRUCT;\r
218\r
219//\r
220// ////////////////////////////////////////////////////////////////////////\r
221//\r
222// Universal Host Controller Device Data Structure\r
223//\r
224//////////////////////////////////////////////////////////////////////////\r
225#define USB_HC_DEV_FROM_THIS(a) CR (a, USB_HC_DEV, UsbHc, USB_HC_DEV_SIGNATURE)\r
562d2849 226#define USB2_HC_DEV_FROM_THIS(a) CR (a, USB_HC_DEV, Usb2Hc, USB_HC_DEV_SIGNATURE)\r
878ddf1f 227\r
228#define USB_HC_DEV_SIGNATURE EFI_SIGNATURE_32 ('u', 'h', 'c', 'i')\r
229#define INTERRUPT_LIST_SIGNATURE EFI_SIGNATURE_32 ('i', 'n', 't', 's')\r
230typedef struct {\r
231 UINTN Signature;\r
232\r
233 LIST_ENTRY Link;\r
234 UINT8 DevAddr;\r
235 UINT8 EndPoint;\r
236 UINT8 DataToggle;\r
237 UINT8 Reserved[5];\r
238 TD_STRUCT *PtrFirstTD;\r
239 QH_STRUCT *PtrQH;\r
240 UINTN DataLen;\r
241 UINTN PollInterval;\r
242 VOID *Mapping;\r
243 UINT8 *DataBuffer; // allocated host memory, not mapped memory\r
244 EFI_ASYNC_USB_TRANSFER_CALLBACK InterruptCallBack;\r
245 VOID *InterruptContext;\r
246} INTERRUPT_LIST;\r
247\r
248#define INTERRUPT_LIST_FROM_LINK(a) CR (a, INTERRUPT_LIST, Link, INTERRUPT_LIST_SIGNATURE)\r
249\r
250typedef struct {\r
251 UINT32 FrameListPtrTerminate : 1;\r
252 UINT32 FrameListPtrQSelect : 1;\r
253 UINT32 FrameListRsvd : 2;\r
254 UINT32 FrameListPtr : 28;\r
255\r
256} FRAMELIST_ENTRY;\r
257\r
258typedef struct _MEMORY_MANAGE_HEADER {\r
259 UINT8 *BitArrayPtr;\r
260 UINTN BitArraySizeInBytes;\r
261 UINT8 *MemoryBlockPtr;\r
262 UINTN MemoryBlockSizeInBytes;\r
263 VOID *Mapping;\r
264 struct _MEMORY_MANAGE_HEADER *Next;\r
265} MEMORY_MANAGE_HEADER;\r
266\r
267typedef struct {\r
268 UINTN Signature;\r
269 EFI_USB_HC_PROTOCOL UsbHc;\r
562d2849 270 EFI_USB2_HC_PROTOCOL Usb2Hc;\r
878ddf1f 271 EFI_PCI_IO_PROTOCOL *PciIo;\r
272\r
273 //\r
274 // local data\r
275 //\r
276 LIST_ENTRY InterruptListHead;\r
277 FRAMELIST_ENTRY *FrameListEntry;\r
278 VOID *FrameListMapping;\r
279 MEMORY_MANAGE_HEADER *MemoryHeader;\r
280 EFI_EVENT InterruptTransTimer;\r
281 EFI_UNICODE_STRING_TABLE *ControllerNameTable;\r
282\r
283} USB_HC_DEV;\r
284\r
285extern EFI_DRIVER_BINDING_PROTOCOL gUhciDriverBinding;\r
286extern EFI_COMPONENT_NAME_PROTOCOL gUhciComponentName;\r
287\r
92dda53e 288//\r
289// EFI Component Name Functions\r
290//\r
291EFI_STATUS\r
292EFIAPI\r
293UhciComponentNameGetDriverName (\r
294 IN EFI_COMPONENT_NAME_PROTOCOL *This,\r
295 IN CHAR8 *Language,\r
296 OUT CHAR16 **DriverName\r
297 );\r
298\r
299EFI_STATUS\r
300EFIAPI\r
301UhciComponentNameGetControllerName (\r
302 IN EFI_COMPONENT_NAME_PROTOCOL *This,\r
303 IN EFI_HANDLE ControllerHandle,\r
304 IN EFI_HANDLE ChildHandle, OPTIONAL\r
305 IN CHAR8 *Language,\r
306 OUT CHAR16 **ControllerName\r
307 );\r
308\r
878ddf1f 309EFI_STATUS\r
310WriteUHCCommandReg (\r
311 IN EFI_PCI_IO_PROTOCOL *PciIo,\r
312 IN UINT32 CmdAddrOffset,\r
313 IN UINT16 UsbCmd\r
562d2849 314 )\r
315/*++\r
316\r
317Routine Description:\r
318\r
319 Write UHCI Command Register\r
320\r
321Arguments:\r
322\r
323 PciIo - EFI_PCI_IO_PROTOCOL\r
324 CmdAddrOffset - Command address offset\r
325 UsbCmd - Data to write\r
326\r
327Returns:\r
328\r
329 EFI_SUCCESS\r
330\r
331--*/\r
332;\r
878ddf1f 333\r
334EFI_STATUS\r
335ReadUHCCommandReg (\r
336 IN EFI_PCI_IO_PROTOCOL *PciIo,\r
337 IN UINT32 CmdAddrOffset,\r
338 IN OUT UINT16 *Data\r
562d2849 339 )\r
340/*++\r
341\r
342Routine Description:\r
343\r
344 Read UHCI Command Register\r
345\r
346Arguments:\r
347\r
348 PciIo - EFI_PCI_IO_PROTOCOL\r
349 CmdAddrOffset - Command address offset\r
350 Data - Data to return\r
351\r
352Returns:\r
353\r
354 EFI_SUCCESS\r
355\r
356--*/\r
357;\r
878ddf1f 358\r
359EFI_STATUS\r
360WriteUHCStatusReg (\r
361 IN EFI_PCI_IO_PROTOCOL *PciIo,\r
362 IN UINT32 StatusAddrOffset,\r
363 IN UINT16 UsbSts\r
562d2849 364 )\r
365/*++\r
366\r
367Routine Description:\r
368\r
369 Write UHCI Staus Register\r
370\r
371Arguments:\r
372\r
373 PciIo - EFI_PCI_IO_PROTOCOL\r
374 StatusAddrOffset - Status address offset\r
375 UsbSts - Data to write\r
376\r
377Returns:\r
378\r
379 EFI_SUCCESS\r
380\r
381--*/\r
382;\r
878ddf1f 383\r
384EFI_STATUS\r
385ReadUHCStatusReg (\r
386 IN EFI_PCI_IO_PROTOCOL *PciIo,\r
387 IN UINT32 StatusAddrOffset,\r
388 IN OUT UINT16 *Data\r
562d2849 389 )\r
390/*++\r
391\r
392Routine Description:\r
393\r
394 Read UHCI Staus Register\r
395\r
396Arguments:\r
397\r
398 PciIo - EFI_PCI_IO_PROTOCOL\r
399 StatusAddrOffset - Status address offset\r
400 UsbSts - Data to return\r
401\r
402Returns:\r
403\r
404 EFI_SUCCESS\r
405\r
406--*/\r
407;\r
878ddf1f 408\r
409EFI_STATUS\r
410ClearStatusReg (\r
411 IN EFI_PCI_IO_PROTOCOL *PciIo,\r
412 IN UINT32 StatusAddrOffset\r
562d2849 413 )\r
414/*++\r
415\r
416Routine Description:\r
417\r
418 Clear the content of UHC's Status Register\r
419\r
420Arguments:\r
421\r
422 PciIo - EFI_PCI_IO_PROTOCOL\r
423 StatusAddrOffset - Status address offset\r
424 \r
425Returns:\r
426\r
427 EFI_SUCCESS\r
428\r
429--*/\r
430;\r
878ddf1f 431\r
432EFI_STATUS\r
433ReadUHCFrameNumberReg (\r
434 IN EFI_PCI_IO_PROTOCOL *PciIo,\r
435 IN UINT32 FrameNumAddrOffset,\r
436 IN OUT UINT16 *Data\r
562d2849 437 )\r
438/*++\r
439\r
440Routine Description:\r
441\r
442 Read from UHC's Frame Number Register\r
443\r
444Arguments:\r
445\r
446 PciIo - EFI_PCI_IO_PROTOCOL\r
447 FrameNumAddrOffset - Frame number register offset\r
448 Data - Data to return \r
449Returns:\r
450\r
451 EFI_SUCCESS\r
452\r
453--*/\r
454;\r
878ddf1f 455\r
456EFI_STATUS\r
457WriteUHCFrameListBaseReg (\r
458 IN EFI_PCI_IO_PROTOCOL *PciIo,\r
459 IN UINT32 FlBaseAddrOffset,\r
460 IN UINT32 UsbFrameListBaseAddr\r
562d2849 461 )\r
462/*++\r
463\r
464Routine Description:\r
465\r
466 Write to UHC's Frame List Base Register\r
467\r
468Arguments:\r
469\r
470 PciIo - EFI_PCI_IO_PROTOCOL\r
471 FlBaseAddrOffset - Frame Base address register\r
472 UsbFrameListBaseAddr - Address to write\r
473\r
474Returns:\r
475\r
476 EFI_SUCCESS\r
477\r
478--*/\r
479;\r
878ddf1f 480\r
481EFI_STATUS\r
482ReadRootPortReg (\r
483 IN EFI_PCI_IO_PROTOCOL *PciIo,\r
484 IN UINT32 PortAddrOffset,\r
485 IN OUT UINT16 *Data\r
562d2849 486 )\r
487/*++\r
488\r
489Routine Description:\r
490\r
491 Read from UHC's Root Port Register\r
492\r
493Arguments:\r
494\r
495 PciIo - EFI_PCI_IO_PROTOCOL\r
496 PortAddrOffset - Port Addrress Offset,\r
497 Data - Data to return\r
498Returns:\r
499\r
500 EFI_SUCCESS\r
501\r
502--*/\r
503;\r
878ddf1f 504\r
505EFI_STATUS\r
506WriteRootPortReg (\r
507 IN EFI_PCI_IO_PROTOCOL *PciIo,\r
508 IN UINT32 PortAddrOffset,\r
509 IN UINT16 ControlBits\r
562d2849 510 )\r
511/*++\r
512\r
513Routine Description:\r
514\r
515 Write to UHC's Root Port Register\r
516\r
517Arguments:\r
518\r
519 PciIo - EFI_PCI_IO_PROTOCOL\r
520 PortAddrOffset - Port Addrress Offset,\r
521 ControlBits - Data to write\r
522Returns:\r
523\r
524 EFI_SUCCESS\r
525\r
526--*/\r
527;\r
878ddf1f 528\r
529EFI_STATUS\r
530WaitForUHCHalt (\r
531 IN EFI_PCI_IO_PROTOCOL *PciIo,\r
532 IN UINT32 StatusRegAddr,\r
533 IN UINTN Timeout\r
562d2849 534 )\r
535/*++\r
536\r
537Routine Description:\r
538\r
539 Wait until UHCI halt or timeout\r
540\r
541Arguments:\r
542\r
543 PciIo - EFI_PCI_IO_PROTOCOL\r
544 StatusRegAddr - Status Register Address\r
545 Timeout - Time out value in us\r
546\r
547Returns:\r
548\r
549 EFI_DEVICE_ERROR - Unable to read the status register\r
550 EFI_TIMEOUT - Time out\r
551 EFI_SUCCESS - Success\r
552\r
553--*/\r
554;\r
878ddf1f 555\r
556BOOLEAN\r
557IsStatusOK (\r
558 IN EFI_PCI_IO_PROTOCOL *PciIo,\r
559 IN UINT32 StatusRegAddr\r
562d2849 560 )\r
561/*++\r
562\r
563Routine Description:\r
564\r
565 Judge whether the host controller operates well\r
566\r
567Arguments:\r
568\r
569 PciIo - EFI_PCI_IO_PROTOCOL\r
570 StatusRegAddr - Status register address\r
571\r
572Returns:\r
573\r
574 TRUE - Status is good\r
575 FALSE - Status is bad\r
576\r
577--*/\r
578;\r
878ddf1f 579\r
580BOOLEAN\r
581IsHostSysOrProcessErr (\r
582 IN EFI_PCI_IO_PROTOCOL *PciIo,\r
583 IN UINT32 StatusRegAddr\r
562d2849 584 )\r
585/*++\r
878ddf1f 586\r
562d2849 587Routine Description:\r
588\r
589 Judge the status is HostSys,ProcessErr error or good\r
590\r
591Arguments:\r
592\r
593 PciIo - EFI_PCI_IO_PROTOCOL\r
594 StatusRegAddr - Status register address\r
595\r
596Returns:\r
597\r
598 TRUE - Status is good\r
599 FALSE - Status is bad\r
600\r
601--*/\r
602;\r
878ddf1f 603\r
604UINT16\r
605GetCurrentFrameNumber (\r
606 IN EFI_PCI_IO_PROTOCOL *PciIo,\r
562d2849 607 IN UINT32 FrameNumAddrOffset\r
608 )\r
609/*++\r
610\r
611Routine Description:\r
612\r
613 Get Current Frame Number\r
614\r
615Arguments:\r
616\r
617 PciIo - EFI_PCI_IO_PROTOCOL\r
618 FrameNumAddrOffset - FrameNum register AddrOffset\r
619\r
620Returns:\r
621\r
622 Frame number \r
623\r
624--*/\r
625;\r
878ddf1f 626\r
627EFI_STATUS\r
628SetFrameListBaseAddress (\r
629 IN EFI_PCI_IO_PROTOCOL *PciIo,\r
630 IN UINT32 FLBASEADDRReg,\r
631 IN UINT32 Addr\r
562d2849 632 )\r
633/*++\r
878ddf1f 634\r
562d2849 635Routine Description:\r
878ddf1f 636\r
562d2849 637 Set FrameListBase Address\r
878ddf1f 638\r
562d2849 639Arguments:\r
878ddf1f 640\r
562d2849 641 PciIo - EFI_PCI_IO_PROTOCOL\r
642 FlBaseAddrReg - FrameListBase register\r
643 Addr - Address to set\r
878ddf1f 644\r
562d2849 645Returns:\r
878ddf1f 646\r
562d2849 647 EFI_SUCCESS\r
878ddf1f 648\r
562d2849 649--*/\r
650;\r
878ddf1f 651\r
562d2849 652UINT32\r
653GetFrameListBaseAddress (\r
654 IN EFI_PCI_IO_PROTOCOL *PciIo,\r
655 IN UINT32 FLBAddr\r
656 )\r
657/*++\r
878ddf1f 658\r
562d2849 659Routine Description:\r
878ddf1f 660\r
562d2849 661 Get Current Frame Number\r
878ddf1f 662\r
562d2849 663Arguments:\r
878ddf1f 664\r
562d2849 665 PciIo - EFI_PCI_IO_PROTOCOL\r
666 FrameNumAddrOffset - FrameNum register AddrOffset\r
878ddf1f 667\r
562d2849 668Returns:\r
878ddf1f 669\r
562d2849 670 Frame number \r
878ddf1f 671\r
562d2849 672--*/\r
673;\r
878ddf1f 674\r
675EFI_STATUS\r
562d2849 676CreateFrameList (\r
677 IN USB_HC_DEV *HcDev,\r
678 IN UINT32 FLBASEADDRReg\r
679 )\r
878ddf1f 680/*++\r
681\r
682Routine Description:\r
683\r
562d2849 684 CreateFrameList\r
878ddf1f 685\r
686Arguments:\r
687\r
562d2849 688 HcDev - USB_HC_DEV\r
689 FlBaseAddrReg - Frame List register\r
690\r
878ddf1f 691Returns:\r
692\r
562d2849 693 EFI_OUT_OF_RESOURCES - Can't allocate memory resources\r
694 EFI_UNSUPPORTED - Map memory fail\r
695 EFI_SUCCESS - Success\r
878ddf1f 696\r
697--*/\r
562d2849 698;\r
878ddf1f 699\r
700EFI_STATUS\r
562d2849 701FreeFrameListEntry (\r
702 IN USB_HC_DEV *UhcDev\r
703 )\r
878ddf1f 704/*++\r
705\r
706Routine Description:\r
707\r
562d2849 708 Free FrameList buffer\r
878ddf1f 709\r
710Arguments:\r
711\r
562d2849 712 HcDev - USB_HC_DEV\r
878ddf1f 713\r
714Returns:\r
715\r
562d2849 716 EFI_SUCCESS - success\r
878ddf1f 717\r
718--*/\r
562d2849 719;\r
720\r
721VOID\r
722InitFrameList (\r
723 IN USB_HC_DEV *HcDev\r
724 )\r
725/*++\r
726\r
727Routine Description:\r
728\r
729 Initialize FrameList\r
730\r
731Arguments:\r
732\r
733 HcDev - USB_HC_DEV\r
734\r
735Returns:\r
736 VOID\r
737\r
738--*/\r
739;\r
740\r
741EFI_STATUS\r
742CreateQH (\r
743 IN USB_HC_DEV *HcDev,\r
744 OUT QH_STRUCT **pptrQH\r
745 )\r
746/*++\r
747\r
748Routine Description:\r
749\r
750 CreateQH\r
751\r
752Arguments:\r
753\r
754 HcDev - USB_HC_DEV\r
755 pptrQH - QH_STRUCT content to return\r
756Returns:\r
757\r
758 EFI_SUCCESS - Success\r
759 EFI_OUT_OF_RESOURCES - Can't allocate memory\r
760 \r
761--*/\r
762;\r
763\r
764VOID\r
765SetQHHorizontalLinkPtr (\r
766 IN QH_STRUCT *ptrQH,\r
767 IN VOID *ptrNext\r
768 )\r
769/*++\r
770\r
771Routine Description:\r
772\r
773 Set QH Horizontal Link Pointer\r
774\r
775Arguments:\r
776\r
777 PtrQH - QH_STRUCT\r
778 ptrNext - Data to write \r
779\r
780Returns:\r
781\r
782 VOID\r
783\r
784--*/\r
785;\r
786\r
787VOID *\r
788GetQHHorizontalLinkPtr (\r
789 IN QH_STRUCT *ptrQH\r
790 )\r
791/*++\r
792\r
793Routine Description:\r
794\r
795 Get QH Horizontal Link Pointer\r
796\r
797Arguments:\r
798\r
799 PtrQH - QH_STRUCT\r
800 \r
801\r
802Returns:\r
803\r
804 Data to return \r
805\r
806--*/\r
807;\r
808\r
809VOID\r
810SetQHHorizontalQHorTDSelect (\r
811 IN QH_STRUCT *ptrQH,\r
812 IN BOOLEAN bQH\r
813 )\r
814/*++\r
815\r
816Routine Description:\r
817\r
818 Set QH Horizontal QH or TD \r
819\r
820Arguments:\r
821\r
822 PtrQH - QH_STRUCT\r
823 bQH - TRUE is QH FALSE is TD\r
824\r
825Returns:\r
826 VOID\r
827\r
828--*/\r
829;\r
830\r
831VOID\r
832SetQHHorizontalValidorInvalid (\r
833 IN QH_STRUCT *ptrQH,\r
834 IN BOOLEAN bValid\r
835 )\r
836/*++\r
837\r
838Routine Description:\r
839\r
840 Set QH Horizontal Valid or Invalid\r
841\r
842Arguments:\r
843\r
844 PtrQH - QH_STRUCT\r
845 bValid - TRUE is Valid FALSE is Invalid\r
846\r
847Returns:\r
848 VOID\r
849\r
850--*/\r
851;\r
852\r
853VOID\r
854SetQHVerticalLinkPtr (\r
855 IN QH_STRUCT *ptrQH,\r
856 IN VOID *ptrNext\r
857 )\r
858/*++\r
859\r
860Routine Description:\r
861\r
862 Set QH Vertical Link Pointer\r
863 \r
864Arguments:\r
865\r
866 PtrQH - QH_STRUCT\r
867 ptrNext - Data to write\r
868Returns:\r
869\r
870 VOID\r
871\r
872--*/\r
873;\r
874\r
875VOID *\r
876GetQHVerticalLinkPtr (\r
877 IN QH_STRUCT *ptrQH\r
878 )\r
879/*++\r
880\r
881Routine Description:\r
882\r
883 Get QH Vertical Link Pointer\r
884 \r
885Arguments:\r
886\r
887 PtrQH - QH_STRUCT\r
888 \r
889Returns:\r
890\r
891 Data to return\r
892\r
893--*/\r
894;\r
895\r
896VOID\r
897SetQHVerticalQHorTDSelect (\r
898 IN QH_STRUCT *ptrQH,\r
899 IN BOOLEAN bQH\r
900 )\r
901/*++\r
902\r
903Routine Description:\r
904\r
905 Set QH Vertical QH or TD\r
906\r
907Arguments:\r
908\r
909 PtrQH - QH_STRUCT\r
910 bQH - TRUE is QH FALSE is TD\r
911\r
912Returns:\r
913\r
914 VOID\r
915\r
916--*/\r
917;\r
918\r
919BOOLEAN\r
920IsQHHorizontalQHSelect (\r
921 IN QH_STRUCT *ptrQH\r
922 )\r
923/*++\r
924\r
925Routine Description:\r
926\r
927 Is QH Horizontal QH Select\r
928\r
929Arguments:\r
930\r
931 PtrQH - QH_STRUCT\r
932 \r
933Returns:\r
934\r
935 TRUE - QH\r
936 FALSE - TD\r
937\r
938--*/\r
939;\r
940\r
941VOID\r
942SetQHVerticalValidorInvalid (\r
943 IN QH_STRUCT *ptrQH,\r
944 IN BOOLEAN bValid\r
945 )\r
946/*++\r
947\r
948Routine Description:\r
949\r
950 Set QH Vertical Valid or Invalid\r
951\r
952Arguments:\r
953\r
954 PtrQH - QH_STRUCT\r
955 IsValid - TRUE is valid FALSE is invalid\r
956\r
957Returns:\r
958\r
959 VOID\r
960\r
961--*/\r
962;\r
963\r
964BOOLEAN\r
965GetQHVerticalValidorInvalid (\r
966 IN QH_STRUCT *ptrQH\r
967 )\r
968/*++\r
969\r
970Routine Description:\r
971\r
972 Get QH Vertical Valid or Invalid\r
973\r
974Arguments:\r
975\r
976 PtrQH - QH_STRUCT\r
977\r
978Returns:\r
979\r
980 TRUE - Valid\r
981 FALSE - Invalid\r
982\r
983--*/\r
984;\r
985\r
986EFI_STATUS\r
987AllocateTDStruct (\r
988 IN USB_HC_DEV *HcDev,\r
989 OUT TD_STRUCT **ppTDStruct\r
990 )\r
991/*++\r
992\r
993Routine Description:\r
994\r
995 Allocate TD Struct\r
996\r
997Arguments:\r
998\r
999 HcDev - USB_HC_DEV\r
1000 ppTDStruct - place to store TD_STRUCT pointer\r
1001Returns:\r
1002\r
1003 EFI_SUCCESS\r
1004\r
1005--*/\r
1006;\r
1007\r
1008EFI_STATUS\r
1009CreateTD (\r
1010 IN USB_HC_DEV *HcDev,\r
1011 OUT TD_STRUCT **pptrTD\r
1012 )\r
1013/*++\r
1014\r
1015Routine Description:\r
1016\r
1017 Create TD\r
1018\r
1019Arguments:\r
1020\r
1021 HcDev - USB_HC_DEV\r
1022 pptrTD - TD_STRUCT pointer to store\r
1023\r
1024Returns:\r
1025\r
1026 EFI_OUT_OF_RESOURCES - Can't allocate resources\r
1027 EFI_SUCCESS - Success\r
1028\r
1029--*/\r
1030;\r
878ddf1f 1031\r
1032\r
1033EFI_STATUS\r
1034GenSetupStageTD (\r
1035 IN USB_HC_DEV *HcDev,\r
1036 IN UINT8 DevAddr,\r
1037 IN UINT8 Endpoint,\r
1038 IN BOOLEAN bSlow,\r
1039 IN UINT8 *pDevReq,\r
1040 IN UINT8 RequestLen,\r
1041 OUT TD_STRUCT **ppTD\r
562d2849 1042 )\r
878ddf1f 1043/*++\r
1044\r
1045Routine Description:\r
1046\r
1047 Generate Setup Stage TD\r
1048\r
1049Arguments:\r
1050\r
1051 HcDev - USB_HC_DEV\r
1052 DevAddr - Device address\r
1053 Endpoint - Endpoint number \r
1054 bSlow - Full speed or low speed\r
1055 pDevReq - Device request\r
1056 RequestLen - Request length\r
1057 ppTD - TD_STRUCT to return\r
1058Returns:\r
1059\r
1060 EFI_OUT_OF_RESOURCES - Can't allocate memory\r
1061 EFI_SUCCESS - Success\r
1062\r
1063--*/\r
562d2849 1064;\r
878ddf1f 1065\r
1066EFI_STATUS\r
1067GenDataTD (\r
1068 IN USB_HC_DEV *HcDev,\r
1069 IN UINT8 DevAddr,\r
1070 IN UINT8 Endpoint,\r
1071 IN UINT8 *pData,\r
1072 IN UINT8 Len,\r
1073 IN UINT8 PktID,\r
1074 IN UINT8 Toggle,\r
1075 IN BOOLEAN bSlow,\r
1076 OUT TD_STRUCT **ppTD\r
562d2849 1077 )\r
878ddf1f 1078/*++\r
1079\r
1080Routine Description:\r
1081\r
1082 Generate Data Stage TD\r
1083\r
1084Arguments:\r
1085\r
1086 HcDev - USB_HC_DEV\r
1087 DevAddr - Device address\r
1088 Endpoint - Endpoint number \r
1089 pData - Data buffer \r
1090 Len - Data length\r
1091 PktID - Packet ID\r
1092 Toggle - Data toggle value\r
1093 bSlow - Full speed or low speed\r
1094 ppTD - TD_STRUCT to return\r
1095Returns:\r
1096\r
1097 EFI_OUT_OF_RESOURCES - Can't allocate memory\r
1098 EFI_SUCCESS - Success\r
1099\r
1100--*/\r
562d2849 1101;\r
878ddf1f 1102\r
1103EFI_STATUS\r
1104CreateStatusTD (\r
1105 IN USB_HC_DEV *HcDev,\r
1106 IN UINT8 DevAddr,\r
1107 IN UINT8 Endpoint,\r
1108 IN UINT8 PktID,\r
1109 IN BOOLEAN bSlow,\r
1110 OUT TD_STRUCT **ppTD\r
562d2849 1111 )\r
878ddf1f 1112/*++\r
1113\r
1114Routine Description:\r
1115\r
1116 Generate Setup Stage TD\r
1117\r
1118Arguments:\r
1119\r
1120 HcDev - USB_HC_DEV\r
1121 DevAddr - Device address\r
1122 Endpoint - Endpoint number \r
1123 bSlow - Full speed or low speed\r
1124 pDevReq - Device request\r
1125 RequestLen - Request length\r
1126 ppTD - TD_STRUCT to return\r
1127Returns:\r
1128\r
1129 EFI_OUT_OF_RESOURCES - Can't allocate memory\r
1130 EFI_SUCCESS - Success\r
1131\r
1132--*/\r
562d2849 1133;\r
878ddf1f 1134\r
1135VOID\r
1136SetTDLinkPtrValidorInvalid (\r
1137 IN TD_STRUCT *ptrTDStruct,\r
1138 IN BOOLEAN bValid\r
562d2849 1139 )\r
1140/*++\r
1141\r
1142Routine Description:\r
1143\r
1144 Set TD Link Pointer Valid or Invalid\r
1145\r
1146Arguments:\r
1147\r
1148 ptrTDStruct - TD_STRUCT\r
1149 bValid - TRUE is valid FALSE is invalid\r
1150\r
1151Returns:\r
1152\r
1153 VOID\r
1154\r
1155--*/\r
1156;\r
878ddf1f 1157\r
1158VOID\r
1159SetTDLinkPtrQHorTDSelect (\r
1160 IN TD_STRUCT *ptrTDStruct,\r
1161 IN BOOLEAN bQH\r
562d2849 1162 )\r
1163/*++\r
1164\r
1165Routine Description:\r
1166\r
1167 Set TD Link Pointer QH or TD Select\r
1168\r
1169Arguments:\r
1170\r
1171 ptrTDStruct - TD_STRUCT\r
1172 bQH - TRUE is QH FALSE is TD\r
1173 \r
1174Returns:\r
1175\r
1176 VOID\r
1177\r
1178--*/\r
1179;\r
878ddf1f 1180\r
1181VOID\r
1182SetTDLinkPtrDepthorBreadth (\r
1183 IN TD_STRUCT *ptrTDStruct,\r
1184 IN BOOLEAN bDepth\r
562d2849 1185 )\r
1186/*++\r
1187\r
1188Routine Description:\r
1189\r
1190 Set TD Link Pointer depth or bread priority\r
1191\r
1192Arguments:\r
1193\r
1194 ptrTDStruct - TD_STRUCT\r
1195 bDepth - TRUE is Depth FALSE is Breadth\r
1196 \r
1197Returns:\r
1198\r
1199 VOID\r
1200\r
1201--*/\r
1202;\r
878ddf1f 1203\r
1204VOID\r
1205SetTDLinkPtr (\r
1206 IN TD_STRUCT *ptrTDStruct,\r
1207 IN VOID *ptrNext\r
562d2849 1208 )\r
1209/*++\r
1210\r
1211Routine Description:\r
1212\r
1213 Set TD Link Pointer\r
878ddf1f 1214\r
562d2849 1215Arguments:\r
1216\r
1217 ptrTDStruct - TD_STRUCT\r
1218 ptrNext - Pointer to set\r
1219 \r
1220Returns:\r
1221\r
1222 VOID\r
1223\r
1224--*/\r
1225;\r
1226\r
1227VOID *\r
878ddf1f 1228GetTDLinkPtr (\r
1229 IN TD_STRUCT *ptrTDStruct\r
562d2849 1230 )\r
1231/*++\r
1232\r
1233Routine Description:\r
1234\r
1235 Get TD Link Pointer\r
1236\r
1237Arguments:\r
1238\r
1239 ptrTDStruct - TD_STRUCT\r
1240 \r
1241Returns:\r
1242\r
1243 Pointer to get\r
1244\r
1245--*/\r
1246;\r
878ddf1f 1247\r
1248VOID\r
1249EnableorDisableTDShortPacket (\r
1250 IN TD_STRUCT *ptrTDStruct,\r
1251 IN BOOLEAN bEnable\r
562d2849 1252 )\r
1253/*++\r
1254\r
1255Routine Description:\r
1256\r
1257 Enable or Disable TD ShortPacket\r
1258\r
1259Arguments:\r
1260\r
1261 ptrTDStruct - TD_STRUCT\r
1262 bEnable - TRUE is Enanble FALSE is Disable\r
1263\r
1264Returns:\r
1265\r
1266 VOID\r
1267\r
1268--*/\r
1269;\r
878ddf1f 1270\r
1271VOID\r
1272SetTDControlErrorCounter (\r
1273 IN TD_STRUCT *ptrTDStruct,\r
1274 IN UINT8 nMaxErrors\r
562d2849 1275 )\r
1276/*++\r
1277\r
1278Routine Description:\r
1279\r
1280 Set TD Control ErrorCounter\r
1281\r
1282Arguments:\r
1283\r
1284 ptrTDStruct - TD_STRUCT\r
1285 nMaxErrors - Error counter number\r
1286 \r
1287Returns:\r
1288\r
1289 VOID\r
1290\r
1291--*/\r
1292;\r
878ddf1f 1293\r
1294VOID\r
1295SetTDLoworFullSpeedDevice (\r
1296 IN TD_STRUCT *ptrTDStruct,\r
1297 IN BOOLEAN bLowSpeedDevice\r
562d2849 1298 )\r
1299/*++\r
1300\r
1301Routine Description:\r
1302\r
1303 Set TD status low speed or full speed\r
1304\r
1305Arguments:\r
1306\r
1307 ptrTDStruct - A point to TD_STRUCT\r
1308 bLowSpeedDevice - Show low speed or full speed\r
1309\r
1310Returns:\r
1311\r
1312 VOID\r
1313\r
1314--*/\r
1315;\r
878ddf1f 1316\r
1317VOID\r
1318SetTDControlIsochronousorNot (\r
1319 IN TD_STRUCT *ptrTDStruct,\r
1320 IN BOOLEAN bIsochronous\r
562d2849 1321 )\r
1322/*++\r
1323\r
1324Routine Description:\r
1325\r
1326 Set TD status Isochronous or not\r
1327 \r
1328Arguments:\r
1329\r
1330 ptrTDStruct - A point to TD_STRUCT\r
1331 IsIsochronous - Show Isochronous or not\r
1332\r
1333Returns:\r
1334\r
1335 VOID\r
1336\r
1337--*/\r
1338;\r
878ddf1f 1339\r
1340VOID\r
1341SetorClearTDControlIOC (\r
1342 IN TD_STRUCT *ptrTDStruct,\r
1343 IN BOOLEAN bSet\r
562d2849 1344 )\r
1345/*++\r
1346\r
1347Routine Description:\r
1348\r
1349 Set TD status IOC IsSet\r
1350\r
1351Arguments:\r
1352\r
1353 ptrTDStruct - A point to TD_STRUCT\r
1354 IsSet - Show IOC set or not\r
1355\r
1356Returns:\r
1357\r
1358 VOID\r
1359\r
1360--*/\r
1361;\r
878ddf1f 1362\r
1363VOID\r
1364SetTDStatusActiveorInactive (\r
1365 IN TD_STRUCT *ptrTDStruct,\r
1366 IN BOOLEAN bActive\r
562d2849 1367 )\r
1368/*++\r
1369\r
1370Routine Description:\r
1371\r
1372 Set TD status active or not\r
1373Arguments:\r
1374\r
1375 ptrTDStruct - A point to TD_STRUCT\r
1376 IsActive - Active or not\r
1377\r
1378Returns:\r
1379\r
1380 VOID\r
1381\r
1382--*/\r
1383;\r
878ddf1f 1384\r
1385UINT16\r
1386SetTDTokenMaxLength (\r
1387 IN TD_STRUCT *ptrTDStruct,\r
1388 IN UINT16 nMaxLen\r
562d2849 1389 )\r
1390/*++\r
1391\r
1392Routine Description:\r
1393\r
1394 Set TD Token maxlength\r
1395\r
1396Arguments:\r
1397\r
1398 ptrTDStruct - A point to TD_STRUCT\r
1399 MaximumLength - Maximum length of TD Token\r
1400\r
1401Returns:\r
1402\r
1403 Real maximum length set to TD Token\r
1404\r
1405--*/\r
1406;\r
878ddf1f 1407\r
1408VOID\r
1409SetTDTokenDataToggle1 (\r
1410 IN TD_STRUCT *ptrTDStruct\r
562d2849 1411 )\r
1412/*++\r
1413\r
1414Routine Description:\r
1415\r
1416 Set TD Token data toggle1\r
1417\r
1418Arguments:\r
1419\r
1420 ptrTDStruct - A point to TD_STRUCT\r
1421\r
1422Returns:\r
1423\r
1424 VOID\r
1425\r
1426--*/\r
1427;\r
878ddf1f 1428\r
1429VOID\r
1430SetTDTokenDataToggle0 (\r
1431 IN TD_STRUCT *ptrTDStruct\r
562d2849 1432 )\r
1433/*++\r
1434\r
1435Routine Description:\r
1436\r
1437 Set TD Token data toggle0\r
1438\r
1439Arguments:\r
1440\r
1441 ptrTDStruct - A point to TD_STRUCT\r
1442\r
1443Returns:\r
1444\r
1445 VOID\r
1446\r
1447--*/\r
1448;\r
878ddf1f 1449\r
1450UINT8\r
1451GetTDTokenDataToggle (\r
1452 IN TD_STRUCT *ptrTDStruct\r
562d2849 1453 )\r
1454/*++\r
1455\r
1456Routine Description:\r
1457\r
1458 Get TD Token data toggle\r
1459\r
1460Arguments:\r
1461\r
1462 ptrTDStruct - A point to TD_STRUCT\r
1463\r
1464Returns:\r
1465\r
1466 data toggle value\r
1467\r
1468--*/\r
1469;\r
878ddf1f 1470\r
1471VOID\r
1472SetTDTokenEndPoint (\r
1473 IN TD_STRUCT *ptrTDStruct,\r
1474 IN UINTN nEndPoint\r
562d2849 1475 )\r
1476/*++\r
1477\r
1478Routine Description:\r
1479\r
1480 Set Data Token endpoint number\r
1481\r
1482Arguments:\r
1483\r
1484 ptrTDStruct - A point to TD_STRUCT\r
1485 EndPoint - End point number\r
1486\r
1487Returns:\r
1488\r
1489 VOID\r
1490\r
1491--*/\r
1492;\r
878ddf1f 1493\r
1494VOID\r
1495SetTDTokenDeviceAddress (\r
1496 IN TD_STRUCT *ptrTDStruct,\r
1497 IN UINTN nDevAddr\r
562d2849 1498 )\r
1499/*++\r
1500\r
1501Routine Description:\r
1502\r
1503 Set TD Token device address\r
1504\r
1505Arguments:\r
1506\r
1507 ptrTDStruct - A point to TD_STRUCT\r
1508 DeviceAddress - Device address\r
1509\r
1510Returns:\r
1511\r
1512 VOID\r
1513 \r
1514--*/\r
1515;\r
878ddf1f 1516\r
1517VOID\r
1518SetTDTokenPacketID (\r
1519 IN TD_STRUCT *ptrTDStruct,\r
1520 IN UINT8 nPID\r
562d2849 1521 )\r
1522/*++\r
1523\r
1524Routine Description:\r
1525\r
1526 Set TD Token packet ID\r
1527\r
1528Arguments:\r
1529\r
1530 ptrTDStruct - A point to TD_STRUCT\r
1531 PID - Packet ID\r
1532\r
1533Returns:\r
1534\r
1535 VOID\r
1536\r
1537--*/\r
1538;\r
878ddf1f 1539\r
1540VOID\r
1541SetTDDataBuffer (\r
1542 IN TD_STRUCT *ptrTDStruct\r
562d2849 1543 )\r
1544/*++\r
1545\r
1546Routine Description:\r
1547\r
1548 Set TD data buffer\r
1549\r
1550Arguments:\r
1551\r
1552 ptrTDStruct - A point to TD_STRUCT\r
1553\r
1554Returns:\r
1555\r
1556 VOID\r
1557\r
1558--*/\r
1559;\r
878ddf1f 1560\r
1561BOOLEAN\r
1562IsTDStatusActive (\r
1563 IN TD_STRUCT *ptrTDStruct\r
562d2849 1564 )\r
1565/*++\r
1566\r
1567Routine Description:\r
1568\r
1569 Indicate whether TD status active or not\r
1570\r
1571Arguments:\r
1572\r
1573 ptrTDStruct - A point to TD_STRUCT\r
1574\r
1575Returns:\r
1576\r
1577 TRUE - Active\r
1578 FALSE - Inactive \r
1579\r
1580--*/\r
1581;\r
878ddf1f 1582\r
1583BOOLEAN\r
1584IsTDStatusStalled (\r
1585 IN TD_STRUCT *ptrTDStruct\r
562d2849 1586 )\r
1587/*++\r
1588\r
1589Routine Description:\r
1590\r
1591 Indicate whether TD status stalled or not\r
1592\r
1593Arguments:\r
1594\r
1595 ptrTDStruct - A point to TD_STRUCT\r
1596\r
1597Returns:\r
1598\r
1599 TRUE - Stalled\r
1600 FALSE - not stalled\r
1601\r
1602--*/\r
1603;\r
878ddf1f 1604\r
1605BOOLEAN\r
1606IsTDStatusBufferError (\r
1607 IN TD_STRUCT *ptrTDStruct\r
562d2849 1608 )\r
1609/*++\r
1610\r
1611Routine Description:\r
1612\r
1613 Indicate whether TD status buffer error or not\r
1614\r
1615Arguments:\r
1616\r
1617 ptrTDStruct - A point to TD_STRUCT\r
1618\r
1619Returns:\r
1620\r
1621 TRUE - Buffer error\r
1622 FALSE - No error\r
1623\r
1624--*/\r
1625;\r
878ddf1f 1626\r
1627BOOLEAN\r
1628IsTDStatusBabbleError (\r
1629 IN TD_STRUCT *ptrTDStruct\r
562d2849 1630 )\r
1631/*++\r
1632\r
1633Routine Description:\r
1634\r
1635 Indicate whether TD status babble error or not\r
1636\r
1637Arguments:\r
1638\r
1639 ptrTDStruct - A point to TD_STRUCT\r
1640\r
1641Returns:\r
1642\r
1643 TRUE - Babble error\r
1644 FALSE - No error\r
1645\r
1646--*/\r
1647;\r
878ddf1f 1648\r
1649BOOLEAN\r
1650IsTDStatusNAKReceived (\r
1651 IN TD_STRUCT *ptrTDStruct\r
562d2849 1652 )\r
1653/*++\r
1654\r
1655Routine Description:\r
1656\r
1657 Indicate whether TD status NAK received\r
1658Arguments:\r
1659\r
1660 ptrTDStruct - A point to TD_STRUCT\r
1661\r
1662Returns:\r
1663\r
1664 TRUE - NAK received\r
1665 FALSE - NAK not received\r
1666\r
1667--*/\r
1668;\r
878ddf1f 1669\r
1670BOOLEAN\r
1671IsTDStatusCRCTimeOutError (\r
1672 IN TD_STRUCT *ptrTDStruct\r
562d2849 1673 )\r
1674/*++\r
1675\r
1676Routine Description:\r
1677\r
1678 Indicate whether TD status CRC timeout error or not\r
1679\r
1680Arguments:\r
1681\r
1682 ptrTDStruct - A point to TD_STRUCT\r
1683 \r
1684Returns:\r
1685\r
1686 TRUE - CRC timeout error\r
1687 FALSE - CRC timeout no error\r
1688\r
1689--*/\r
1690;\r
878ddf1f 1691\r
1692BOOLEAN\r
1693IsTDStatusBitStuffError (\r
1694 IN TD_STRUCT *ptrTDStruct\r
562d2849 1695 )\r
1696/*++\r
1697\r
1698Routine Description:\r
1699\r
1700 Indicate whether TD status bit stuff error or not\r
1701\r
1702Arguments:\r
1703\r
1704 ptrTDStruct - A point to TD_STRUCT\r
1705\r
1706Returns:\r
1707\r
1708 TRUE - Bit stuff error\r
1709 FALSE - Bit stuff no error\r
1710\r
1711--*/\r
1712;\r
878ddf1f 1713\r
1714UINT16\r
1715GetTDStatusActualLength (\r
1716 IN TD_STRUCT *ptrTDStruct\r
562d2849 1717 )\r
1718/*++\r
1719\r
1720Routine Description:\r
1721\r
1722 Get TD status length\r
1723\r
1724Arguments:\r
1725\r
1726 ptrTDStruct - A point to TD_STRUCT\r
1727\r
1728Returns:\r
1729\r
1730 Return Td status length\r
1731\r
1732--*/\r
1733;\r
878ddf1f 1734\r
1735UINT16\r
1736GetTDTokenMaxLength (\r
1737 IN TD_STRUCT *ptrTDStruct\r
562d2849 1738 )\r
1739/*++\r
1740\r
1741Routine Description:\r
1742\r
1743 Get TD Token maximum length\r
1744\r
1745Arguments:\r
1746\r
1747 ptrTDStruct - A point to TD_STRUCT\r
1748\r
1749Returns:\r
1750\r
1751 Return TD token maximum length\r
1752\r
1753--*/\r
1754;\r
878ddf1f 1755\r
1756UINT8\r
1757GetTDTokenEndPoint (\r
1758 IN TD_STRUCT *ptrTDStruct\r
562d2849 1759 )\r
1760/*++\r
1761\r
1762Routine Description:\r
1763\r
1764 Get TD Token endpoint number\r
1765\r
1766Arguments:\r
1767\r
1768 ptrTDStruct - A point to TD_STRUCT\r
1769\r
1770Returns:\r
1771\r
1772 Return TD Token endpoint number\r
1773\r
1774--*/\r
1775;\r
878ddf1f 1776\r
1777UINT8\r
1778GetTDTokenDeviceAddress (\r
1779 IN TD_STRUCT *ptrTDStruct\r
562d2849 1780 )\r
1781/*++\r
1782\r
1783Routine Description:\r
1784\r
1785 Get TD Token device address\r
1786\r
1787Arguments:\r
1788\r
1789 ptrTDStruct - A point to TD_STRUCT\r
1790\r
1791Returns:\r
1792\r
1793 Return TD Token device address\r
1794\r
1795--*/\r
1796;\r
878ddf1f 1797\r
1798UINT8\r
1799GetTDTokenPacketID (\r
1800 IN TD_STRUCT *ptrTDStruct\r
562d2849 1801 )\r
1802/*++\r
1803\r
1804Routine Description:\r
1805\r
1806 Get TD Token packet ID\r
1807\r
1808Arguments:\r
1809\r
1810 ptrTDStruct - A point to TD_STRUCT\r
878ddf1f 1811\r
562d2849 1812Returns:\r
1813\r
1814 Return TD Token packet ID\r
1815\r
1816--*/\r
1817;\r
1818\r
1819UINT8 *\r
878ddf1f 1820GetTDDataBuffer (\r
1821 IN TD_STRUCT *ptrTDStruct\r
562d2849 1822 )\r
1823/*++\r
1824\r
1825Routine Description:\r
1826\r
1827 Get the point to TD data buffer\r
1828\r
1829Arguments:\r
1830\r
1831 ptrTDStruct - A point to TD_STRUCT\r
1832\r
1833Returns:\r
1834\r
1835 Return a point to TD data buffer\r
1836\r
1837--*/\r
1838;\r
878ddf1f 1839\r
1840BOOLEAN\r
1841GetTDLinkPtrValidorInvalid (\r
1842 IN TD_STRUCT *ptrTDStruct\r
562d2849 1843 )\r
1844/*++\r
1845\r
1846Routine Description:\r
1847\r
1848 Get TD LinkPtr valid or not\r
1849\r
1850Arguments:\r
1851\r
1852 ptrTDStruct - A point to TD_STRUCT\r
1853\r
1854Returns:\r
1855\r
1856 TRUE - Invalid\r
1857 FALSE - Valid\r
1858\r
1859--*/\r
1860;\r
878ddf1f 1861\r
1862UINTN\r
1863CountTDsNumber (\r
1864 IN TD_STRUCT *ptrFirstTD\r
562d2849 1865 )\r
1866/*++\r
1867\r
1868Routine Description:\r
1869\r
1870 Get the number of TDs\r
1871\r
1872Arguments:\r
1873\r
1874 PtrFirstTD - A point to the first TD_STRUCT\r
1875\r
1876Returns:\r
1877\r
1878 Return the number of TDs\r
1879\r
1880--*/\r
1881;\r
878ddf1f 1882\r
1883VOID\r
1884LinkTDToQH (\r
1885 IN QH_STRUCT *ptrQH,\r
1886 IN TD_STRUCT *ptrTD\r
562d2849 1887 )\r
1888/*++\r
1889\r
1890Routine Description:\r
1891\r
1892 Link TD To QH\r
1893\r
1894Arguments:\r
1895\r
1896 PtrQH - QH_STRUCT\r
1897 PtrTD - TD_STRUCT\r
1898Returns:\r
1899\r
1900 VOID\r
1901\r
1902--*/\r
1903;\r
878ddf1f 1904\r
1905VOID\r
1906LinkTDToTD (\r
1907 IN TD_STRUCT *ptrPreTD,\r
1908 IN TD_STRUCT *ptrTD\r
562d2849 1909 )\r
1910/*++\r
1911\r
1912Routine Description:\r
1913\r
1914 Link TD To TD\r
1915\r
1916Arguments:\r
1917\r
1918 ptrPreTD - Previous TD_STRUCT to be linked\r
1919 PtrTD - TD_STRUCT to link\r
1920Returns:\r
1921\r
1922 VOID\r
1923\r
1924--*/\r
1925;\r
878ddf1f 1926\r
1927VOID\r
1928SetorClearCurFrameListTerminate (\r
1929 IN FRAMELIST_ENTRY *pCurEntry,\r
1930 IN BOOLEAN bSet\r
562d2849 1931 )\r
1932/*++\r
1933\r
1934Routine Description:\r
1935\r
1936 Set or clear current framelist terminate\r
1937\r
1938Arguments:\r
1939\r
1940 pCurEntry - A point to FRAMELIST_ENTITY\r
1941 IsSet - TRUE to empty the frame and indicate the Pointer field is valid\r
1942\r
1943Returns:\r
1944\r
1945 VOID\r
1946\r
1947--*/\r
1948;\r
1949\r
1950VOID\r
1951SetCurFrameListQHorTD (\r
1952 IN FRAMELIST_ENTRY *pCurEntry,\r
1953 IN BOOLEAN bQH\r
1954 )\r
1955/*++\r
1956\r
1957Routine Description:\r
1958\r
1959 Set current framelist QH or TD\r
1960\r
1961Arguments:\r
1962\r
1963 pCurEntry - A point to FRAMELIST_ENTITY\r
1964 IsQH - TRUE to set QH and FALSE to set TD\r
1965\r
1966Returns:\r
878ddf1f 1967\r
562d2849 1968 VOID\r
1969\r
1970--*/\r
1971;\r
878ddf1f 1972\r
1973BOOLEAN\r
1974GetCurFrameListTerminate (\r
1975 IN FRAMELIST_ENTRY *pCurEntry\r
562d2849 1976 )\r
1977/*++\r
1978\r
1979Routine Description:\r
1980\r
1981 Get current framelist terminate\r
1982\r
1983Arguments:\r
1984\r
1985 pCurEntry - A point to FRAMELIST_ENTITY\r
1986\r
1987Returns:\r
1988\r
1989 TRUE - Terminate\r
1990 FALSE - Not terminate\r
1991\r
1992--*/\r
1993;\r
878ddf1f 1994\r
1995VOID\r
1996SetCurFrameListPointer (\r
1997 IN FRAMELIST_ENTRY *pCurEntry,\r
1998 IN UINT8 *ptr\r
562d2849 1999 )\r
2000/*++\r
2001\r
2002Routine Description:\r
2003\r
2004 Set current framelist pointer\r
2005\r
2006Arguments:\r
2007\r
2008 pCurEntry - A point to FRAMELIST_ENTITY\r
2009 ptr - A point to FrameListPtr point to\r
2010\r
2011Returns:\r
2012\r
2013 VOID\r
2014 \r
2015--*/\r
2016;\r
878ddf1f 2017\r
562d2849 2018VOID *\r
878ddf1f 2019GetCurFrameListPointer (\r
2020 IN FRAMELIST_ENTRY *pCurEntry\r
562d2849 2021 )\r
2022/*++\r
2023\r
2024Routine Description:\r
2025\r
2026 Get current framelist pointer\r
2027\r
2028Arguments:\r
2029\r
2030 pCurEntry - A point to FRAMELIST_ENTITY\r
2031\r
2032Returns:\r
2033\r
2034 A point FrameListPtr point to\r
2035\r
2036--*/\r
2037;\r
878ddf1f 2038\r
2039VOID\r
2040LinkQHToFrameList (\r
2041 IN FRAMELIST_ENTRY *pEntry,\r
2042 IN UINT16 FrameListIndex,\r
2043 IN QH_STRUCT *ptrQH\r
562d2849 2044 )\r
878ddf1f 2045/*++\r
2046\r
2047Routine Description:\r
2048\r
2049 Link QH To Frame List\r
2050\r
2051Arguments:\r
2052\r
2053 pEntry - FRAMELIST_ENTRY\r
2054 FrameListIndex - Frame List Index\r
2055 PtrQH - QH to link \r
2056Returns:\r
2057\r
2058 VOID\r
2059\r
2060--*/\r
562d2849 2061;\r
878ddf1f 2062\r
2063VOID\r
2064DelLinkSingleQH (\r
2065 IN USB_HC_DEV *HcDev,\r
2066 IN QH_STRUCT *ptrQH,\r
2067 IN UINT16 FrameListIndex,\r
2068 IN BOOLEAN SearchOther,\r
2069 IN BOOLEAN Delete\r
562d2849 2070 )\r
2071/*++\r
2072\r
2073Routine Description:\r
2074\r
2075 Unlink from frame list and delete single QH\r
2076 \r
2077Arguments:\r
2078\r
2079 HcDev - USB_HC_DEV\r
2080 PtrQH - QH_STRUCT\r
2081 FrameListIndex - Frame List Index\r
2082 SearchOther - Search Other QH\r
2083 Delete - TRUE is to delete the QH\r
2084 \r
2085Returns:\r
2086\r
2087 VOID\r
2088 \r
2089--*/\r
2090;\r
878ddf1f 2091\r
2092VOID\r
2093DeleteQueuedTDs (\r
2094 IN USB_HC_DEV *HcDev,\r
2095 IN TD_STRUCT *ptrFirstTD\r
562d2849 2096 )\r
2097/*++\r
2098\r
2099Routine Description:\r
2100\r
2101 Delete Queued TDs\r
2102 \r
2103Arguments:\r
2104\r
2105 HcDev - USB_HC_DEV\r
2106 PtrFirstTD - TD link list head\r
2107\r
2108Returns:\r
2109\r
2110 VOID\r
2111\r
2112--*/\r
2113;\r
878ddf1f 2114\r
2115VOID\r
2116InsertQHTDToINTList (\r
2117 IN USB_HC_DEV *HcDev,\r
2118 IN QH_STRUCT *ptrQH,\r
2119 IN TD_STRUCT *ptrFirstTD,\r
2120 IN UINT8 DeviceAddress,\r
2121 IN UINT8 EndPointAddress,\r
2122 IN UINT8 DataToggle,\r
2123 IN UINTN DataLength,\r
2124 IN UINTN PollingInterval,\r
2125 IN VOID *Mapping,\r
2126 IN UINT8 *DataBuffer,\r
2127 IN EFI_ASYNC_USB_TRANSFER_CALLBACK CallBackFunction,\r
2128 IN VOID *Context\r
562d2849 2129 )\r
878ddf1f 2130/*++\r
2131Routine Description:\r
562d2849 2132\r
878ddf1f 2133 Insert QH and TD To Interrupt List\r
562d2849 2134\r
878ddf1f 2135Arguments:\r
2136\r
2137 HcDev - USB_HC_DEV\r
2138 PtrQH - QH_STRUCT\r
2139 PtrFirstTD - First TD_STRUCT\r
2140 DeviceAddress - Device Address\r
2141 EndPointAddress - EndPoint Address\r
2142 DataToggle - Data Toggle\r
2143 DataLength - Data length \r
2144 PollingInterval - Polling Interval when inserted to frame list\r
2145 Mapping - Mapping alue \r
2146 DataBuffer - Data buffer\r
2147 CallBackFunction- CallBackFunction after interrupt transfeer\r
2148 Context - CallBackFunction Context passed as function parameter\r
562d2849 2149\r
878ddf1f 2150Returns:\r
562d2849 2151\r
878ddf1f 2152 EFI_SUCCESS - Sucess\r
2153 EFI_INVALID_PARAMETER - Paremeter is error \r
2154\r
2155--*/\r
562d2849 2156;\r
878ddf1f 2157\r
2158EFI_STATUS\r
2159DeleteAsyncINTQHTDs (\r
2160 IN USB_HC_DEV *HcDev,\r
2161 IN UINT8 DeviceAddress,\r
2162 IN UINT8 EndPointAddress,\r
2163 OUT UINT8 *DataToggle\r
562d2849 2164 )\r
878ddf1f 2165/*++\r
2166Routine Description:\r
2167\r
2168 Delete Async INT QH and TDs\r
562d2849 2169 \r
878ddf1f 2170Arguments:\r
2171\r
2172 HcDev - USB_HC_DEV\r
2173 DeviceAddress - Device Address\r
2174 EndPointAddress - EndPoint Address\r
2175 DataToggle - Data Toggle\r
2176\r
2177Returns:\r
562d2849 2178\r
878ddf1f 2179 EFI_SUCCESS - Sucess\r
2180 EFI_INVALID_PARAMETER - Paremeter is error \r
2181\r
2182--*/\r
562d2849 2183;\r
2184\r
878ddf1f 2185BOOLEAN\r
2186CheckTDsResults (\r
2187 IN TD_STRUCT *ptrTD,\r
2188 IN UINTN RequiredLen,\r
2189 OUT UINT32 *Result,\r
2190 OUT UINTN *ErrTDPos,\r
2191 OUT UINTN *ActualTransferSize\r
562d2849 2192 )\r
878ddf1f 2193/*++\r
2194\r
2195Routine Description:\r
2196\r
2197 Check TDs Results\r
2198\r
2199Arguments:\r
2200\r
2201 PtrTD - TD_STRUCT to check\r
2202 RequiredLen - Required Len\r
2203 Result - Transfer result\r
2204 ErrTDPos - Error TD Position\r
2205 ActualTransferSize - Actual Transfer Size\r
2206\r
2207Returns:\r
2208\r
2209 TRUE - Sucess\r
2210 FALSE - Fail\r
2211\r
2212--*/\r
562d2849 2213;\r
2214\r
878ddf1f 2215VOID\r
2216ExecuteAsyncINTTDs (\r
2217 IN USB_HC_DEV *HcDev,\r
2218 IN INTERRUPT_LIST *ptrList,\r
2219 OUT UINT32 *Result,\r
2220 OUT UINTN *ErrTDPos,\r
2221 OUT UINTN *ActualLen\r
562d2849 2222 )\r
878ddf1f 2223/*++\r
2224\r
2225Routine Description:\r
2226\r
2227 Execute Async Interrupt TDs\r
2228\r
2229Arguments:\r
2230\r
2231 HcDev - USB_HC_DEV\r
2232 PtrList - INTERRUPT_LIST\r
2233 Result - Transfer result\r
2234 ErrTDPos - Error TD Position\r
2235 ActualTransferSize - Actual Transfer Size\r
2236 \r
2237Returns:\r
2238\r
2239 VOID\r
2240\r
2241--*/\r
562d2849 2242;\r
2243\r
878ddf1f 2244VOID\r
2245UpdateAsyncINTQHTDs (\r
2246 IN INTERRUPT_LIST *ptrList,\r
2247 IN UINT32 Result,\r
2248 IN UINT32 ErrTDPos\r
562d2849 2249 )\r
878ddf1f 2250/*++\r
2251\r
2252Routine Description:\r
2253\r
2254 Update Async Interrupt QH and TDs\r
2255\r
2256Arguments:\r
2257\r
2258 PtrList - INTERRUPT_LIST\r
2259 Result - Transfer reslut\r
2260 ErrTDPos - Error TD Position\r
2261\r
2262Returns:\r
2263\r
2264 VOID\r
2265\r
2266--*/\r
562d2849 2267;\r
2268\r
878ddf1f 2269VOID\r
2270ReleaseInterruptList (\r
2271 IN USB_HC_DEV *HcDev,\r
2272 IN LIST_ENTRY *ListHead\r
562d2849 2273 )\r
878ddf1f 2274/*++\r
2275\r
2276Routine Description:\r
2277\r
2278 Release Interrupt List\r
562d2849 2279 \r
878ddf1f 2280Arguments:\r
2281\r
2282 HcDev - USB_HC_DEV\r
2283 ListHead - List head\r
2284\r
2285Returns:\r
2286\r
2287 VOID\r
2288\r
2289--*/\r
562d2849 2290;\r
2291\r
878ddf1f 2292EFI_STATUS\r
2293ExecuteControlTransfer (\r
2294 IN USB_HC_DEV *HcDev,\r
2295 IN TD_STRUCT *ptrTD,\r
2296 IN UINT32 wIndex,\r
2297 OUT UINTN *ActualLen,\r
2298 IN UINTN TimeOut,\r
2299 OUT UINT32 *TransferResult\r
562d2849 2300 )\r
878ddf1f 2301/*++\r
2302\r
2303Routine Description:\r
2304\r
2305 Execute Control Transfer\r
2306\r
2307Arguments:\r
2308\r
2309 HcDev - USB_HC_DEV\r
2310 PtrTD - TD_STRUCT\r
2311 wIndex - No use\r
2312 ActualLen - Actual transfered Len \r
2313 TimeOut - TimeOut value in milliseconds\r
2314 TransferResult - Transfer result\r
2315Returns:\r
2316\r
2317 EFI_SUCCESS - Sucess\r
2318 EFI_DEVICE_ERROR - Error\r
2319 \r
2320\r
2321--*/\r
562d2849 2322;\r
2323\r
878ddf1f 2324EFI_STATUS\r
2325ExecBulkorSyncInterruptTransfer (\r
2326 IN USB_HC_DEV *HcDev,\r
2327 IN TD_STRUCT *ptrTD,\r
2328 IN UINT32 wIndex,\r
2329 OUT UINTN *ActualLen,\r
2330 OUT UINT8 *DataToggle,\r
2331 IN UINTN TimeOut,\r
2332 OUT UINT32 *TransferResult\r
562d2849 2333 )\r
878ddf1f 2334/*++\r
2335\r
2336Routine Description:\r
2337\r
2338 Execute Bulk or SyncInterrupt Transfer\r
2339\r
2340Arguments:\r
2341\r
2342 HcDev - USB_HC_DEV\r
2343 PtrTD - TD_STRUCT\r
2344 wIndex - No use\r
2345 ActualLen - Actual transfered Len \r
2346 DataToggle - Data Toggle\r
2347 TimeOut - TimeOut value in milliseconds\r
2348 TransferResult - Transfer result\r
2349Returns:\r
2350\r
2351 EFI_SUCCESS - Sucess\r
2352 EFI_DEVICE_ERROR - Error\r
2353--*/\r
562d2849 2354;\r
878ddf1f 2355\r
2356EFI_STATUS\r
2357InitializeMemoryManagement (\r
2358 IN USB_HC_DEV *HcDev\r
562d2849 2359 )\r
2360/*++\r
2361\r
2362Routine Description:\r
2363\r
2364 Initialize Memory Management\r
2365\r
2366Arguments:\r
2367\r
2368 HcDev - USB_HC_DEV\r
2369\r
2370Returns:\r
2371\r
2372 EFI_SUCCESS - Success\r
2373 \r
2374--*/\r
2375;\r
878ddf1f 2376\r
2377EFI_STATUS\r
2378CreateMemoryBlock (\r
2379 IN USB_HC_DEV *HcDev,\r
2380 IN MEMORY_MANAGE_HEADER **MemoryHeader,\r
2381 IN UINTN MemoryBlockSizeInPages\r
562d2849 2382 )\r
2383/*++\r
2384\r
2385Routine Description:\r
2386\r
2387 Use PciIo->AllocateBuffer to allocate common buffer for the memory block,\r
2388 and use PciIo->Map to map the common buffer for Bus Master Read/Write.\r
2389\r
2390\r
2391Arguments:\r
2392\r
2393 HcDev - USB_HC_DEV\r
2394 MemoryHeader - MEMORY_MANAGE_HEADER to output\r
2395 MemoryBlockSizeInPages - MemoryBlockSizeInPages\r
2396 \r
2397Returns:\r
2398\r
2399 EFI_SUCCESS - Success\r
2400 EFI_OUT_OF_RESOURCES - Out of resources\r
2401 EFI_UNSUPPORTED - Unsupported\r
2402\r
2403--*/\r
2404;\r
878ddf1f 2405\r
2406EFI_STATUS\r
2407FreeMemoryHeader (\r
2408 IN USB_HC_DEV *HcDev,\r
2409 IN MEMORY_MANAGE_HEADER *MemoryHeader\r
562d2849 2410 )\r
2411/*++\r
2412\r
2413Routine Description:\r
2414\r
2415 Free Memory Header\r
2416\r
2417Arguments:\r
2418\r
2419 HcDev - USB_HC_DEV\r
2420 MemoryHeader - MemoryHeader to be freed\r
2421\r
2422Returns:\r
2423\r
2424 EFI_INVALID_PARAMETER - Parameter is error\r
2425 EFI_SUCCESS - Success\r
2426\r
2427--*/\r
2428;\r
878ddf1f 2429\r
2430EFI_STATUS\r
2431UhciAllocatePool (\r
2432 IN USB_HC_DEV *UhcDev,\r
2433 IN UINT8 **Pool,\r
2434 IN UINTN AllocSize\r
562d2849 2435 )\r
2436/*++\r
2437\r
2438Routine Description:\r
2439\r
2440 Uhci Allocate Pool\r
2441\r
2442Arguments:\r
2443\r
2444 HcDev - USB_HC_DEV\r
2445 Pool - Place to store pointer to the memory buffer\r
2446 AllocSize - Alloc Size\r
2447\r
2448Returns:\r
2449\r
2450 EFI_SUCCESS - Success\r
2451\r
2452--*/\r
2453;\r
878ddf1f 2454\r
2455VOID\r
2456UhciFreePool (\r
2457 IN USB_HC_DEV *HcDev,\r
2458 IN UINT8 *Pool,\r
2459 IN UINTN AllocSize\r
562d2849 2460 )\r
2461/*++\r
2462\r
2463Routine Description:\r
2464\r
2465 Uhci Free Pool\r
2466\r
2467Arguments:\r
2468\r
2469 HcDev - USB_HC_DEV\r
2470 Pool - Pool to free\r
2471 AllocSize - Pool size\r
2472\r
2473Returns:\r
2474\r
2475 VOID\r
2476\r
2477--*/\r
2478;\r
878ddf1f 2479\r
2480VOID\r
2481InsertMemoryHeaderToList (\r
2482 IN MEMORY_MANAGE_HEADER *MemoryHeader,\r
2483 IN MEMORY_MANAGE_HEADER *NewMemoryHeader\r
562d2849 2484 )\r
2485/*++\r
2486\r
2487Routine Description:\r
2488\r
2489 Insert Memory Header To List\r
2490\r
2491Arguments:\r
2492\r
2493 MemoryHeader - MEMORY_MANAGE_HEADER\r
2494 NewMemoryHeader - MEMORY_MANAGE_HEADER\r
2495\r
2496Returns:\r
2497\r
2498 VOID\r
2499\r
2500--*/\r
2501;\r
878ddf1f 2502\r
2503EFI_STATUS\r
2504AllocMemInMemoryBlock (\r
2505 IN MEMORY_MANAGE_HEADER *MemoryHeader,\r
2506 IN VOID **Pool,\r
2507 IN UINTN NumberOfMemoryUnit\r
562d2849 2508 )\r
2509/*++\r
2510\r
2511Routine Description:\r
2512\r
2513 Alloc Memory In MemoryBlock\r
2514\r
2515Arguments:\r
2516\r
2517 MemoryHeader - MEMORY_MANAGE_HEADER\r
2518 Pool - Place to store pointer to memory\r
2519 NumberOfMemoryUnit - Number Of Memory Unit\r
2520\r
2521Returns:\r
2522\r
2523 EFI_NOT_FOUND - Can't find the free memory \r
2524 EFI_SUCCESS - Success\r
2525\r
2526--*/\r
2527;\r
878ddf1f 2528\r
2529BOOLEAN\r
2530IsMemoryBlockEmptied (\r
2531 IN MEMORY_MANAGE_HEADER *MemoryHeaderPtr\r
562d2849 2532 )\r
2533/*++\r
2534\r
562d2849 2535Routine Description:\r
2536\r
2537 Is Memory Block Emptied\r
2538\r
2539Arguments:\r
2540\r
2541 MemoryHeaderPtr - MEMORY_MANAGE_HEADER\r
2542\r
2543Returns:\r
2544\r
2545 TRUE - Empty\r
2546 FALSE - Not Empty \r
2547\r
2548--*/\r
2549;\r
878ddf1f 2550\r
2551VOID\r
2552DelinkMemoryBlock (\r
2553 IN MEMORY_MANAGE_HEADER *FirstMemoryHeader,\r
2554 IN MEMORY_MANAGE_HEADER *FreeMemoryHeader\r
562d2849 2555 )\r
2556/*++\r
2557\r
2558Routine Description:\r
2559\r
2560 Delink Memory Block\r
2561\r
2562Arguments:\r
2563\r
2564 FirstMemoryHeader - MEMORY_MANAGE_HEADER\r
2565 NeedFreeMemoryHeader - MEMORY_MANAGE_HEADER\r
2566\r
2567Returns:\r
2568\r
2569 VOID\r
2570\r
2571--*/\r
2572;\r
878ddf1f 2573\r
2574EFI_STATUS\r
2575DelMemoryManagement (\r
2576 IN USB_HC_DEV *HcDev\r
562d2849 2577 )\r
2578/*++\r
2579\r
2580Routine Description:\r
2581\r
2582 Delete Memory Management\r
2583\r
2584Arguments:\r
2585\r
2586 HcDev - USB_HC_DEV\r
2587\r
2588Returns:\r
2589\r
2590 EFI_SUCCESS - Success\r
2591\r
2592--*/\r
2593;\r
878ddf1f 2594\r
2595VOID\r
2596EnableMaxPacketSize (\r
2597 IN USB_HC_DEV *HcDev\r
562d2849 2598 )\r
2599/*++\r
2600\r
2601Routine Description:\r
2602\r
2603 Enable Max Packet Size\r
2604\r
2605Arguments:\r
2606\r
2607 HcDev - USB_HC_DEV\r
2608\r
2609Returns:\r
2610\r
2611 VOID\r
2612\r
2613--*/\r
2614;\r
878ddf1f 2615\r
2616VOID\r
2617CleanUsbTransactions (\r
2618 IN USB_HC_DEV *HcDev\r
562d2849 2619 )\r
2620/*++\r
2621\r
2622Routine Description:\r
2623\r
2624 Clean USB Transactions\r
2625\r
2626Arguments:\r
2627\r
2628 HcDev - A point to USB_HC_DEV\r
2629\r
2630Returns:\r
2631\r
2632 VOID\r
2633\r
2634--*/\r
2635;\r
878ddf1f 2636\r
2637VOID\r
2638TurnOffUSBEmulation (\r
2639 IN EFI_PCI_IO_PROTOCOL *PciIo\r
562d2849 2640 )\r
2641/*++\r
2642\r
2643Routine Description:\r
2644\r
2645 Set current framelist QH or TD\r
2646\r
2647Arguments:\r
2648\r
2649 pCurEntry - A point to FRAMELIST_ENTITY\r
2650 IsQH - TRUE to set QH and FALSE to set TD\r
2651\r
2652Returns:\r
2653\r
2654 VOID\r
2655\r
2656--*/\r
2657;\r
878ddf1f 2658\r
92dda53e 2659//\r
2660// Prototypes\r
2661// Driver model protocol interface\r
2662//\r
2663\r
2664EFI_STATUS\r
2665EFIAPI\r
2666UHCIDriverBindingSupported (\r
2667 IN EFI_DRIVER_BINDING_PROTOCOL *This,\r
2668 IN EFI_HANDLE Controller,\r
2669 IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath\r
2670 );\r
2671\r
2672EFI_STATUS\r
2673EFIAPI\r
2674UHCIDriverBindingStart (\r
2675 IN EFI_DRIVER_BINDING_PROTOCOL *This,\r
2676 IN EFI_HANDLE Controller,\r
2677 IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath\r
2678 );\r
2679\r
2680EFI_STATUS\r
2681EFIAPI\r
2682UHCIDriverBindingStop (\r
2683 IN EFI_DRIVER_BINDING_PROTOCOL *This,\r
2684 IN EFI_HANDLE Controller,\r
2685 IN UINTN NumberOfChildren,\r
2686 IN EFI_HANDLE *ChildHandleBuffer\r
2687 );\r
2688\r
2689//\r
2690// UHCI interface functions\r
2691//\r
2692\r
2693EFI_STATUS\r
2694EFIAPI\r
2695UHCIReset (\r
2696 IN EFI_USB_HC_PROTOCOL *This,\r
2697 IN UINT16 Attributes\r
2698 );\r
2699\r
2700EFI_STATUS\r
2701EFIAPI\r
2702UHCIGetState (\r
2703 IN EFI_USB_HC_PROTOCOL *This,\r
2704 OUT EFI_USB_HC_STATE *State\r
2705 );\r
2706\r
2707EFI_STATUS\r
2708EFIAPI\r
2709UHCISetState (\r
2710 IN EFI_USB_HC_PROTOCOL *This,\r
2711 IN EFI_USB_HC_STATE State\r
2712 );\r
2713\r
2714EFI_STATUS\r
2715EFIAPI\r
2716UHCIControlTransfer (\r
2717 IN EFI_USB_HC_PROTOCOL *This,\r
2718 IN UINT8 DeviceAddress,\r
2719 IN BOOLEAN IsSlowDevice,\r
2720 IN UINT8 MaximumPacketLength,\r
2721 IN EFI_USB_DEVICE_REQUEST *Request,\r
2722 IN EFI_USB_DATA_DIRECTION TransferDirection,\r
2723 IN OUT VOID *Data, OPTIONAL\r
2724 IN OUT UINTN *DataLength, OPTIONAL\r
2725 IN UINTN TimeOut,\r
2726 OUT UINT32 *TransferResult\r
2727 );\r
2728\r
2729EFI_STATUS\r
2730EFIAPI\r
2731UHCIBulkTransfer (\r
2732 IN EFI_USB_HC_PROTOCOL *This,\r
2733 IN UINT8 DeviceAddress,\r
2734 IN UINT8 EndPointAddress,\r
2735 IN UINT8 MaximumPacketLength,\r
2736 IN OUT VOID *Data,\r
2737 IN OUT UINTN *DataLength,\r
2738 IN OUT UINT8 *DataToggle,\r
2739 IN UINTN TimeOut,\r
2740 OUT UINT32 *TransferResult\r
2741 );\r
2742\r
2743EFI_STATUS\r
2744EFIAPI\r
2745UHCIAsyncInterruptTransfer (\r
2746 IN EFI_USB_HC_PROTOCOL * This,\r
2747 IN UINT8 DeviceAddress,\r
2748 IN UINT8 EndPointAddress,\r
2749 IN BOOLEAN IsSlowDevice,\r
2750 IN UINT8 MaximumPacketLength,\r
2751 IN BOOLEAN IsNewTransfer,\r
2752 IN OUT UINT8 *DataToggle,\r
2753 IN UINTN PollingInterval, OPTIONAL\r
2754 IN UINTN DataLength, OPTIONAL\r
2755 IN EFI_ASYNC_USB_TRANSFER_CALLBACK CallBackFunction, OPTIONAL\r
2756 IN VOID *Context OPTIONAL\r
2757 );\r
2758\r
2759EFI_STATUS\r
2760EFIAPI\r
2761UHCISyncInterruptTransfer (\r
2762 IN EFI_USB_HC_PROTOCOL *This,\r
2763 IN UINT8 DeviceAddress,\r
2764 IN UINT8 EndPointAddress,\r
2765 IN BOOLEAN IsSlowDevice,\r
2766 IN UINT8 MaximumPacketLength,\r
2767 IN OUT VOID *Data,\r
2768 IN OUT UINTN *DataLength,\r
2769 IN OUT UINT8 *DataToggle,\r
2770 IN UINTN TimeOut,\r
2771 OUT UINT32 *TransferResult\r
2772 );\r
2773\r
2774EFI_STATUS\r
2775EFIAPI\r
2776UHCIIsochronousTransfer (\r
2777 IN EFI_USB_HC_PROTOCOL *This,\r
2778 IN UINT8 DeviceAddress,\r
2779 IN UINT8 EndPointAddress,\r
2780 IN UINT8 MaximumPacketLength,\r
2781 IN OUT VOID *Data,\r
2782 IN UINTN DataLength,\r
2783 OUT UINT32 *TransferResult\r
2784 );\r
2785\r
2786EFI_STATUS\r
2787EFIAPI\r
2788UHCIAsyncIsochronousTransfer (\r
2789 IN EFI_USB_HC_PROTOCOL * This,\r
2790 IN UINT8 DeviceAddress,\r
2791 IN UINT8 EndPointAddress,\r
2792 IN UINT8 MaximumPacketLength,\r
2793 IN OUT VOID *Data,\r
2794 IN UINTN DataLength,\r
2795 IN EFI_ASYNC_USB_TRANSFER_CALLBACK IsochronousCallBack,\r
2796 IN VOID *Context OPTIONAL\r
2797 );\r
2798\r
2799EFI_STATUS\r
2800EFIAPI\r
2801UHCIGetRootHubPortNumber (\r
2802 IN EFI_USB_HC_PROTOCOL *This,\r
2803 OUT UINT8 *PortNumber\r
2804 );\r
2805\r
2806EFI_STATUS\r
2807EFIAPI\r
2808UHCIGetRootHubPortStatus (\r
2809 IN EFI_USB_HC_PROTOCOL *This,\r
2810 IN UINT8 PortNumber,\r
2811 OUT EFI_USB_PORT_STATUS *PortStatus\r
2812 );\r
2813\r
2814EFI_STATUS\r
2815EFIAPI\r
2816UHCISetRootHubPortFeature (\r
2817 IN EFI_USB_HC_PROTOCOL *This,\r
2818 IN UINT8 PortNumber,\r
2819 IN EFI_USB_PORT_FEATURE PortFeature\r
2820 );\r
2821\r
2822EFI_STATUS\r
2823EFIAPI\r
2824UHCIClearRootHubPortFeature (\r
2825 IN EFI_USB_HC_PROTOCOL *This,\r
2826 IN UINT8 PortNumber,\r
2827 IN EFI_USB_PORT_FEATURE PortFeature\r
2828 );\r
2829\r
2830//\r
2831// UEFI 2.0 Protocol\r
2832//\r
2833\r
2834EFI_STATUS\r
2835EFIAPI\r
2836UHCI2GetCapability(\r
2837 IN EFI_USB2_HC_PROTOCOL * This,\r
2838 OUT UINT8 *MaxSpeed,\r
2839 OUT UINT8 *PortNumber,\r
2840 OUT UINT8 *Is64BitCapable\r
2841 );\r
2842\r
2843EFI_STATUS\r
2844EFIAPI\r
2845UHCI2Reset (\r
2846 IN EFI_USB2_HC_PROTOCOL * This,\r
2847 IN UINT16 Attributes\r
2848 );\r
2849\r
2850EFI_STATUS\r
2851EFIAPI\r
2852UHCI2GetState (\r
2853 IN EFI_USB2_HC_PROTOCOL * This,\r
2854 OUT EFI_USB_HC_STATE * State\r
2855 );\r
2856\r
2857EFI_STATUS\r
2858EFIAPI\r
2859UHCI2SetState (\r
2860 IN EFI_USB2_HC_PROTOCOL * This,\r
2861 IN EFI_USB_HC_STATE State\r
2862 );\r
2863\r
2864EFI_STATUS\r
2865EFIAPI\r
2866UHCI2ControlTransfer (\r
2867 IN EFI_USB2_HC_PROTOCOL * This,\r
2868 IN UINT8 DeviceAddress,\r
2869 IN UINT8 DeviceSpeed,\r
2870 IN UINTN MaximumPacketLength,\r
2871 IN EFI_USB_DEVICE_REQUEST * Request,\r
2872 IN EFI_USB_DATA_DIRECTION TransferDirection,\r
2873 IN OUT VOID *Data, OPTIONAL\r
2874 IN OUT UINTN *DataLength, OPTIONAL\r
2875 IN UINTN TimeOut,\r
2876 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,\r
2877 OUT UINT32 *TransferResult\r
2878 );\r
2879\r
2880EFI_STATUS\r
2881EFIAPI\r
2882UHCI2BulkTransfer (\r
2883 IN EFI_USB2_HC_PROTOCOL * This,\r
2884 IN UINT8 DeviceAddress,\r
2885 IN UINT8 EndPointAddress,\r
2886 IN UINT8 DeviceSpeed,\r
2887 IN UINTN MaximumPacketLength,\r
2888 IN UINT8 DataBuffersNumber,\r
2889 IN OUT VOID *Data[EFI_USB_MAX_BULK_BUFFER_NUM],\r
2890 IN OUT UINTN *DataLength,\r
2891 IN OUT UINT8 *DataToggle,\r
2892 IN UINTN TimeOut,\r
2893 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,\r
2894 OUT UINT32 *TransferResult\r
2895 );\r
2896\r
2897EFI_STATUS\r
2898EFIAPI\r
2899UHCI2AsyncInterruptTransfer (\r
2900 IN EFI_USB2_HC_PROTOCOL * This,\r
2901 IN UINT8 DeviceAddress,\r
2902 IN UINT8 EndPointAddress,\r
2903 IN UINT8 DeviceSpeed,\r
2904 IN UINTN MaximumPacketLength,\r
2905 IN BOOLEAN IsNewTransfer,\r
2906 IN OUT UINT8 *DataToggle,\r
2907 IN UINTN PollingInterval, OPTIONAL\r
2908 IN UINTN DataLength, OPTIONAL\r
2909 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,\r
2910 IN EFI_ASYNC_USB_TRANSFER_CALLBACK CallBackFunction, OPTIONAL\r
2911 IN VOID *Context OPTIONAL\r
2912 );\r
2913\r
2914EFI_STATUS\r
2915EFIAPI\r
2916UHCI2SyncInterruptTransfer (\r
2917 IN EFI_USB2_HC_PROTOCOL * This,\r
2918 IN UINT8 DeviceAddress,\r
2919 IN UINT8 EndPointAddress,\r
2920 IN UINT8 DeviceSpeed,\r
2921 IN UINTN MaximumPacketLength,\r
2922 IN OUT VOID *Data,\r
2923 IN OUT UINTN *DataLength,\r
2924 IN OUT UINT8 *DataToggle,\r
2925 IN UINTN TimeOut,\r
2926 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,\r
2927 OUT UINT32 *TransferResult\r
2928 );\r
2929\r
2930EFI_STATUS\r
2931EFIAPI\r
2932UHCI2IsochronousTransfer (\r
2933 IN EFI_USB2_HC_PROTOCOL * This,\r
2934 IN UINT8 DeviceAddress,\r
2935 IN UINT8 EndPointAddress,\r
2936 IN UINT8 DeviceSpeed,\r
2937 IN UINTN MaximumPacketLength,\r
2938 IN UINT8 DataBuffersNumber,\r
2939 IN OUT VOID *Data[EFI_USB_MAX_ISO_BUFFER_NUM],\r
2940 IN UINTN DataLength,\r
2941 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,\r
2942 OUT UINT32 *TransferResult\r
2943 );\r
2944\r
2945EFI_STATUS\r
2946EFIAPI\r
2947UHCI2AsyncIsochronousTransfer (\r
2948 IN EFI_USB2_HC_PROTOCOL * This,\r
2949 IN UINT8 DeviceAddress,\r
2950 IN UINT8 EndPointAddress,\r
2951 IN UINT8 DeviceSpeed,\r
2952 IN UINTN MaximumPacketLength,\r
2953 IN UINT8 DataBuffersNumber,\r
2954 IN OUT VOID *Data[EFI_USB_MAX_ISO_BUFFER_NUM],\r
2955 IN UINTN DataLength,\r
2956 IN EFI_USB2_HC_TRANSACTION_TRANSLATOR *Translator,\r
2957 IN EFI_ASYNC_USB_TRANSFER_CALLBACK IsochronousCallBack,\r
2958 IN VOID *Context OPTIONAL\r
2959 );\r
2960\r
2961EFI_STATUS\r
2962EFIAPI\r
2963UHCI2GetRootHubPortStatus (\r
2964 IN EFI_USB2_HC_PROTOCOL * This,\r
2965 IN UINT8 PortNumber,\r
2966 OUT EFI_USB_PORT_STATUS * PortStatus\r
2967 );\r
2968\r
2969EFI_STATUS\r
2970EFIAPI\r
2971UHCI2SetRootHubPortFeature (\r
2972 IN EFI_USB2_HC_PROTOCOL * This,\r
2973 IN UINT8 PortNumber,\r
2974 IN EFI_USB_PORT_FEATURE PortFeature\r
2975 );\r
2976\r
2977EFI_STATUS\r
2978EFIAPI\r
2979UHCI2ClearRootHubPortFeature (\r
2980 IN EFI_USB2_HC_PROTOCOL * This,\r
2981 IN UINT8 PortNumber,\r
2982 IN EFI_USB_PORT_FEATURE PortFeature\r
2983 );\r
2984\r
2985//\r
2986// Asynchronous interrupt transfer monitor function\r
2987//\r
2988VOID\r
2989EFIAPI\r
2990MonitorInterruptTrans (\r
2991 IN EFI_EVENT Event,\r
2992 IN VOID *Context\r
2993 );\r
2994\r
878ddf1f 2995#endif\r
EFI Development Kit II mirror for PVE