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98419ef4 1/** @file\r
2 The incompatible PCI device list\r
3\r
4Copyright (c) 2007 Intel Corporation. All rights reserved. <BR>\r
5This software and associated documentation (if any) is furnished\r
6under a license and may only be used or copied in accordance\r
7with the terms of the license. Except as permitted by such\r
8license, no part of this software or documentation may be\r
9reproduced, stored in a retrieval system, or transmitted in any\r
10form or by any means without the express written consent of\r
11Intel Corporation.\r
12\r
13**/\r
14\r
15#ifndef _EFI_INCOMPATIBLE_PCI_DEVICE_LIST_H\r
16#define _EFI_INCOMPATIBLE_PCI_DEVICE_LIST_H\r
17\r
18#include <IndustryStandard/pci22.h>\r
19#include <IndustryStandard/Acpi.h>\r
20\r
21\r
22#define PCI_DEVICE_ID(VendorId, DeviceId, Revision, SubVendorId, SubDeviceId) \\r
23 VendorId, DeviceId, Revision, SubVendorId, SubDeviceId\r
24\r
25#define PCI_BAR_TYPE_IO ACPI_ADDRESS_SPACE_TYPE_IO\r
26#define PCI_BAR_TYPE_MEM ACPI_ADDRESS_SPACE_TYPE_MEM\r
27\r
28#define DEVICE_INF_TAG 0xFFF2\r
29#define DEVICE_RES_TAG 0xFFF1\r
30#define LIST_END_TAG 0x0000\r
31\r
32//\r
33// descriptor for access width of incompatible PCI device\r
34//\r
35typedef struct {\r
36 UINT64 AccessType;\r
37 UINT64 AccessWidth;\r
38 EFI_PCI_REGISTER_ACCESS_DATA PciRegisterAccessData;\r
39} EFI_PCI_REGISTER_ACCESS_DESCRIPTOR;\r
40\r
41//\r
42// descriptor for register value of incompatible PCI device\r
43//\r
44typedef struct {\r
45 UINT64 AccessType;\r
46 UINT64 Offset;\r
47 EFI_PCI_REGISTER_VALUE_DATA PciRegisterValueData;\r
48} EFI_PCI_REGISTER_VALUE_DESCRIPTOR;\r
49\r
50\r
51//\r
52// the incompatible PCI devices list for ACPI resource\r
53//\r
54GLOBAL_REMOVE_IF_UNREFERENCED UINT64 IncompatiblePciDeviceListForResource[] = {\r
55 //\r
56 // DEVICE_INF_TAG,\r
57 // PCI_DEVICE_ID (VendorID, DeviceID, Revision, SubVendorId, SubDeviceId),\r
58 // DEVICE_RES_TAG,\r
59 // ResType, GFlag , SFlag, Granularity, RangeMin,\r
60 // RangeMax, Offset, AddrLen\r
61 //\r
62 //\r
63 // Device Adaptec 9004\r
64 //\r
65 DEVICE_INF_TAG,\r
66 PCI_DEVICE_ID(0x9004, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),\r
67 DEVICE_RES_TAG,\r
68 PCI_BAR_TYPE_IO,\r
69 PCI_ACPI_UNUSED,\r
70 PCI_ACPI_UNUSED,\r
71 PCI_ACPI_UNUSED,\r
72 PCI_ACPI_UNUSED,\r
73 PCI_BAR_EVEN_ALIGN,\r
74 PCI_BAR_ALL,\r
75 PCI_BAR_NOCHANGE,\r
76 //\r
77 // Device Adaptec 9005\r
78 //\r
79 DEVICE_INF_TAG,\r
80 PCI_DEVICE_ID(0x9005, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),\r
81 DEVICE_RES_TAG,\r
82 PCI_BAR_TYPE_IO,\r
83 PCI_ACPI_UNUSED,\r
84 PCI_ACPI_UNUSED,\r
85 PCI_ACPI_UNUSED,\r
86 PCI_ACPI_UNUSED,\r
87 PCI_BAR_EVEN_ALIGN,\r
88 PCI_BAR_ALL,\r
89 PCI_BAR_NOCHANGE,\r
90 //\r
91 // Device QLogic 1007\r
92 //\r
93 DEVICE_INF_TAG,\r
94 PCI_DEVICE_ID(0x1077, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),\r
95 DEVICE_RES_TAG,\r
96 PCI_BAR_TYPE_IO,\r
97 PCI_ACPI_UNUSED,\r
98 PCI_ACPI_UNUSED,\r
99 PCI_ACPI_UNUSED,\r
100 PCI_ACPI_UNUSED,\r
101 PCI_BAR_EVEN_ALIGN,\r
102 PCI_BAR_ALL,\r
103 PCI_BAR_NOCHANGE,\r
104 //\r
105 // Device Agilent 103C\r
106 //\r
107 DEVICE_INF_TAG,\r
108 PCI_DEVICE_ID(0x103C, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),\r
109 DEVICE_RES_TAG,\r
110 PCI_BAR_TYPE_IO,\r
111 PCI_ACPI_UNUSED,\r
112 PCI_ACPI_UNUSED,\r
113 PCI_ACPI_UNUSED,\r
114 PCI_ACPI_UNUSED,\r
115 PCI_BAR_EVEN_ALIGN,\r
116 PCI_BAR_ALL,\r
117 PCI_BAR_NOCHANGE,\r
118 //\r
119 // Device Agilent 15BC\r
120 //\r
121 DEVICE_INF_TAG,\r
122 PCI_DEVICE_ID(0x15BC, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),\r
123 DEVICE_RES_TAG,\r
124 PCI_BAR_TYPE_IO,\r
125 PCI_ACPI_UNUSED,\r
126 PCI_ACPI_UNUSED,\r
127 PCI_ACPI_UNUSED,\r
128 PCI_ACPI_UNUSED,\r
129 PCI_BAR_EVEN_ALIGN,\r
130 PCI_BAR_ALL,\r
131 PCI_BAR_NOCHANGE,\r
132 //\r
133 // The end of the list\r
134 //\r
135 LIST_END_TAG\r
136};\r
137\r
138//\r
139// the incompatible PCI devices list for the values of configuration registers\r
140//\r
141GLOBAL_REMOVE_IF_UNREFERENCED UINT64 IncompatiblePciDeviceListForRegister[] = {\r
142 //\r
143 // DEVICE_INF_TAG,\r
144 // PCI_DEVICE_ID (VendorID, DeviceID, Revision, SubVendorId, SubDeviceId),\r
145 // PCI_RES_TAG,\r
146 // PCI_ACCESS_TYPE, PCI_CONFIG_ADDRESS,\r
147 // AND_VALUE, OR_VALUE\r
148\r
149 //\r
150 // Device Lava 0x1407, DeviceId 0x0110\r
151 //\r
152 DEVICE_INF_TAG,\r
153 PCI_DEVICE_ID(0x1407, 0x0110, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),\r
154 DEVICE_RES_TAG,\r
155 PCI_REGISTER_READ,\r
156 PCI_CAPBILITY_POINTER_OFFSET,\r
157 0xffffff00,\r
158 VALUE_NOCARE,\r
159\r
160 //\r
161 // Device Lava 0x1407, DeviceId 0x0111\r
162 //\r
163 DEVICE_INF_TAG,\r
164 PCI_DEVICE_ID(0x1407, 0x0111, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),\r
165 DEVICE_RES_TAG,\r
166 PCI_REGISTER_READ,\r
167 PCI_CAPBILITY_POINTER_OFFSET,\r
168 0xffffff00,\r
169 VALUE_NOCARE,\r
170\r
171 //\r
172 // The end of the list\r
173 //\r
174 LIST_END_TAG\r
175};\r
176\r
177//\r
178// the incompatible PCI devices list for the access width of configuration registers\r
179//\r
180GLOBAL_REMOVE_IF_UNREFERENCED UINT64 DeviceListForAccessWidth[] = {\r
181 //\r
182 // DEVICE_INF_TAG,\r
183 // PCI_DEVICE_ID (VendorID, DeviceID, Revision, SubVendorId, SubDeviceId),\r
184 // DEVICE_RES_TAG,\r
185 // PCI_ACCESS_TYPE, PCI_ACCESS_WIDTH,\r
186 // START_ADDRESS, END_ADDRESS,\r
187 // ACTUAL_PCI_ACCESS_WIDTH,\r
188 //\r
189\r
190 //\r
191 // Sample Device\r
192 //\r
193 //DEVICE_INF_TAG,\r
194 //PCI_DEVICE_ID(0xXXXX, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE, DEVICE_ID_NOCARE),\r
195 //DEVICE_RES_TAG,\r
196 //PCI_REGISTER_READ,\r
197 //EfiPciWidthUint8,\r
198 //0,\r
199 //0xFF,\r
200 //EfiPciWidthUint32,\r
201 //\r
202\r
203 //\r
204 // The end of the list\r
205 //\r
206 LIST_END_TAG\r
207};\r
208\r
209#endif\r