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1 | /** @file\r |
2 | *\r | |
3 | * Copyright (c) 2012-2014, ARM Limited. All rights reserved.\r | |
4 | *\r | |
5 | * This program and the accompanying materials\r | |
6 | * are licensed and made available under the terms and conditions of the BSD License\r | |
7 | * which accompanies this distribution. The full text of the license may be found at\r | |
8 | * http://opensource.org/licenses/bsd-license.php\r | |
9 | *\r | |
10 | * THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
11 | * WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
12 | *\r | |
13 | **/\r | |
14 | \r | |
15 | #ifndef __LAN9118_DXE_UTIL_H__\r | |
16 | #define __LAN9118_DXE_UTIL_H__\r | |
17 | \r | |
18 | // Most common CRC32 Polynomial for little endian machines\r | |
19 | #define CRC_POLYNOMIAL 0xEDB88320\r | |
20 | \r | |
21 | /**\r | |
22 | This internal function reverses bits for 32bit data.\r | |
23 | \r | |
24 | @param Value The data to be reversed.\r | |
25 | \r | |
26 | @return Data reversed.\r | |
27 | \r | |
28 | **/\r | |
29 | UINT32\r | |
30 | ReverseBits (\r | |
31 | UINT32 Value\r | |
32 | );\r | |
33 | \r | |
34 | // Create an Ethernet CRC\r | |
35 | UINT32\r | |
36 | GenEtherCrc32 (\r | |
37 | IN EFI_MAC_ADDRESS *Mac,\r | |
38 | IN UINT32 AddrLen\r | |
39 | );\r | |
40 | \r | |
41 | /* ------------------ MAC CSR Access ------------------- */\r | |
42 | \r | |
43 | // Read from MAC indirect registers\r | |
44 | UINT32\r | |
45 | IndirectMACRead32 (\r | |
46 | UINT32 Index\r | |
47 | );\r | |
48 | \r | |
49 | \r | |
50 | // Write to indirect registers\r | |
51 | UINT32\r | |
52 | IndirectMACWrite32 (\r | |
53 | UINT32 Index,\r | |
54 | UINT32 Value\r | |
55 | );\r | |
56 | \r | |
57 | \r | |
58 | /* --------------- PHY Registers Access ---------------- */\r | |
59 | \r | |
60 | // Read from MII register (PHY Access)\r | |
61 | UINT32\r | |
62 | IndirectPHYRead32(\r | |
63 | UINT32 Index\r | |
64 | );\r | |
65 | \r | |
66 | \r | |
67 | // Write to the MII register (PHY Access)\r | |
68 | UINT32\r | |
69 | IndirectPHYWrite32(\r | |
70 | UINT32 Index,\r | |
71 | UINT32 Value\r | |
72 | );\r | |
73 | \r | |
74 | /* ---------------- EEPROM Operations ------------------ */\r | |
75 | \r | |
76 | // Read from EEPROM memory\r | |
77 | UINT32\r | |
78 | IndirectEEPROMRead32 (\r | |
79 | UINT32 Index\r | |
80 | );\r | |
81 | \r | |
82 | // Write to EEPROM memory\r | |
83 | UINT32\r | |
84 | IndirectEEPROMWrite32 (\r | |
85 | UINT32 Index,\r | |
86 | UINT32 Value\r | |
87 | );\r | |
88 | \r | |
89 | /* ---------------- General Operations ----------------- */\r | |
90 | \r | |
91 | VOID\r | |
92 | Lan9118SetMacAddress (\r | |
93 | EFI_MAC_ADDRESS *Mac,\r | |
94 | EFI_SIMPLE_NETWORK_PROTOCOL *Snp\r | |
95 | );\r | |
96 | \r | |
97 | // Initialise the LAN9118\r | |
98 | EFI_STATUS\r | |
99 | Lan9118Initialize (\r | |
100 | IN EFI_SIMPLE_NETWORK_PROTOCOL *Snp\r | |
101 | );\r | |
102 | \r | |
103 | // Flags for software reset\r | |
104 | #define SOFT_RESET_CHECK_MAC_ADDR_LOAD BIT0\r | |
105 | #define SOFT_RESET_CLEAR_INT BIT1\r | |
106 | #define SOFT_RESET_SELF_TEST BIT2\r | |
107 | \r | |
108 | // Perform software reset on the LAN9118\r | |
109 | EFI_STATUS\r | |
110 | SoftReset (\r | |
111 | UINT32 Flags,\r | |
112 | EFI_SIMPLE_NETWORK_PROTOCOL *Snp\r | |
113 | );\r | |
114 | \r | |
115 | // Flags for PHY reset\r | |
116 | #define PHY_RESET_PMT BIT0\r | |
117 | #define PHY_RESET_BCR BIT1\r | |
6382e5df | 118 | #define PHY_SOFT_RESET_CLEAR_INT BIT2\r |
46f2c53b OM |
119 | \r |
120 | // Perform PHY software reset\r | |
42589b9a | 121 | EFI_STATUS\r |
46f2c53b OM |
122 | PhySoftReset (\r |
123 | UINT32 Flags,\r | |
124 | EFI_SIMPLE_NETWORK_PROTOCOL *Snp\r | |
125 | );\r | |
126 | \r | |
127 | // Flags for Hardware configuration\r | |
128 | #define HW_CONF_USE_LEDS BIT0\r | |
129 | \r | |
130 | // Configure hardware for LAN9118\r | |
131 | EFI_STATUS\r | |
132 | ConfigureHardware (\r | |
133 | UINT32 Flags,\r | |
134 | EFI_SIMPLE_NETWORK_PROTOCOL *Snp\r | |
135 | );\r | |
136 | \r | |
137 | // Configure flow control\r | |
138 | EFI_STATUS\r | |
139 | ConfigureFlow (\r | |
140 | UINT32 Flags,\r | |
141 | UINT32 HighTrig,\r | |
142 | UINT32 LowTrig,\r | |
143 | UINT32 BPDuration,\r | |
144 | EFI_SIMPLE_NETWORK_PROTOCOL *Snp\r | |
145 | );\r | |
146 | \r | |
147 | // Flags for auto negotiation\r | |
148 | #define AUTO_NEGOTIATE_COLLISION_TEST BIT0\r | |
149 | #define AUTO_NEGOTIATE_ADVERTISE_ALL BIT1\r | |
150 | \r | |
151 | // Do auto-negotiation\r | |
152 | EFI_STATUS\r | |
153 | AutoNegotiate (\r | |
154 | UINT32 Flags,\r | |
155 | EFI_SIMPLE_NETWORK_PROTOCOL *Snp\r | |
156 | );\r | |
157 | \r | |
158 | // Check the Link Status and take appropriate action\r | |
159 | EFI_STATUS\r | |
160 | CheckLinkStatus (\r | |
161 | UINT32 Flags,\r | |
162 | EFI_SIMPLE_NETWORK_PROTOCOL *Snp\r | |
163 | );\r | |
164 | \r | |
165 | // Stop transmitter flags\r | |
166 | #define STOP_TX_MAC BIT0\r | |
167 | #define STOP_TX_CFG BIT1\r | |
168 | #define STOP_TX_CLEAR BIT2\r | |
169 | \r | |
170 | // Stop the transmitter\r | |
171 | EFI_STATUS\r | |
172 | StopTx (\r | |
173 | UINT32 Flags,\r | |
174 | EFI_SIMPLE_NETWORK_PROTOCOL *Snp\r | |
175 | );\r | |
176 | \r | |
177 | // Stop receiver flags\r | |
178 | #define STOP_RX_CLEAR BIT0\r | |
179 | \r | |
180 | // Stop the receiver\r | |
181 | EFI_STATUS\r | |
182 | StopRx (\r | |
183 | UINT32 Flags,\r | |
184 | EFI_SIMPLE_NETWORK_PROTOCOL *Snp\r | |
185 | );\r | |
186 | \r | |
187 | // Start transmitter flags\r | |
188 | #define START_TX_MAC BIT0\r | |
189 | #define START_TX_CFG BIT1\r | |
190 | #define START_TX_CLEAR BIT2\r | |
191 | \r | |
192 | // Start the transmitter\r | |
193 | EFI_STATUS\r | |
194 | StartTx (\r | |
195 | UINT32 Flags,\r | |
196 | EFI_SIMPLE_NETWORK_PROTOCOL *Snp\r | |
197 | );\r | |
198 | \r | |
199 | // Stop receiver flags\r | |
200 | #define START_RX_CLEAR BIT0\r | |
201 | \r | |
202 | // Start the receiver\r | |
203 | EFI_STATUS\r | |
204 | StartRx (\r | |
205 | UINT32 Flags,\r | |
206 | EFI_SIMPLE_NETWORK_PROTOCOL *Snp\r | |
207 | );\r | |
208 | \r | |
209 | // Check Tx Data available space\r | |
210 | UINT32\r | |
211 | TxDataFreeSpace (\r | |
212 | UINT32 Flags,\r | |
213 | EFI_SIMPLE_NETWORK_PROTOCOL *Snp\r | |
214 | );\r | |
215 | \r | |
216 | // Check Tx Status used space\r | |
217 | UINT32\r | |
218 | TxStatusUsedSpace (\r | |
219 | UINT32 Flags,\r | |
220 | EFI_SIMPLE_NETWORK_PROTOCOL *Snp\r | |
221 | );\r | |
222 | \r | |
223 | // Check Rx Data used space\r | |
224 | UINT32\r | |
225 | RxDataUsedSpace (\r | |
226 | UINT32 Flags,\r | |
227 | EFI_SIMPLE_NETWORK_PROTOCOL *Snp\r | |
228 | );\r | |
229 | \r | |
230 | // Check Rx Status used space\r | |
231 | UINT32\r | |
232 | RxStatusUsedSpace (\r | |
233 | UINT32 Flags,\r | |
234 | EFI_SIMPLE_NETWORK_PROTOCOL *Snp\r | |
235 | );\r | |
236 | \r | |
237 | \r | |
238 | // Flags for FIFO allocation\r | |
239 | #define ALLOC_USE_DEFAULT BIT0\r | |
240 | #define ALLOC_USE_FIFOS BIT1\r | |
241 | #define ALLOC_USE_DMA BIT2\r | |
242 | \r | |
243 | // FIFO min and max sizes\r | |
244 | #define TX_FIFO_MIN_SIZE 0x00000600\r | |
245 | #define TX_FIFO_MAX_SIZE 0x00003600\r | |
246 | //#define RX_FIFO_MIN_SIZE\r | |
247 | //#define RX_FIFO_MAX_SIZE\r | |
248 | \r | |
249 | // Change the allocation of FIFOs\r | |
250 | EFI_STATUS\r | |
251 | ChangeFifoAllocation (\r | |
252 | IN UINT32 Flags,\r | |
253 | IN OUT UINTN *TxDataSize OPTIONAL,\r | |
254 | IN OUT UINTN *RxDataSize OPTIONAL,\r | |
255 | IN OUT UINT32 *TxStatusSize OPTIONAL,\r | |
256 | IN OUT UINT32 *RxStatusSize OPTIONAL,\r | |
257 | IN OUT EFI_SIMPLE_NETWORK_PROTOCOL *Snp\r | |
258 | );\r | |
259 | \r | |
260 | VOID\r | |
261 | Lan9118ReadMacAddress (\r | |
262 | OUT EFI_MAC_ADDRESS *Mac\r | |
263 | );\r | |
264 | \r | |
265 | #endif // __LAN9118_DXE_UTIL_H__\r |