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97404058 | 1 | /** @file\r |
a3b8e257 | 2 | Header file declares all logic function for PCI bus enumeration.\r |
3 | \r | |
ead42efc | 4 | Copyright (c) 2006, Intel Corporation \r |
5 | All rights reserved. This program and the accompanying materials \r | |
6 | are licensed and made available under the terms and conditions of the BSD License \r | |
7 | which accompanies this distribution. The full text of the license may be found at \r | |
8 | http://opensource.org/licenses/bsd-license.php \r | |
9 | \r | |
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r | |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r | |
12 | \r | |
3db51098 | 13 | **/\r |
ead42efc | 14 | \r |
ead42efc | 15 | \r |
eeefcb9d | 16 | #ifndef _EFI_PCI_ENUMERATOR_H_\r |
17 | #define _EFI_PCI_ENUMERATOR_H_\r | |
ead42efc | 18 | \r |
19 | #include "PciResourceSupport.h"\r | |
20 | \r | |
a3b8e257 | 21 | /**\r |
22 | This routine is used to enumerate entire pci bus system\r | |
23 | in a given platform\r | |
24 | \r | |
97404058 | 25 | @param Controller Parent controller handle.\r |
a3b8e257 | 26 | \r |
97404058 | 27 | @return Status of enumerating.\r |
a3b8e257 | 28 | **/\r |
ead42efc | 29 | EFI_STATUS\r |
30 | PciEnumerator (\r | |
31 | IN EFI_HANDLE Controller\r | |
ed66e1bc | 32 | );\r |
ead42efc | 33 | \r |
a3b8e257 | 34 | /**\r |
35 | Enumerate PCI root bridge\r | |
36 | \r | |
37 | @param PciResAlloc Pointer to protocol instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL\r | |
97404058 | 38 | @param RootBridgeDev Instance of root bridge device.\r |
a3b8e257 | 39 | \r |
97404058 | 40 | @retval EFI_SUCCESS Success to enumerate root bridge.\r |
41 | @retval Others Fail to enumerate root bridge.\r | |
a3b8e257 | 42 | \r |
43 | **/\r | |
ead42efc | 44 | EFI_STATUS\r |
45 | PciRootBridgeEnumerator (\r | |
46 | IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc,\r | |
47 | IN PCI_IO_DEVICE *RootBridgeDev\r | |
ed66e1bc | 48 | );\r |
ead42efc | 49 | \r |
a3b8e257 | 50 | /**\r |
51 | This routine is used to process option rom on a certain root bridge\r | |
52 | \r | |
97404058 | 53 | @param Bridge Given parent's root bridge.\r |
54 | @param RomBase Base address of ROM driver loaded from.\r | |
55 | @param MaxLength Max rom size.\r | |
a3b8e257 | 56 | \r |
57 | @retval EFI_SUCCESS Success to process option rom image.\r | |
58 | **/\r | |
ead42efc | 59 | EFI_STATUS\r |
60 | ProcessOptionRom (\r | |
61 | IN PCI_IO_DEVICE *Bridge,\r | |
62 | IN UINT64 RomBase,\r | |
63 | IN UINT64 MaxLength\r | |
ed66e1bc | 64 | );\r |
ead42efc | 65 | \r |
a3b8e257 | 66 | /**\r |
67 | This routine is used to assign bus number to the given PCI bus system\r | |
68 | \r | |
97404058 | 69 | @param Bridge Parent root bridge instance.\r |
70 | @param StartBusNumber Number of beginning.\r | |
71 | @param SubBusNumber the number of sub bus.\r | |
a3b8e257 | 72 | \r |
97404058 | 73 | @retval EFI_SUCCESS Success to assign bus number.\r |
a3b8e257 | 74 | **/\r |
ead42efc | 75 | EFI_STATUS\r |
76 | PciAssignBusNumber (\r | |
77 | IN PCI_IO_DEVICE *Bridge,\r | |
78 | IN UINT8 StartBusNumber,\r | |
79 | OUT UINT8 *SubBusNumber\r | |
ed66e1bc | 80 | );\r |
ead42efc | 81 | \r |
a3b8e257 | 82 | /**\r |
83 | This routine is used to determine the root bridge attribute by interfacing\r | |
84 | the host bridge resource allocation protocol.\r | |
85 | \r | |
97404058 | 86 | @param PciResAlloc Protocol instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.\r |
87 | @param RootBridgeDev Root bridge instance.\r | |
a3b8e257 | 88 | \r |
97404058 | 89 | @retval EFI_SUCCESS Success to get root bridge's attribute.\r |
90 | @retval Others Fail to get attribute.\r | |
a3b8e257 | 91 | **/\r |
ead42efc | 92 | EFI_STATUS\r |
93 | DetermineRootBridgeAttributes (\r | |
94 | IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc,\r | |
95 | IN PCI_IO_DEVICE *RootBridgeDev\r | |
ed66e1bc | 96 | );\r |
ead42efc | 97 | \r |
a3b8e257 | 98 | /**\r |
99 | Get Max Option Rom size on this bridge\r | |
100 | \r | |
97404058 | 101 | @param Bridge Bridge device instance.\r |
102 | @return Max size of option rom.\r | |
a3b8e257 | 103 | **/\r |
ead42efc | 104 | UINT64\r |
105 | GetMaxOptionRomSize (\r | |
106 | IN PCI_IO_DEVICE *Bridge\r | |
ed66e1bc | 107 | );\r |
ead42efc | 108 | \r |
a3b8e257 | 109 | /**\r |
110 | Process attributes of devices on this host bridge\r | |
111 | \r | |
112 | @param PciResAlloc Protocol instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL\r | |
113 | \r | |
97404058 | 114 | @retval EFI_NOT_FOUND Can not find the specific root bridge device.\r |
115 | @retval EFI_SUCCESS Success Process attribute.\r | |
116 | @retval Others Can not determine the root bridge device's attribute.\r | |
a3b8e257 | 117 | **/\r |
ead42efc | 118 | EFI_STATUS\r |
119 | PciHostBridgeDeviceAttribute (\r | |
120 | IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc\r | |
ed66e1bc | 121 | );\r |
ead42efc | 122 | \r |
a3b8e257 | 123 | /**\r |
124 | Get resource allocation status from the ACPI pointer\r | |
125 | \r | |
97404058 | 126 | @param AcpiConfig Point to Acpi configuration table.\r |
127 | @param IoResStatus Return the status of I/O resource.\r | |
128 | @param Mem32ResStatus Return the status of 32-bit Memory resource.\r | |
129 | @param PMem32ResStatus Return the status of 32-bit PMemory resource.\r | |
130 | @param Mem64ResStatus Return the status of 64-bit Memory resource.\r | |
131 | @param PMem64ResStatus Return the status of 64-bit PMemory resource.\r | |
a3b8e257 | 132 | \r |
133 | @retval EFI_SUCCESS Success to get resource allocation status from ACPI configuration table.\r | |
134 | **/\r | |
ead42efc | 135 | EFI_STATUS\r |
136 | GetResourceAllocationStatus (\r | |
137 | VOID *AcpiConfig,\r | |
138 | OUT UINT64 *IoResStatus,\r | |
139 | OUT UINT64 *Mem32ResStatus,\r | |
140 | OUT UINT64 *PMem32ResStatus,\r | |
141 | OUT UINT64 *Mem64ResStatus,\r | |
142 | OUT UINT64 *PMem64ResStatus\r | |
ed66e1bc | 143 | );\r |
ead42efc | 144 | \r |
a3b8e257 | 145 | /**\r |
146 | Remove a PCI device from device pool and mark its bar\r | |
147 | \r | |
97404058 | 148 | @param PciDevice Instance of Pci device.\r |
a3b8e257 | 149 | \r |
97404058 | 150 | @retval EFI_SUCCESS Success Operation.\r |
151 | @retval EFI_ABORTED Pci device is a root bridge.\r | |
a3b8e257 | 152 | **/\r |
ead42efc | 153 | EFI_STATUS\r |
154 | RejectPciDevice (\r | |
155 | IN PCI_IO_DEVICE *PciDevice\r | |
ed66e1bc | 156 | );\r |
ead42efc | 157 | \r |
a3b8e257 | 158 | /**\r |
159 | Determine whethter a PCI device can be rejected\r | |
160 | \r | |
97404058 | 161 | @param PciResNode Pointer to Pci resource node instance.\r |
a3b8e257 | 162 | \r |
97404058 | 163 | @return whethter a PCI device can be rejected.\r |
a3b8e257 | 164 | **/\r |
ead42efc | 165 | BOOLEAN\r |
166 | IsRejectiveDevice (\r | |
167 | IN PCI_RESOURCE_NODE *PciResNode\r | |
ed66e1bc | 168 | );\r |
ead42efc | 169 | \r |
a3b8e257 | 170 | /**\r |
171 | Compare two resource node and get the larger resource consumer\r | |
172 | \r | |
97404058 | 173 | @param PciResNode1 resource node 1 want to be compared.\r |
174 | @param PciResNode2 resource node 2 want to be compared.\r | |
a3b8e257 | 175 | \r |
176 | @return Larger resource consumer.\r | |
177 | **/\r | |
ead42efc | 178 | PCI_RESOURCE_NODE *\r |
179 | GetLargerConsumerDevice (\r | |
180 | IN PCI_RESOURCE_NODE *PciResNode1,\r | |
181 | IN PCI_RESOURCE_NODE *PciResNode2\r | |
ed66e1bc | 182 | );\r |
ead42efc | 183 | \r |
a3b8e257 | 184 | /**\r |
185 | Get the max resource consumer in the host resource pool\r | |
186 | \r | |
97404058 | 187 | @param ResPool Pointer to resource pool node.\r |
a3b8e257 | 188 | \r |
97404058 | 189 | @return the max resource consumer in the host resource pool.\r |
a3b8e257 | 190 | **/\r |
ead42efc | 191 | PCI_RESOURCE_NODE *\r |
192 | GetMaxResourceConsumerDevice (\r | |
193 | IN PCI_RESOURCE_NODE *ResPool\r | |
ed66e1bc | 194 | );\r |
ead42efc | 195 | \r |
a3b8e257 | 196 | /**\r |
197 | Adjust host bridge allocation so as to reduce resource requirement\r | |
198 | \r | |
97404058 | 199 | @param IoPool Pointer to instance of I/O resource Node.\r |
200 | @param Mem32Pool Pointer to instance of 32-bit memory resource Node.\r | |
201 | @param PMem32Pool Pointer to instance of 32-bit Pmemory resource node.\r | |
202 | @param Mem64Pool Pointer to instance of 64-bit memory resource node.\r | |
203 | @param PMem64Pool Pointer to instance of 64-bit Pmemory resource node.\r | |
204 | @param IoResStatus Status of I/O resource Node.\r | |
205 | @param Mem32ResStatus Status of 32-bit memory resource Node.\r | |
206 | @param PMem32ResStatus Status of 32-bit Pmemory resource node.\r | |
207 | @param Mem64ResStatus Status of 64-bit memory resource node.\r | |
208 | @param PMem64ResStatus Status of 64-bit Pmemory resource node.\r | |
a3b8e257 | 209 | **/\r |
ead42efc | 210 | EFI_STATUS\r |
211 | PciHostBridgeAdjustAllocation (\r | |
212 | IN PCI_RESOURCE_NODE *IoPool,\r | |
213 | IN PCI_RESOURCE_NODE *Mem32Pool,\r | |
214 | IN PCI_RESOURCE_NODE *PMem32Pool,\r | |
215 | IN PCI_RESOURCE_NODE *Mem64Pool,\r | |
216 | IN PCI_RESOURCE_NODE *PMem64Pool,\r | |
217 | IN UINT64 IoResStatus,\r | |
218 | IN UINT64 Mem32ResStatus,\r | |
219 | IN UINT64 PMem32ResStatus,\r | |
220 | IN UINT64 Mem64ResStatus,\r | |
221 | IN UINT64 PMem64ResStatus\r | |
ed66e1bc | 222 | );\r |
ead42efc | 223 | \r |
a3b8e257 | 224 | /**\r |
225 | Summary requests for all resource type, and contruct ACPI resource\r | |
226 | requestor instance.\r | |
227 | \r | |
97404058 | 228 | @param Bridge detecting bridge.\r |
229 | @param IoNode Pointer to instance of I/O resource Node.\r | |
230 | @param Mem32Node Pointer to instance of 32-bit memory resource Node.\r | |
231 | @param PMem32Node Pointer to instance of 32-bit Pmemory resource node.\r | |
232 | @param Mem64Node Pointer to instance of 64-bit memory resource node.\r | |
233 | @param PMem64Node Pointer to instance of 64-bit Pmemory resource node.\r | |
c72216a6 | 234 | @param Config Output buffer holding new constructed APCI resource requestor.\r |
a3b8e257 | 235 | **/\r |
ead42efc | 236 | EFI_STATUS\r |
237 | ConstructAcpiResourceRequestor (\r | |
238 | IN PCI_IO_DEVICE *Bridge,\r | |
239 | IN PCI_RESOURCE_NODE *IoNode,\r | |
240 | IN PCI_RESOURCE_NODE *Mem32Node,\r | |
241 | IN PCI_RESOURCE_NODE *PMem32Node,\r | |
242 | IN PCI_RESOURCE_NODE *Mem64Node,\r | |
243 | IN PCI_RESOURCE_NODE *PMem64Node,\r | |
c72216a6 | 244 | OUT VOID **Config\r |
ed66e1bc | 245 | );\r |
ead42efc | 246 | \r |
a3b8e257 | 247 | /**\r |
c72216a6 | 248 | Get resource base from an acpi configuration descriptor.\r |
a3b8e257 | 249 | \r |
c72216a6 | 250 | @param Config an acpi configuration descriptor.\r |
97404058 | 251 | @param IoBase output of I/O resource base address.\r |
252 | @param Mem32Base output of 32-bit memory base address.\r | |
253 | @param PMem32Base output of 32-bit pmemory base address.\r | |
254 | @param Mem64Base output of 64-bit memory base address.\r | |
255 | @param PMem64Base output of 64-bit pmemory base address.\r | |
a3b8e257 | 256 | \r |
c72216a6 | 257 | @return EFI_SUCCESS Get resource base address successfully.\r |
258 | \r | |
a3b8e257 | 259 | **/\r |
ead42efc | 260 | EFI_STATUS\r |
261 | GetResourceBase (\r | |
c72216a6 | 262 | IN VOID *Config,\r |
ead42efc | 263 | OUT UINT64 *IoBase,\r |
264 | OUT UINT64 *Mem32Base,\r | |
265 | OUT UINT64 *PMem32Base,\r | |
266 | OUT UINT64 *Mem64Base,\r | |
267 | OUT UINT64 *PMem64Base\r | |
ed66e1bc | 268 | );\r |
ead42efc | 269 | \r |
a3b8e257 | 270 | /**\r |
271 | Enumerate pci bridge, allocate resource and determine attribute\r | |
272 | for devices on this bridge\r | |
273 | \r | |
97404058 | 274 | @param BridgeDev Pointer to instance of bridge device.\r |
a3b8e257 | 275 | \r |
97404058 | 276 | @retval EFI_SUCCESS Success operation.\r |
277 | @retval Others Fail to enumerate.\r | |
a3b8e257 | 278 | **/\r |
ead42efc | 279 | EFI_STATUS\r |
280 | PciBridgeEnumerator (\r | |
281 | IN PCI_IO_DEVICE *BridgeDev\r | |
ed66e1bc | 282 | );\r |
ead42efc | 283 | \r |
a3b8e257 | 284 | /**\r |
285 | Allocate all kinds of resource for bridge\r | |
286 | \r | |
97404058 | 287 | @param Bridge Pointer to bridge instance.\r |
a3b8e257 | 288 | \r |
289 | @retval EFI_SUCCESS Success operation.\r | |
97404058 | 290 | @retval Others Fail to allocate resource for bridge.\r |
a3b8e257 | 291 | **/\r |
ead42efc | 292 | EFI_STATUS\r |
293 | PciBridgeResourceAllocator (\r | |
294 | IN PCI_IO_DEVICE *Bridge\r | |
ed66e1bc | 295 | );\r |
ead42efc | 296 | \r |
a3b8e257 | 297 | /**\r |
298 | Get resource base address for a pci bridge device\r | |
299 | \r | |
97404058 | 300 | @param Bridge Given Pci driver instance.\r |
301 | @param IoBase output for base address of I/O type resource.\r | |
302 | @param Mem32Base output for base address of 32-bit memory type resource.\r | |
303 | @param PMem32Base output for base address of 32-bit Pmemory type resource.\r | |
304 | @param Mem64Base output for base address of 64-bit memory type resource.\r | |
305 | @param PMem64Base output for base address of 64-bit Pmemory type resource.\r | |
a3b8e257 | 306 | \r |
97404058 | 307 | @retval EFI_SUCCESS Succes to get resource base address.\r |
a3b8e257 | 308 | **/\r |
ead42efc | 309 | EFI_STATUS\r |
310 | GetResourceBaseFromBridge (\r | |
311 | IN PCI_IO_DEVICE *Bridge,\r | |
312 | OUT UINT64 *IoBase,\r | |
313 | OUT UINT64 *Mem32Base,\r | |
314 | OUT UINT64 *PMem32Base,\r | |
315 | OUT UINT64 *Mem64Base,\r | |
316 | OUT UINT64 *PMem64Base\r | |
ed66e1bc | 317 | );\r |
ead42efc | 318 | \r |
a3b8e257 | 319 | /**\r |
320 | Process Option Rom on this host bridge\r | |
321 | \r | |
97404058 | 322 | @param PciResAlloc Pointer to instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.\r |
a3b8e257 | 323 | \r |
97404058 | 324 | @retval EFI_NOT_FOUND Can not find the root bridge instance.\r |
325 | @retval EFI_SUCCESS Success process.\r | |
a3b8e257 | 326 | **/\r |
ead42efc | 327 | EFI_STATUS\r |
328 | PciHostBridgeP2CProcess (\r | |
329 | IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc\r | |
ed66e1bc | 330 | );\r |
ead42efc | 331 | \r |
a3b8e257 | 332 | /**\r |
333 | These are the notifications from the PCI bus driver that it is about to enter a certain \r | |
334 | phase of the PCI enumeration process.\r | |
335 | \r | |
336 | This member function can be used to notify the host bridge driver to perform specific actions,\r | |
337 | including any chipset-specific initialization, so that the chipset is ready to enter the next phase.\r | |
338 | Eight notification points are defined at this time. See belows:\r | |
339 | EfiPciHostBridgeBeginEnumeration - Resets the host bridge PCI apertures and internal data\r | |
340 | structures. The PCI enumerator should issue this notification\r | |
341 | before starting a fresh enumeration process. Enumeration cannot\r | |
342 | be restarted after sending any other notification such as\r | |
343 | EfiPciHostBridgeBeginBusAllocation.\r | |
344 | EfiPciHostBridgeBeginBusAllocation - The bus allocation phase is about to begin. No specific action is\r | |
345 | required here. This notification can be used to perform any\r | |
346 | chipset-specific programming.\r | |
347 | EfiPciHostBridgeEndBusAllocation - The bus allocation and bus programming phase is complete. No\r | |
348 | specific action is required here. This notification can be used to\r | |
349 | perform any chipset-specific programming.\r | |
350 | EfiPciHostBridgeBeginResourceAllocation - The resource allocation phase is about to begin. No specific\r | |
351 | action is required here. This notification can be used to perform\r | |
352 | any chipset-specific programming.\r | |
353 | EfiPciHostBridgeAllocateResources - Allocates resources per previously submitted requests for all the PCI\r | |
354 | root bridges. These resource settings are returned on the next call to\r | |
355 | GetProposedResources(). Before calling NotifyPhase() with a Phase of\r | |
356 | EfiPciHostBridgeAllocateResource, the PCI bus enumerator is responsible for gathering I/O and memory requests for\r | |
357 | all the PCI root bridges and submitting these requests using\r | |
358 | SubmitResources(). This function pads the resource amount\r | |
359 | to suit the root bridge hardware, takes care of dependencies between\r | |
360 | the PCI root bridges, and calls the Global Coherency Domain (GCD)\r | |
361 | with the allocation request. In the case of padding, the allocated range\r | |
362 | could be bigger than what was requested.\r | |
363 | EfiPciHostBridgeSetResources - Programs the host bridge hardware to decode previously allocated\r | |
364 | resources (proposed resources) for all the PCI root bridges. After the\r | |
365 | hardware is programmed, reassigning resources will not be supported.\r | |
366 | The bus settings are not affected.\r | |
367 | EfiPciHostBridgeFreeResources - Deallocates resources that were previously allocated for all the PCI\r | |
368 | root bridges and resets the I/O and memory apertures to their initial\r | |
369 | state. The bus settings are not affected. If the request to allocate\r | |
370 | resources fails, the PCI enumerator can use this notification to\r | |
371 | deallocate previous resources, adjust the requests, and retry\r | |
372 | allocation.\r | |
373 | EfiPciHostBridgeEndResourceAllocation- The resource allocation phase is completed. No specific action is\r | |
374 | required here. This notification can be used to perform any chipsetspecific\r | |
375 | programming.\r | |
376 | \r | |
97404058 | 377 | @param[in] PciResAlloc The instance pointer of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL\r |
a3b8e257 | 378 | @param[in] Phase The phase during enumeration\r |
379 | \r | |
380 | @retval EFI_NOT_READY This phase cannot be entered at this time. For example, this error\r | |
381 | is valid for a Phase of EfiPciHostBridgeAllocateResources if\r | |
382 | SubmitResources() has not been called for one or more\r | |
383 | PCI root bridges before this call\r | |
384 | @retval EFI_DEVICE_ERROR Programming failed due to a hardware error. This error is valid\r | |
385 | for a Phase of EfiPciHostBridgeSetResources.\r | |
386 | @retval EFI_INVALID_PARAMETER Invalid phase parameter\r | |
387 | @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r | |
388 | This error is valid for a Phase of EfiPciHostBridgeAllocateResources if the\r | |
389 | previously submitted resource requests cannot be fulfilled or\r | |
390 | were only partially fulfilled.\r | |
391 | @retval EFI_SUCCESS The notification was accepted without any errors.\r | |
ead42efc | 392 | \r |
bcd70414 | 393 | **/\r |
ead42efc | 394 | EFI_STATUS\r |
395 | NotifyPhase (\r | |
396 | IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc,\r | |
397 | EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE Phase\r | |
ed66e1bc | 398 | );\r |
ead42efc | 399 | \r |
a3b8e257 | 400 | /**\r |
401 | Provides the hooks from the PCI bus driver to every PCI controller (device/function) at various\r | |
402 | stages of the PCI enumeration process that allow the host bridge driver to preinitialize individual\r | |
403 | PCI controllers before enumeration.\r | |
404 | \r | |
405 | This function is called during the PCI enumeration process. No specific action is expected from this\r | |
406 | member function. It allows the host bridge driver to preinitialize individual PCI controllers before\r | |
407 | enumeration.\r | |
408 | \r | |
eeefcb9d | 409 | @param Bridge Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL instance.\r |
410 | @param Bus The bus number of the pci device. \r | |
411 | @param Device The device number of the pci device. \r | |
412 | @param Func The function number of the pci device. \r | |
a3b8e257 | 413 | @param Phase The phase of the PCI device enumeration. \r |
414 | \r | |
415 | @retval EFI_SUCCESS The requested parameters were returned.\r | |
416 | @retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.\r | |
417 | @retval EFI_INVALID_PARAMETER Phase is not a valid phase that is defined in\r | |
418 | EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE.\r | |
419 | @retval EFI_DEVICE_ERROR Programming failed due to a hardware error. The PCI enumerator should\r | |
420 | not enumerate this device, including its child devices if it is a PCI-to-PCI\r | |
421 | bridge.\r | |
ead42efc | 422 | \r |
bcd70414 | 423 | **/\r |
ead42efc | 424 | EFI_STATUS\r |
425 | PreprocessController (\r | |
426 | IN PCI_IO_DEVICE *Bridge,\r | |
427 | IN UINT8 Bus,\r | |
428 | IN UINT8 Device,\r | |
429 | IN UINT8 Func,\r | |
430 | IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase\r | |
ed66e1bc | 431 | );\r |
ead42efc | 432 | \r |
a3b8e257 | 433 | /**\r |
434 | Hot plug request notify.\r | |
435 | \r | |
436 | @param This - A pointer to the hot plug request protocol.\r | |
437 | @param Operation - The operation.\r | |
438 | @param Controller - A pointer to the controller.\r | |
97404058 | 439 | @param RemainingDevicePath - A pointer to the device path.\r |
a3b8e257 | 440 | @param NumberOfChildren - A the number of child handle in the ChildHandleBuffer.\r |
441 | @param ChildHandleBuffer - A pointer to the array contain the child handle.\r | |
442 | \r | |
97404058 | 443 | @retval EFI_NOT_FOUND Can not find bridge according to controller handle.\r |
444 | @retval EFI_SUCCESS Success operating.\r | |
a3b8e257 | 445 | **/\r |
ead42efc | 446 | EFI_STATUS\r |
447 | EFIAPI\r | |
448 | PciHotPlugRequestNotify (\r | |
449 | IN EFI_PCI_HOTPLUG_REQUEST_PROTOCOL * This,\r | |
450 | IN EFI_PCI_HOTPLUG_OPERATION Operation,\r | |
451 | IN EFI_HANDLE Controller,\r | |
452 | IN EFI_DEVICE_PATH_PROTOCOL * RemainingDevicePath OPTIONAL,\r | |
453 | IN OUT UINT8 *NumberOfChildren,\r | |
454 | IN OUT EFI_HANDLE * ChildHandleBuffer\r | |
ed66e1bc | 455 | );\r |
ead42efc | 456 | \r |
a3b8e257 | 457 | /**\r |
458 | Search hostbridge according to given handle\r | |
459 | \r | |
eeefcb9d | 460 | @param RootBridgeHandle - Host bridge handle.\r |
461 | \r | |
462 | @return TRUE Found.\r | |
463 | @return FALSE Not found.\r | |
a3b8e257 | 464 | **/\r |
ead42efc | 465 | BOOLEAN\r |
466 | SearchHostBridgeHandle (\r | |
467 | IN EFI_HANDLE RootBridgeHandle\r | |
ed66e1bc | 468 | );\r |
ead42efc | 469 | \r |
a3b8e257 | 470 | /**\r |
471 | Add host bridge handle to global variable for enumating.\r | |
472 | \r | |
97404058 | 473 | @param HostBridgeHandle host bridge handle.\r |
a3b8e257 | 474 | **/\r |
ead42efc | 475 | EFI_STATUS\r |
476 | AddHostBridgeEnumerator (\r | |
477 | IN EFI_HANDLE HostBridgeHandle\r | |
ed66e1bc | 478 | );\r |
ead42efc | 479 | \r |
480 | #endif\r |