1. EDK_RELEASE_VERSION removed;

[mirror_edk2.git] / IntelFrameworkModulePkg / Bus / Pci / PciBusDxe / PciLib.h

/** @file\r
\r
Copyright (c) 2006 - 2007, Intel Corporation\r
All rights reserved. This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution.  The full text of the license may be found at\r
http://opensource.org/licenses/bsd-license.php\r
\r
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
Module Name:\r
\r
  PciLib.h\r
\r
Abstract:\r
\r
  PCI Bus Driver Lib header file.\r
  Please use PCD feature flag PcdPciBusHotplugDeviceSupport to enable\r
  support hot plug.\r
\r
Revision History\r
\r
**/\r
\r
#ifndef _EFI_PCI_LIB_H_\r
#define _EFI_PCI_LIB_H_\r
\r
//\r
// Mask definistions for PCD PcdPciIncompatibleDeviceSupportMask\r
//\r
#define PCI_INCOMPATIBLE_ACPI_RESOURCE_SUPPORT         0x01\r
#define PCI_INCOMPATIBLE_READ_SUPPORT                  0x02\r
#define PCI_INCOMPATIBLE_WRITE_SUPPORT                 0x04\r
#define PCI_INCOMPATIBLE_REGISTER_UPDATE_SUPPORT       0x08\r
#define PCI_INCOMPATIBLE_ACCESS_WIDTH_SUPPORT          0x0a\r
\r
typedef struct {\r
  EFI_HANDLE            Handle;\r
} EFI_DEVICE_HANDLE_EXTENDED_DATA_PAYLOAD;\r
\r
typedef struct {\r
  UINT32                             Bar;\r
  UINT16                             DevicePathSize;\r
  UINT16                             ReqResSize;\r
  UINT16                             AllocResSize;\r
  UINT8                              *DevicePath;\r
  UINT8                              *ReqRes;\r
  UINT8                              *AllocRes;\r
} EFI_RESOURCE_ALLOC_FAILURE_ERROR_DATA_PAYLOAD;\r
\r
/**\r
  Install protocol gEfiPciHotPlugRequestProtocolGuid\r
  @param Status    return status of protocol installation.\r
**/\r
VOID\r
InstallHotPlugRequestProtocol (\r
  IN  EFI_STATUS                    *Status\r
  );\r
\r
/**\r
  Install protocol gEfiPciHotplugDeviceGuid into hotplug device\r
  instance.\r
  \r
  @param PciIoDevice  hotplug device instance.\r
  \r
**/\r
VOID\r
InstallPciHotplugGuid (\r
  IN  PCI_IO_DEVICE                  *PciIoDevice\r
  );\r
\r
/**\r
  UnInstall protocol gEfiPciHotplugDeviceGuid into hotplug device\r
  instance.\r
  \r
  @param PciIoDevice  hotplug device instance.\r
  \r
**/\r
VOID\r
UninstallPciHotplugGuid (\r
  IN  PCI_IO_DEVICE                  *PciIoDevice\r
  );\r
\r
/**\r
  Retrieve the BAR information via PciIo interface.\r
  \r
  @param PciIoDevice Pci device instance.\r
**/\r
VOID\r
GetBackPcCardBar (\r
  IN  PCI_IO_DEVICE                  *PciIoDevice\r
  );\r
\r
/**\r
  Remove rejected pci device from specific root bridge\r
  handle.\r
  \r
  @param RootBridgeHandle  specific parent root bridge handle.\r
  @param Bridge            Bridge device instance.\r
  \r
  @retval EFI_SUCCESS  Success operation.\r
**/\r
EFI_STATUS\r
RemoveRejectedPciDevices (\r
  EFI_HANDLE        RootBridgeHandle,\r
  IN PCI_IO_DEVICE  *Bridge\r
  );\r
\r
/**\r
  Wrapper function for allocating resource for pci host bridge.\r
  \r
  @param PciResAlloc Point to protocol instance EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.\r
  \r
**/\r
EFI_STATUS\r
PciHostBridgeResourceAllocator (\r
  IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc\r
  );\r
\r
/**\r
  Wrapper function for allocating resource for pci host bridge without hotplug device support.\r
  \r
  @param PciResAlloc Point to protocol instance EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.\r
  \r
**/\r
EFI_STATUS\r
PciHostBridgeResourceAllocator_WithoutHotPlugDeviceSupport (\r
  IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc\r
  );\r
\r
/**\r
  Wrapper function for allocating resource for pci host bridge with hotplug device support.\r
  \r
  @param PciResAlloc Point to protocol instance EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.\r
  \r
**/\r
EFI_STATUS\r
PciHostBridgeResourceAllocator_WithHotPlugDeviceSupport (\r
  IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc\r
  );\r
\r
/**\r
  Wapper function of scanning pci bus and assign bus number to the given PCI bus system\r
  Feature flag PcdPciBusHotplugDeviceSupport determine whether need support hotplug.  \r
  \r
  @param  Bridge          Bridge device instance.\r
  @param  StartBusNumber  start point.\r
  @param  SubBusNumber    Point to sub bus number.\r
  @param  PaddedBusRange  Customized bus number.\r
  \r
  @retval EFI_SUCCESS     Success.\r
  @retval EFI_DEVICE_ERROR Fail to scan bus.\r
**/\r
EFI_STATUS\r
PciScanBus (\r
  IN PCI_IO_DEVICE                      *Bridge,\r
  IN UINT8                              StartBusNumber,\r
  OUT UINT8                             *SubBusNumber,\r
  OUT UINT8                             *PaddedBusRange\r
  );\r
\r
/**\r
  Wapper function of scanning pci bus and assign bus number to the given PCI bus system\r
  Feature flag PcdPciBusHotplugDeviceSupport determine whether need support hotplug.  \r
  \r
  @param  Bridge          Bridge device instance.\r
  @param  StartBusNumber  start point.\r
  @param  SubBusNumber    Point to sub bus number.\r
  @param  PaddedBusRange  Customized bus number.\r
  \r
  @retval EFI_SUCCESS     Success.\r
  @retval EFI_DEVICE_ERROR Fail to scan bus.\r
**/\r
EFI_STATUS\r
PciScanBus_WithHotPlugDeviceSupport (\r
  IN PCI_IO_DEVICE                      *Bridge,\r
  IN UINT8                              StartBusNumber,\r
  OUT UINT8                             *SubBusNumber,\r
  OUT UINT8                             *PaddedBusRange\r
  );\r
\r
/**\r
  Wapper function of scanning pci bus and assign bus number to the given PCI bus system\r
  Feature flag PcdPciBusHotplugDeviceSupport determine whether need support hotplug.  \r
  \r
  @param  Bridge          Bridge device instance.\r
  @param  StartBusNumber  start point.\r
  @param  SubBusNumber    Point to sub bus number.\r
  @param  PaddedBusRange  Customized bus number.\r
  \r
  @retval EFI_SUCCESS     Success.\r
  @retval EFI_DEVICE_ERROR Fail to scan bus.\r
**/\r
EFI_STATUS\r
PciScanBus_WithoutHotPlugDeviceSupport (\r
  IN PCI_IO_DEVICE                      *Bridge,\r
  IN UINT8                              StartBusNumber,\r
  OUT UINT8                             *SubBusNumber,\r
  OUT UINT8                             *PaddedBusRange\r
  );\r
\r
/**\r
  Process Option Rom on this host bridge.\r
  \r
  @param Bridge  Pci bridge device instance.\r
  \r
  @retval EFI_SUCCESS Success.\r
**/\r
EFI_STATUS\r
PciRootBridgeP2CProcess (\r
  IN PCI_IO_DEVICE *Bridge\r
  );\r
\r
/**\r
  Process Option Rom on this host bridge.\r
  \r
  @param PciResAlloc Pointer to instance of EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL.\r
  \r
  @retval EFI_NOT_FOUND Can not find the root bridge instance.\r
  @retval EFI_SUCCESS   Success process.\r
**/\r
EFI_STATUS\r
PciHostBridgeP2CProcess (\r
  IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *PciResAlloc\r
  );\r
\r
/**\r
  This function is used to enumerate the entire host bridge\r
  in a given platform.\r
\r
  @param PciResAlloc   A pointer to the resource allocate protocol.\r
\r
  @retval EFI_OUT_OF_RESOURCES no enough resource.\r
  @retval EFI_SUCCESS Success.\r
\r
**/\r
EFI_STATUS\r
PciHostBridgeEnumerator (\r
  EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL  *PciResAlloc\r
  );\r
\r
/**\r
  Read PCI configuration space through EFI_PCI_IO_PROTOCOL.\r
\r
  @param  PciIo               A pointer to the EFI_PCI_O_PROTOCOL.\r
  @param  Width               Signifies the width of the memory operations.\r
  @param  Address             The address within the PCI configuration space for the PCI controller.\r
  @param  Count               The number of unit to be read.\r
  @param  Buffer              For read operations, the destination buffer to store the results. For\r
                              write operations, the source buffer to write data from.\r
\r
  @retval EFI_SUCCESS            The data was read from or written to the PCI root bridge.\r
  @retval EFI_INVALID_PARAMETER  Width is invalid for this PCI root bridge.\r
  @retval EFI_INVALID_PARAMETER  Buffer is NULL.\r
  @retval EFI_OUT_OF_RESOURCES   The request could not be completed due to a lack of resources.\r
\r
**/\r
EFI_STATUS\r
PciIoRead (\r
  IN       EFI_PCI_IO_PROTOCOL                    *PciIo,\r
  IN       EFI_PCI_IO_PROTOCOL_WIDTH              Width,\r
  IN       UINT32                                 Address,\r
  IN       UINTN                                  Count,\r
  IN OUT   VOID                                   *Buffer\r
  );\r
\r
/**\r
  Write PCI configuration space through EFI_PCI_IO_PROTOCOL.\r
\r
  @param  PciIo               A pointer to the EFI_PCI_O_PROTOCOL.\r
  @param  Width               Signifies the width of the memory operations.\r
  @param  Address             The address within the PCI configuration space for the PCI controller.\r
  @param  Count               The number of unit to be write.\r
  @param  Buffer              For read operations, the destination buffer to store the results. For\r
                              write operations, the source buffer to write data from.\r
\r
  @retval EFI_SUCCESS            The data was read from or written to the PCI root bridge.\r
  @retval EFI_INVALID_PARAMETER  Width is invalid for this PCI root bridge.\r
  @retval EFI_INVALID_PARAMETER  Buffer is NULL.\r
  @retval EFI_OUT_OF_RESOURCES   The request could not be completed due to a lack of resources.\r
\r
**/\r
EFI_STATUS\r
PciIoWrite (\r
  IN       EFI_PCI_IO_PROTOCOL                    *PciIo,\r
  IN       EFI_PCI_IO_PROTOCOL_WIDTH              Width,\r
  IN       UINT32                                 Address,\r
  IN       UINTN                                  Count,\r
  IN OUT   VOID                                   *Buffer\r
  );\r
\r
/**\r
  Write PCI configuration space through EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
\r
  @param  PciRootBridgeIo     A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
  @param  Pci                 A pointer to PCI_TYPE00.\r
  @param  Width               Signifies the width of the memory operations.\r
  @param  Address             The address within the PCI configuration space for the PCI controller.\r
  @param  Count               The number of unit to be write.\r
  @param  Buffer              For read operations, the destination buffer to store the results. For\r
                              write operations, the source buffer to write data from.\r
\r
  @retval EFI_SUCCESS            The data was read from or written to the PCI root bridge.\r
  @retval EFI_INVALID_PARAMETER  Width is invalid for this PCI root bridge.\r
  @retval EFI_INVALID_PARAMETER  Buffer is NULL.\r
  @retval EFI_OUT_OF_RESOURCES   The request could not be completed due to a lack of resources.\r
\r
**/\r
EFI_STATUS\r
PciRootBridgeIoWrite (\r
  IN       EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL        *PciRootBridgeIo,\r
  IN       PCI_TYPE00                             *Pci,\r
  IN       EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH  Width,\r
  IN       UINT64                                 Address,\r
  IN       UINTN                                  Count,\r
  IN OUT   VOID                                   *Buffer\r
  );\r
\r
/**\r
  Read PCI configuration space through EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
\r
  @param  PciRootBridgeIo     A pointer to the EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL.\r
  @param  Pci                 A pointer to PCI_TYPE00.\r
  @param  Width               Signifies the width of the memory operations.\r
  @param  Address             The address within the PCI configuration space for the PCI controller.\r
  @param  Count               The number of unit to be read.\r
  @param  Buffer              For read operations, the destination buffer to store the results. For\r
                              write operations, the source buffer to write data from.\r
\r
  @retval EFI_SUCCESS            The data was read from or written to the PCI root bridge.\r
  @retval EFI_INVALID_PARAMETER  Width is invalid for this PCI root bridge.\r
  @retval EFI_INVALID_PARAMETER  Buffer is NULL.\r
  @retval EFI_OUT_OF_RESOURCES   The request could not be completed due to a lack of resources.\r
\r
**/\r
EFI_STATUS\r
PciRootBridgeIoRead (\r
  IN       EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL        *PciRootBridgeIo,\r
  IN       PCI_TYPE00                             *Pci,         OPTIONAL\r
  IN       EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_WIDTH  Width,\r
  IN       UINT64                                 Address,\r
  IN       UINTN                                  Count,\r
  IN OUT   VOID                                   *Buffer\r
  );\r
#endif\r