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03df1608 | 1 | /** @file |
e3e7f36a | 2 | The header file provides interface definitions exposed by CSM (Compatible Support Module).\r |
3 | \r | |
4 | The CSM provides compatibility support between the Framework and traditional, legacy BIOS code \r | |
5 | and allows booting a traditional OS or booting an EFI OS off a device that requires a traditional \r | |
6 | option ROM (OpROM). \r | |
03df1608 | 7 | |
e3e7f36a | 8 | These definitions are from Compatibility Support Module Spec Version 0.97.\r |
9 | ||
8d129536 | 10 | Copyright (c) 2007-2009, Intel Corporation |
11 | All rights reserved. This program and the accompanying materials | |
12 | are licensed and made available under the terms and conditions of the BSD License | |
13 | which accompanies this distribution. The full text of the license may be found at | |
14 | http://opensource.org/licenses/bsd-license.php | |
15 | ||
16 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, | |
17 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. | |
18 | ||
64419615 | 19 | @par Revision Reference: |
20 | These definitions are from Compatibility Support Module Spec | |
21 | Version 0.97. | |
22 | ||
8d129536 | 23 | **/ |
24 | ||
25 | #ifndef _FRAMEWORK_LEGACY_16_H_ | |
26 | #define _FRAMEWORK_LEGACY_16_H_ | |
27 | ||
28 | #include <Base.h> | |
29 | ||
30 | #pragma pack(1) | |
31 | ||
32 | typedef UINT8 SERIAL_MODE; | |
33 | typedef UINT8 PARALLEL_MODE; | |
34 | ||
35 | #define EFI_COMPATIBILITY16_TABLE_SIGNATURE SIGNATURE_32 ('I', 'F', 'E', '$') | |
36 | ||
03df1608 | 37 | /// |
e3e7f36a | 38 | /// There is a table located within the traditional BIOS in either the 0xF000:xxxx or 0xE000:xxxx\r |
39 | /// physical address range. It is located on a 16-byte boundary and provides the physical address of the\r | |
40 | /// entry point for the Compatibility16 functions. These functions provide the platform-specific\r | |
41 | /// information that is required by the generic EfiCompatibility code. The functions are invoked via\r | |
42 | /// thunking by using EFI_LEGACY_BIOS_PROTOCOL.FarCall86() with the 32-bit physical\r | |
43 | /// entry point.\r | |
44 | /// | |
03df1608 | 45 | typedef struct { |
e3e7f36a | 46 | ///\r |
47 | /// The string "$EFI" denotes the start of the EfiCompatibility table. Byte 0 is "I," byte\r | |
48 | /// 1 is "F," byte 2 is "E," and byte 3 is "$" and is normally accessed as a DWORD or UINT32.\r | |
49 | /// | |
03df1608 | 50 | UINT32 Signature; |
e3e7f36a | 51 | \r |
52 | ///\r | |
53 | /// The value required such that byte checksum of TableLength equals zero.\r | |
54 | /// | |
03df1608 | 55 | UINT8 TableChecksum; |
e3e7f36a | 56 | \r |
57 | ///\r | |
58 | /// The length of this table.\r | |
59 | /// | |
03df1608 | 60 | UINT8 TableLength; |
e3e7f36a | 61 | \r |
62 | ///\r | |
63 | /// The major EFI revision for which this table was generated.\r | |
64 | /// | |
03df1608 | 65 | UINT8 EfiMajorRevision; |
e3e7f36a | 66 | \r |
67 | ///\r | |
68 | /// The minor EFI revision for which this table was generated.\r | |
69 | /// | |
03df1608 | 70 | UINT8 EfiMinorRevision; |
e3e7f36a | 71 | \r |
72 | ///\r | |
73 | /// The major revision of this table.\r | |
74 | /// | |
03df1608 | 75 | UINT8 TableMajorRevision; |
e3e7f36a | 76 | \r |
77 | ///\r | |
78 | /// The minor revision of this table.\r | |
79 | /// | |
03df1608 | 80 | UINT8 TableMinorRevision; |
e3e7f36a | 81 | \r |
82 | ///\r | |
83 | /// Reserved for future usage.\r | |
84 | /// | |
03df1608 | 85 | UINT16 Reserved; |
e3e7f36a | 86 | \r |
87 | ///\r | |
88 | /// The segment of the entry point within the traditional BIOS for Compatibility16 functions.\r | |
89 | /// | |
03df1608 | 90 | UINT16 Compatibility16CallSegment; |
e3e7f36a | 91 | \r |
92 | ///\r | |
93 | /// The offset of the entry point within the traditional BIOS for Compatibility16 functions.\r | |
94 | /// | |
03df1608 | 95 | UINT16 Compatibility16CallOffset; |
e3e7f36a | 96 | \r |
97 | ///\r | |
98 | /// The segment of the entry point within the traditional BIOS for EfiCompatibility to invoke the PnP installation check.\r | |
99 | /// | |
03df1608 | 100 | UINT16 PnPInstallationCheckSegment; |
e3e7f36a | 101 | \r |
102 | ///\r | |
103 | /// The Offset of the entry point within the traditional BIOS for EfiCompatibility to invoke the PnP installation check.\r | |
104 | /// | |
03df1608 | 105 | UINT16 PnPInstallationCheckOffset; |
e3e7f36a | 106 | \r |
107 | ///\r | |
108 | /// EFI system resources table. Type EFI_SYSTEM_TABLE is defined in the IntelPlatform Innovation Framework for EFI \r | |
109 | /// Driver Execution Environment Core Interface Specification (DXE CIS).\r | |
110 | /// | |
111 | UINT32 EfiSystemTable; \r | |
112 | \r | |
113 | ///\r | |
114 | /// The address of an OEM-provided identifier string. The string is null terminated.\r | |
115 | /// | |
03df1608 | 116 | UINT32 OemIdStringPointer; |
e3e7f36a | 117 | \r |
118 | ///\r | |
119 | /// The 32-bit physical address where ACPI RSD PTR is stored within the traditional\r | |
120 | /// BIOS. The remained of the ACPI tables are located at their EFI addresses. The size\r | |
121 | /// reserved is the maximum for ACPI 2.0. The EfiCompatibility will fill in the ACPI\r | |
122 | /// RSD PTR with either the ACPI 1.0b or 2.0 values.\r | |
123 | /// | |
03df1608 | 124 | UINT32 AcpiRsdPtrPointer; |
e3e7f36a | 125 | \r |
126 | ///\r | |
127 | /// The OEM revision number. Usage is undefined but provided for OEM module usage.\r | |
128 | /// | |
03df1608 | 129 | UINT16 OemRevision; |
e3e7f36a | 130 | \r |
131 | ///\r | |
132 | /// The 32-bit physical address where INT15 E820 data is stored within the traditional\r | |
133 | /// BIOS. The EfiCompatibility code will fill in the E820Pointer value and copy the\r | |
134 | /// data to the indicated area.\r | |
135 | /// | |
03df1608 | 136 | UINT32 E820Pointer; |
e3e7f36a | 137 | \r |
138 | ///\r | |
139 | /// The length of the E820 data and is filled in by the EfiCompatibility code.\r | |
140 | /// | |
03df1608 | 141 | UINT32 E820Length; |
e3e7f36a | 142 | \r |
143 | ///\r | |
144 | /// The 32-bit physical address where the $PIR table is stored in the traditional BIOS.\r | |
145 | /// The EfiCompatibility code will fill in the IrqRoutingTablePointer value and\r | |
146 | /// copy the data to the indicated area.\r | |
147 | /// | |
03df1608 | 148 | UINT32 IrqRoutingTablePointer; |
e3e7f36a | 149 | \r |
150 | ///\r | |
151 | /// The length of the $PIR table and is filled in by the EfiCompatibility code.\r | |
152 | /// | |
03df1608 | 153 | UINT32 IrqRoutingTableLength; |
e3e7f36a | 154 | \r |
155 | ///\r | |
156 | /// The 32-bit physical address where the MP table is stored in the traditional BIOS.\r | |
157 | /// The EfiCompatibility code will fill in the MpTablePtr value and copy the data to the indicated area.\r | |
158 | /// | |
03df1608 | 159 | UINT32 MpTablePtr; |
e3e7f36a | 160 | \r |
161 | ///\r | |
162 | /// The length of the MP table and is filled in by the EfiCompatibility code.\r | |
163 | /// | |
03df1608 | 164 | UINT32 MpTableLength; |
e3e7f36a | 165 | \r |
166 | ///\r | |
8d303ef3 | 167 | /// The segment of the OEM-specific INT table/code.\r |
e3e7f36a | 168 | /// |
03df1608 | 169 | UINT16 OemIntSegment; |
e3e7f36a | 170 | \r |
171 | ///\r | |
8d303ef3 | 172 | /// The offset of the OEM-specific INT table/code.\r |
e3e7f36a | 173 | /// |
03df1608 | 174 | UINT16 OemIntOffset; |
e3e7f36a | 175 | \r |
176 | ///\r | |
177 | /// The segment of the OEM-specific 32-bit table/code.\r | |
178 | /// | |
03df1608 | 179 | UINT16 Oem32Segment; |
e3e7f36a | 180 | \r |
181 | ///\r | |
182 | /// The offset of the OEM-specific 32-bit table/code.\r | |
183 | /// | |
03df1608 | 184 | UINT16 Oem32Offset; |
8d303ef3 | 185 | \r |
186 | ///\r | |
187 | /// The segment of the OEM-specific 16-bit table/code.\r | |
188 | /// | |
03df1608 | 189 | UINT16 Oem16Segment; |
8d303ef3 | 190 | \r |
191 | ///\r | |
192 | /// The offset of the OEM-specific 16-bit table/code.\r | |
193 | /// | |
03df1608 | 194 | UINT16 Oem16Offset; |
8d303ef3 | 195 | \r |
196 | ///\r | |
197 | /// The segment of the TPM binary passed to 16-bit CSM.\r | |
198 | /// | |
03df1608 | 199 | UINT16 TpmSegment; |
8d303ef3 | 200 | \r |
201 | ///\r | |
202 | /// The offset of the TPM binary passed to 16-bit CSM.\r | |
203 | /// | |
03df1608 | 204 | UINT16 TpmOffset; |
e3e7f36a | 205 | \r |
206 | ///\r | |
207 | /// A pointer to a string identifying the independent BIOS vendor.\r | |
208 | /// | |
03df1608 | 209 | UINT32 IbvPointer; |
8d303ef3 | 210 | \r |
211 | ///\r | |
212 | /// This field is NULL for all systems not supporting PCI Express. This field is the base\r | |
213 | /// value of the start of the PCI Express memory-mapped configuration registers and\r | |
214 | /// must be filled in prior to EfiCompatibility code issuing the Compatibility16 function\r | |
215 | /// Compatibility16InitializeYourself().\r | |
216 | /// Compatibility16InitializeYourself() is defined in Compatability16\r | |
217 | /// Functions.\r | |
218 | /// | |
03df1608 | 219 | UINT32 PciExpressBase; |
8d303ef3 | 220 | \r |
221 | ///\r | |
222 | /// Maximum PCI bus number assigned.\r | |
223 | /// | |
8d129536 | 224 | UINT8 LastPciBus; |
225 | } EFI_COMPATIBILITY16_TABLE; | |
226 | ||
227 | /// | |
e3e7f36a | 228 | /// Functions provided by the CSM binary which communicate between the EfiCompatibility \r |
64419615 | 229 | /// and Compatability16 code.\r |
230 | ///\r | |
231 | /// Inconsistent with specification here: \r | |
232 | /// The member's name started with "Compatibility16" [defined in Intel Framework Compatibility Support Module Specification / 0.97 version] \r | |
233 | /// has been changed to "Legacy16" since keeping backward compatible.\r | |
234 | ///\r | |
03df1608 | 235 | typedef enum { |
e3e7f36a | 236 | ///\r |
237 | /// Causes the Compatibility16 code to do any internal initialization required.\r | |
238 | /// Input:\r | |
239 | /// AX = Compatibility16InitializeYourself\r | |
240 | /// ES:BX = Pointer to EFI_TO_COMPATIBILITY16_INIT_TABLE\r | |
241 | /// Return:\r | |
242 | /// AX = Return Status codes\r | |
64419615 | 243 | ///\r |
244 | Legacy16InitializeYourself = 0x0000, | |
e3e7f36a | 245 | \r |
246 | ///\r | |
247 | /// Causes the Compatibility16 BIOS to perform any drive number translations to match the boot sequence.\r | |
248 | /// Input:\r | |
249 | /// AX = Compatibility16UpdateBbs\r | |
250 | /// ES:BX = Pointer to EFI_TO_COMPATIBILITY16_BOOT_TABLE\r | |
251 | /// Return:\r | |
252 | /// AX = Returned status codes\r | |
253 | /// | |
64419615 | 254 | Legacy16UpdateBbs = 0x0001, |
e3e7f36a | 255 | \r |
256 | ///\r | |
257 | /// Allows the Compatibility16 code to perform any final actions before booting. The Compatibility16\r | |
258 | /// code is read/write.\r | |
259 | /// Input:\r | |
260 | /// AX = Compatibility16PrepareToBoot\r | |
261 | /// ES:BX = Pointer to EFI_TO_COMPATIBILITY16_BOOT_TABLE structure \r | |
262 | /// Return:\r | |
263 | /// AX = Returned status codes\r | |
264 | /// | |
64419615 | 265 | Legacy16PrepareToBoot = 0x0002, |
e3e7f36a | 266 | \r |
267 | ///\r | |
268 | /// Causes the Compatibility16 BIOS to boot. The Compatibility16 code is Read/Only.\r | |
269 | /// Input:\r | |
270 | /// AX = Compatibility16Boot\r | |
271 | /// Output:\r | |
272 | /// AX = Returned status codes\r | |
273 | /// | |
64419615 | 274 | Legacy16Boot = 0x0003, |
e3e7f36a | 275 | \r |
276 | ///\r | |
277 | /// Allows the Compatibility16 code to get the last device from which a boot was attempted. This is\r | |
278 | /// stored in CMOS and is the priority number of the last attempted boot device.\r | |
279 | /// Input:\r | |
280 | /// AX = Compatibility16RetrieveLastBootDevice\r | |
281 | /// Output:\r | |
282 | /// AX = Returned status codes\r | |
283 | /// BX = Priority number of the boot device.\r | |
284 | /// | |
64419615 | 285 | Legacy16RetrieveLastBootDevice = 0x0004, |
e3e7f36a | 286 | \r |
287 | ///\r | |
288 | /// Allows the Compatibility16 code rehook INT13, INT18, and/or INT19 after dispatching a legacy OpROM.\r | |
289 | /// Input:\r | |
290 | /// AX = Compatibility16DispatchOprom\r | |
291 | /// ES:BX = Pointer to EFI_DISPATCH_OPROM_TABLE\r | |
292 | /// Output:\r | |
293 | /// AX = Returned status codes\r | |
294 | /// BX = Number of non-BBS-compliant devices found. Equals 0 if BBS compliant.\r | |
295 | /// | |
64419615 | 296 | Legacy16DispatchOprom = 0x0005, |
e3e7f36a | 297 | \r |
298 | ///\r | |
299 | /// Finds a free area in the 0xFxxxx or 0xExxxx region of the specified length and returns the address\r | |
300 | /// of that region.\r | |
301 | /// Input:\r | |
302 | /// AX = Compatibility16GetTableAddress\r | |
303 | /// BX = Allocation region\r | |
304 | /// 00 = Allocate from either 0xE0000 or 0xF0000 64 KB blocks.\r | |
305 | /// Bit 0 = 1 Allocate from 0xF0000 64 KB block\r | |
306 | /// Bit 1 = 1 Allocate from 0xE0000 64 KB block\r | |
307 | /// CX = Requested length in bytes.\r | |
308 | /// DX = Required address alignment. Bit mapped. First non-zero bit from the right is the alignment.\r | |
309 | /// Output:\r | |
310 | /// AX = Returned status codes\r | |
311 | /// DS:BX = Address of the region\r | |
312 | /// | |
64419615 | 313 | Legacy16GetTableAddress = 0x0006, |
e3e7f36a | 314 | \r |
315 | ///\r | |
316 | /// Enables the EfiCompatibility module to do any nonstandard processing of keyboard LEDs or state.\r | |
317 | /// Input:\r | |
318 | /// AX = Compatibility16SetKeyboardLeds\r | |
319 | /// CL = LED status.\r | |
e02a0e92 | 320 | /// Bit 0 Scroll Lock 0 = Off\r |
321 | /// Bit 1 NumLock\r | |
322 | /// Bit 2 Caps Lock\r | |
e3e7f36a | 323 | /// Output:\r |
324 | /// AX = Returned status codes\r | |
325 | /// | |
64419615 | 326 | Legacy16SetKeyboardLeds = 0x0007, |
e3e7f36a | 327 | \r |
328 | ///\r | |
329 | /// Enables the EfiCompatibility module to install an interrupt handler for PCI mass media devices that\r | |
330 | /// do not have an OpROM associated with them. An example is SATA.\r | |
331 | /// Input:\r | |
332 | /// AX = Compatibility16InstallPciHandler\r | |
333 | /// ES:BX = Pointer to EFI_LEGACY_INSTALL_PCI_HANDLER structure\r | |
334 | /// Output:\r | |
335 | /// AX = Returned status codes\r | |
336 | /// | |
64419615 | 337 | Legacy16InstallPciHandler = 0x0008 |
8d129536 | 338 | } EFI_COMPATIBILITY_FUNCTIONS; |
339 | ||
340 | ||
341 | /// | |
342 | /// EFI_DISPATCH_OPROM_TABLE | |
343 | /// | |
344 | typedef struct { | |
e3e7f36a | 345 | UINT16 PnPInstallationCheckSegment; ///< Pointer to the PnpInstallationCheck data structure. |
346 | UINT16 PnPInstallationCheckOffset; ///< Pointer to the PnpInstallationCheck data structure. | |
347 | UINT16 OpromSegment; ///< The segment where the OpROM was placed. Offset is assumed to be 3. | |
348 | UINT8 PciBus; ///< The PCI bus. | |
349 | UINT8 PciDeviceFunction; ///< The PCI device * 0x08 | PCI function. | |
03df1608 | 350 | UINT8 NumberBbsEntries; ///< The number of valid BBS table entries upon entry and exit. The IBV code may |
351 | ///< increase this number, if BBS-compliant devices also hook INTs in order to force the | |
e3e7f36a | 352 | ///< OpROM BIOS Setup to be executed. |
8d303ef3 | 353 | VOID *BbsTablePointer; ///< Pointer to the BBS table. |
64419615 | 354 | UINT16 RuntimeSegment; ///< The segment where the OpROM can be relocated to. If this value is 0x0000, this |
355 | ///< means that the relocation of this run time code is not supported.\r | |
356 | ///< Inconsistent with specification here: \r | |
357 | ///< The member's name "OpromDestinationSegment" [defined in Intel Framework Compatibility Support Module Specification / 0.97 version] \r | |
358 | ///< has been changed to "RuntimeSegment" since keeping backward compatible.\r | |
359 | ||
8d129536 | 360 | } EFI_DISPATCH_OPROM_TABLE; |
361 | ||
362 | /// | |
363 | /// EFI_TO_COMPATIBILITY16_INIT_TABLE | |
364 | /// | |
03df1608 | 365 | typedef struct { |
e3e7f36a | 366 | ///\r |
367 | /// Starting address of memory under 1 MB. The ending address is assumed to be 640 KB or 0x9FFFF.\r | |
368 | /// | |
03df1608 | 369 | UINT32 BiosLessThan1MB; |
e3e7f36a | 370 | \r |
371 | ///\r | |
372 | /// Starting address of the high memory block.\r | |
373 | /// | |
03df1608 | 374 | UINT32 HiPmmMemory; |
e3e7f36a | 375 | \r |
376 | ///\r | |
377 | /// Length of high memory block.\r | |
378 | /// | |
03df1608 | 379 | UINT32 HiPmmMemorySizeInBytes; |
e3e7f36a | 380 | \r |
381 | ///\r | |
382 | /// The segment of the reverse thunk call code.\r | |
383 | /// | |
03df1608 | 384 | UINT16 ReverseThunkCallSegment; |
e3e7f36a | 385 | \r |
386 | ///\r | |
387 | /// The offset of the reverse thunk call code.\r | |
388 | /// | |
03df1608 | 389 | UINT16 ReverseThunkCallOffset; |
e3e7f36a | 390 | \r |
391 | ///\r | |
392 | /// The number of E820 entries copied to the Compatibility16 BIOS.\r | |
393 | /// | |
03df1608 | 394 | UINT32 NumberE820Entries; |
e3e7f36a | 395 | \r |
396 | ///\r | |
397 | /// The amount of usable memory above 1 MB, e.g., E820 type 1 memory.\r | |
398 | /// | |
03df1608 | 399 | UINT32 OsMemoryAbove1Mb; |
e3e7f36a | 400 | \r |
401 | ///\r | |
402 | /// The start of thunk code in main memory. Memory cannot be used by BIOS or PMM.\r | |
403 | /// | |
03df1608 | 404 | UINT32 ThunkStart; |
e3e7f36a | 405 | \r |
406 | ///\r | |
407 | /// The size of the thunk code.\r | |
408 | /// | |
03df1608 | 409 | UINT32 ThunkSizeInBytes; |
8d303ef3 | 410 | \r |
411 | ///\r | |
412 | /// Starting address of memory under 1 MB.\r | |
413 | /// | |
03df1608 | 414 | UINT32 LowPmmMemory; |
8d303ef3 | 415 | \r |
416 | ///\r | |
417 | /// Length of low Memory block.\r | |
418 | /// | |
8d129536 | 419 | UINT32 LowPmmMemorySizeInBytes; |
420 | } EFI_TO_COMPATIBILITY16_INIT_TABLE; | |
421 | ||
422 | /// | |
03df1608 | 423 | /// DEVICE_PRODUCER_SERIAL |
8d129536 | 424 | /// |
425 | typedef struct { | |
e3e7f36a | 426 | UINT16 Address; ///< I/O address assigned to the serial port |
427 | UINT8 Irq; ///< IRQ assigned to the serial port. | |
428 | SERIAL_MODE Mode; ///< Mode of serial port. Values are defined below. | |
8d129536 | 429 | } DEVICE_PRODUCER_SERIAL; |
430 | ||
03df1608 | 431 | /// |
432 | /// DEVICE_PRODUCER_SERIAL's modes | |
433 | ///@{ | |
8d129536 | 434 | #define DEVICE_SERIAL_MODE_NORMAL 0x00 |
435 | #define DEVICE_SERIAL_MODE_IRDA 0x01 | |
436 | #define DEVICE_SERIAL_MODE_ASK_IR 0x02 | |
437 | #define DEVICE_SERIAL_MODE_DUPLEX_HALF 0x00 | |
438 | #define DEVICE_SERIAL_MODE_DUPLEX_FULL 0x10 | |
03df1608 | 439 | ///@) |
8d129536 | 440 | |
441 | /// | |
03df1608 | 442 | /// DEVICE_PRODUCER_PARALLEL |
8d129536 | 443 | /// |
444 | typedef struct { | |
e3e7f36a | 445 | UINT16 Address; ///< I/O address assigned to the parallel port |
446 | UINT8 Irq; ///< IRQ assigned to the parallel port. | |
447 | UINT8 Dma; ///< DMA assigned to the parallel port. | |
448 | PARALLEL_MODE Mode; ///< Mode of the parallel port. Values are defined below. | |
8d129536 | 449 | } DEVICE_PRODUCER_PARALLEL; |
450 | ||
03df1608 | 451 | /// |
452 | /// DEVICE_PRODUCER_PARALLEL's modes | |
453 | ///@{ | |
8d129536 | 454 | #define DEVICE_PARALLEL_MODE_MODE_OUTPUT_ONLY 0x00 |
455 | #define DEVICE_PARALLEL_MODE_MODE_BIDIRECTIONAL 0x01 | |
456 | #define DEVICE_PARALLEL_MODE_MODE_EPP 0x02 | |
457 | #define DEVICE_PARALLEL_MODE_MODE_ECP 0x03 | |
03df1608 | 458 | ///@} |
8d129536 | 459 | |
460 | /// | |
461 | /// DEVICE_PRODUCER_FLOPPY | |
462 | /// | |
463 | typedef struct { | |
e3e7f36a | 464 | UINT16 Address; ///< I/O address assigned to the floppy |
465 | UINT8 Irq; ///< IRQ assigned to the floppy. | |
466 | UINT8 Dma; ///< DMA assigned to the floppy. | |
467 | UINT8 NumberOfFloppy; ///< Number of floppies in the system. | |
8d129536 | 468 | } DEVICE_PRODUCER_FLOPPY; |
469 | ||
470 | /// | |
471 | /// LEGACY_DEVICE_FLAGS | |
472 | /// | |
473 | typedef struct { | |
e3e7f36a | 474 | UINT32 A20Kybd : 1; ///< A20 controller by keyboard controller. |
475 | UINT32 A20Port90 : 1; ///< A20 controlled by port 0x92. | |
476 | UINT32 Reserved : 30; ///< Reserved for future usage. | |
8d129536 | 477 | } LEGACY_DEVICE_FLAGS; |
478 | ||
479 | /// | |
480 | /// DEVICE_PRODUCER_DATA_HEADER | |
481 | /// | |
482 | typedef struct { | |
e3e7f36a | 483 | DEVICE_PRODUCER_SERIAL Serial[4]; ///< Data for serial port x. Type DEVICE_PRODUCER_SERIAL is defined below. |
484 | DEVICE_PRODUCER_PARALLEL Parallel[3]; ///< Data for parallel port x. Type DEVICE_PRODUCER_PARALLEL is defined below. | |
485 | DEVICE_PRODUCER_FLOPPY Floppy; ///< Data for floppy. Type DEVICE_PRODUCER_FLOPPY is defined below. | |
486 | UINT8 MousePresent; ///< Flag to indicate if mouse is present. | |
487 | LEGACY_DEVICE_FLAGS Flags; ///< Miscellaneous Boolean state information passed to CSM. | |
8d129536 | 488 | } DEVICE_PRODUCER_DATA_HEADER; |
489 | ||
490 | /// | |
491 | /// ATAPI_IDENTIFY | |
492 | /// | |
493 | typedef struct { | |
e3e7f36a | 494 | UINT16 Raw[256]; ///< Raw data from the IDE IdentifyDrive command. |
8d129536 | 495 | } ATAPI_IDENTIFY; |
496 | ||
497 | /// | |
03df1608 | 498 | /// HDD_INFO |
8d129536 | 499 | /// |
03df1608 | 500 | typedef struct { |
e3e7f36a | 501 | ///\r |
502 | /// Status of IDE device. Values are defined below. There is one HDD_INFO structure\r | |
503 | /// per IDE controller. The IdentifyDrive is per drive. Index 0 is master and index\r | |
504 | /// 1 is slave.\r | |
505 | /// | |
506 | UINT16 Status; \r | |
507 | \r | |
508 | ///\r | |
509 | /// PCI bus of IDE controller.\r | |
510 | /// | |
03df1608 | 511 | UINT32 Bus; |
e3e7f36a | 512 | \r |
513 | ///\r | |
514 | /// PCI device of IDE controller.\r | |
515 | /// | |
03df1608 | 516 | UINT32 Device; |
e3e7f36a | 517 | \r |
518 | ///\r | |
519 | /// PCI function of IDE controller.\r | |
520 | /// | |
03df1608 | 521 | UINT32 Function; |
e3e7f36a | 522 | \r |
523 | ///\r | |
524 | /// Command ports base address.\r | |
525 | /// | |
03df1608 | 526 | UINT16 CommandBaseAddress; |
e3e7f36a | 527 | \r |
528 | ///\r | |
529 | /// Control ports base address.\r | |
530 | /// | |
03df1608 | 531 | UINT16 ControlBaseAddress; |
e3e7f36a | 532 | \r |
533 | ///\r | |
534 | /// Bus master address\r | |
535 | /// | |
03df1608 | 536 | UINT16 BusMasterAddress; |
e3e7f36a | 537 | |
03df1608 | 538 | UINT8 HddIrq; |
e3e7f36a | 539 | \r |
540 | ///\r | |
541 | /// Data that identifies the drive data, one per possible attached drive\r | |
542 | /// | |
8d129536 | 543 | ATAPI_IDENTIFY IdentifyDrive[2]; |
544 | } HDD_INFO; | |
545 | ||
03df1608 | 546 | /// |
547 | /// HDD_INFO status bits | |
548 | /// | |
8d129536 | 549 | #define HDD_PRIMARY 0x01 |
550 | #define HDD_SECONDARY 0x02 | |
551 | #define HDD_MASTER_ATAPI_CDROM 0x04 | |
552 | #define HDD_SLAVE_ATAPI_CDROM 0x08 | |
553 | #define HDD_MASTER_IDE 0x20 | |
554 | #define HDD_SLAVE_IDE 0x40 | |
555 | #define HDD_MASTER_ATAPI_ZIPDISK 0x10 | |
556 | #define HDD_SLAVE_ATAPI_ZIPDISK 0x80 | |
557 | ||
558 | /// | |
559 | /// BBS_STATUS_FLAGS | |
560 | /// | |
561 | typedef struct { | |
e3e7f36a | 562 | UINT16 OldPosition : 4; ///< Prior priority. |
563 | UINT16 Reserved1 : 4; ///< Reserved for future use. | |
564 | UINT16 Enabled : 1; ///< If 0, ignore this entry. | |
565 | UINT16 Failed : 1; ///< 0 = Not known if boot failure occurred.\r | |
566 | ///< 1 = Boot attempted failed.\r | |
567 | \r | |
568 | ///\r | |
569 | /// State of media present.\r | |
570 | /// 00 = No bootable media is present in the device.\r | |
571 | /// 01 = Unknown if a bootable media present.\r | |
572 | /// 10 = Media is present and appears bootable.\r | |
573 | /// 11 = Reserved.\r | |
574 | /// | |
8d129536 | 575 | UINT16 MediaPresent : 2; |
e3e7f36a | 576 | UINT16 Reserved2 : 4; ///< Reserved for future use. |
8d129536 | 577 | } BBS_STATUS_FLAGS; |
578 | ||
579 | /// | |
580 | /// BBS_TABLE, device type values & boot priority values | |
581 | /// | |
03df1608 | 582 | typedef struct { |
e3e7f36a | 583 | ///\r |
584 | /// The boot priority for this boot device. Values are defined below.\r | |
585 | /// | |
03df1608 | 586 | UINT16 BootPriority; |
e3e7f36a | 587 | \r |
588 | ///\r | |
589 | /// The PCI bus for this boot device.\r | |
590 | /// | |
03df1608 | 591 | UINT32 Bus; |
e3e7f36a | 592 | \r |
593 | ///\r | |
594 | /// The PCI device for this boot device.\r | |
595 | /// | |
03df1608 | 596 | UINT32 Device; |
e3e7f36a | 597 | \r |
598 | ///\r | |
599 | /// The PCI function for the boot device.\r | |
600 | /// | |
03df1608 | 601 | UINT32 Function; |
e3e7f36a | 602 | \r |
603 | ///\r | |
604 | /// The PCI class for this boot device.\r | |
605 | /// | |
03df1608 | 606 | UINT8 Class; |
e3e7f36a | 607 | \r |
608 | ///\r | |
609 | /// The PCI Subclass for this boot device.\r | |
610 | /// | |
03df1608 | 611 | UINT8 SubClass; |
e3e7f36a | 612 | \r |
613 | ///\r | |
614 | /// Segment:offset address of an ASCIIZ description string describing the manufacturer.\r | |
615 | /// | |
03df1608 | 616 | UINT16 MfgStringOffset; |
e3e7f36a | 617 | \r |
618 | ///\r | |
619 | /// Segment:offset address of an ASCIIZ description string describing the manufacturer.\r | |
620 | /// | |
03df1608 | 621 | UINT16 MfgStringSegment; |
e3e7f36a | 622 | \r |
623 | ///\r | |
624 | /// BBS device type. BBS device types are defined below.\r | |
625 | /// | |
03df1608 | 626 | UINT16 DeviceType; |
e3e7f36a | 627 | \r |
628 | ///\r | |
629 | /// Status of this boot device. Type BBS_STATUS_FLAGS is defined below.\r | |
630 | /// | |
03df1608 | 631 | BBS_STATUS_FLAGS StatusFlags; |
e3e7f36a | 632 | \r |
633 | ///\r | |
634 | /// Segment:Offset address of boot loader for IPL devices or install INT13 handler for\r | |
635 | /// BCV devices.\r | |
636 | /// | |
03df1608 | 637 | UINT16 BootHandlerOffset; |
e3e7f36a | 638 | \r |
639 | ///\r | |
640 | /// Segment:Offset address of boot loader for IPL devices or install INT13 handler for\r | |
641 | /// BCV devices.\r | |
642 | /// | |
03df1608 | 643 | UINT16 BootHandlerSegment; |
e3e7f36a | 644 | \r |
645 | ///\r | |
646 | /// Segment:offset address of an ASCIIZ description string describing this device.\r | |
647 | /// | |
8d129536 | 648 | UINT16 DescStringOffset; |
e3e7f36a | 649 | \r |
650 | ///\r | |
651 | /// Segment:offset address of an ASCIIZ description string describing this device.\r | |
652 | ///\r | |
03df1608 | 653 | UINT16 DescStringSegment; |
e3e7f36a | 654 | \r |
655 | ///\r | |
656 | /// Reserved.\r | |
657 | /// | |
03df1608 | 658 | UINT32 InitPerReserved; |
e3e7f36a | 659 | \r |
660 | ///\r | |
661 | /// The use of these fields is IBV dependent. They can be used to flag that an OpROM\r | |
662 | /// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI\r | |
663 | /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup\r | |
664 | /// | |
03df1608 | 665 | UINT32 AdditionalIrq13Handler; |
e3e7f36a | 666 | \r |
667 | ///\r | |
668 | /// The use of these fields is IBV dependent. They can be used to flag that an OpROM\r | |
669 | /// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI\r | |
670 | /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup\r | |
671 | /// | |
03df1608 | 672 | UINT32 AdditionalIrq18Handler; |
e3e7f36a | 673 | \r |
674 | ///\r | |
675 | /// The use of these fields is IBV dependent. They can be used to flag that an OpROM\r | |
676 | /// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI\r | |
677 | /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup\r | |
678 | /// | |
03df1608 | 679 | UINT32 AdditionalIrq19Handler; |
e3e7f36a | 680 | \r |
681 | ///\r | |
682 | /// The use of these fields is IBV dependent. They can be used to flag that an OpROM\r | |
683 | /// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI\r | |
684 | /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup\r | |
685 | /// | |
8d129536 | 686 | UINT32 AdditionalIrq40Handler; |
687 | UINT8 AssignedDriveNumber; | |
688 | UINT32 AdditionalIrq41Handler; | |
689 | UINT32 AdditionalIrq46Handler; | |
690 | UINT32 IBV1; | |
691 | UINT32 IBV2; | |
692 | } BBS_TABLE; | |
693 | ||
03df1608 | 694 | /// |
695 | /// BBS device type values | |
696 | ///@{ | |
8d129536 | 697 | #define BBS_FLOPPY 0x01 |
698 | #define BBS_HARDDISK 0x02 | |
699 | #define BBS_CDROM 0x03 | |
700 | #define BBS_PCMCIA 0x04 | |
701 | #define BBS_USB 0x05 | |
702 | #define BBS_EMBED_NETWORK 0x06 | |
703 | #define BBS_BEV_DEVICE 0x80 | |
704 | #define BBS_UNKNOWN 0xff | |
03df1608 | 705 | ///@} |
8d129536 | 706 | |
03df1608 | 707 | /// |
708 | /// BBS boot priority values | |
709 | ///@{ | |
8d129536 | 710 | #define BBS_DO_NOT_BOOT_FROM 0xFFFC |
711 | #define BBS_LOWEST_PRIORITY 0xFFFD | |
712 | #define BBS_UNPRIORITIZED_ENTRY 0xFFFE | |
713 | #define BBS_IGNORE_ENTRY 0xFFFF | |
03df1608 | 714 | ///@} |
8d129536 | 715 | |
716 | /// | |
03df1608 | 717 | /// SMM_ATTRIBUTES |
8d129536 | 718 | /// |
03df1608 | 719 | typedef struct { |
e3e7f36a | 720 | ///\r |
721 | /// Access mechanism used to generate the soft SMI. Defined types are below. The other\r | |
722 | /// values are reserved for future usage.\r | |
723 | /// | |
03df1608 | 724 | UINT16 Type : 3; |
e3e7f36a | 725 | \r |
726 | ///\r | |
727 | /// Size of "port" in bits. Defined values are below.\r | |
728 | /// | |
03df1608 | 729 | UINT16 PortGranularity : 3; |
e3e7f36a | 730 | \r |
731 | ///\r | |
732 | /// Size of data in bits. Defined values are below.\r | |
733 | /// | |
03df1608 | 734 | UINT16 DataGranularity : 3; |
e3e7f36a | 735 | \r |
736 | ///\r | |
737 | /// Reserved for future use.\r | |
738 | /// | |
8d129536 | 739 | UINT16 Reserved : 7; |
740 | } SMM_ATTRIBUTES; | |
741 | ||
03df1608 | 742 | /// |
743 | /// SMM_ATTRIBUTES type values | |
744 | ///@{ | |
8d129536 | 745 | #define STANDARD_IO 0x00 |
746 | #define STANDARD_MEMORY 0x01 | |
03df1608 | 747 | ///@} |
8d129536 | 748 | |
03df1608 | 749 | /// |
750 | /// SMM_ATTRIBUTES port size constants | |
751 | ///@{ | |
8d129536 | 752 | #define PORT_SIZE_8 0x00 |
753 | #define PORT_SIZE_16 0x01 | |
754 | #define PORT_SIZE_32 0x02 | |
755 | #define PORT_SIZE_64 0x03 | |
03df1608 | 756 | ///@} |
8d129536 | 757 | |
03df1608 | 758 | /// |
759 | /// SMM_ATTRIBUTES data size constants | |
760 | ///@{ | |
8d129536 | 761 | #define DATA_SIZE_8 0x00 |
762 | #define DATA_SIZE_16 0x01 | |
763 | #define DATA_SIZE_32 0x02 | |
764 | #define DATA_SIZE_64 0x03 | |
03df1608 | 765 | ///@} |
8d129536 | 766 | |
767 | /// | |
768 | /// SMM_FUNCTION & relating constants | |
769 | /// | |
770 | typedef struct { | |
771 | UINT16 Function : 15; | |
772 | UINT16 Owner : 1; | |
773 | } SMM_FUNCTION; | |
774 | ||
03df1608 | 775 | /// |
776 | /// SMM_FUNCTION Function constants | |
777 | ///@{ | |
8d129536 | 778 | #define INT15_D042 0x0000 |
779 | #define GET_USB_BOOT_INFO 0x0001 | |
780 | #define DMI_PNP_50_57 0x0002 | |
03df1608 | 781 | ///@} |
8d129536 | 782 | |
03df1608 | 783 | /// |
784 | /// SMM_FUNCTION Owner constants | |
785 | ///@{ | |
8d129536 | 786 | #define STANDARD_OWNER 0x0 |
787 | #define OEM_OWNER 0x1 | |
03df1608 | 788 | ///@} |
8d129536 | 789 | |
790 | /** | |
791 | * SMM_ENTRY | |
792 | * | |
793 | * This structure assumes both port and data sizes are 1. SmmAttribute must be | |
794 | * properly to reflect that assumption. | |
795 | **/ | |
03df1608 | 796 | typedef struct { |
e3e7f36a | 797 | ///\r |
798 | /// Describes the access mechanism, SmmPort, and SmmData sizes. Type\r | |
799 | /// SMM_ATTRIBUTES is defined below.\r | |
800 | /// | |
03df1608 | 801 | SMM_ATTRIBUTES SmmAttributes; |
e3e7f36a | 802 | \r |
803 | ///\r | |
804 | /// Function Soft SMI is to perform. Type SMM_FUNCTION is defined below.\r | |
805 | /// | |
03df1608 | 806 | SMM_FUNCTION SmmFunction; |
e3e7f36a | 807 | \r |
808 | ///\r | |
809 | /// SmmPort size depends upon SmmAttributes and ranges from2 bytes to 16 bytes\r | |
810 | /// | |
03df1608 | 811 | UINT8 SmmPort; |
e3e7f36a | 812 | \r |
813 | ///\r | |
814 | /// SmmData size depends upon SmmAttributes and ranges from2 bytes to 16 bytes\r | |
815 | /// | |
8d129536 | 816 | UINT8 SmmData; |
817 | } SMM_ENTRY; | |
818 | ||
819 | /// | |
820 | /// SMM_TABLE | |
821 | /// | |
822 | typedef struct { | |
e3e7f36a | 823 | UINT16 NumSmmEntries; ///< Number of entries represented by SmmEntry. |
824 | SMM_ENTRY SmmEntry; ///< One entry per function. Type SMM_ENTRY is defined below. | |
8d129536 | 825 | } SMM_TABLE; |
826 | ||
827 | /// | |
828 | /// UDC_ATTRIBUTES | |
829 | /// | |
03df1608 | 830 | typedef struct { |
e3e7f36a | 831 | ///\r |
832 | /// This bit set indicates that the ServiceAreaData is valid.\r | |
833 | /// | |
03df1608 | 834 | UINT8 DirectoryServiceValidity : 1; |
e3e7f36a | 835 | \r |
836 | ///\r | |
837 | /// This bit set indicates to use the Reserve Area Boot Code Address (RACBA) only if\r | |
838 | /// DirectoryServiceValidity is 0.\r | |
839 | /// | |
03df1608 | 840 | UINT8 RabcaUsedFlag : 1; |
e3e7f36a | 841 | \r |
842 | ///\r | |
843 | /// This bit set indicates to execute hard disk diagnostics.\r | |
844 | /// | |
03df1608 | 845 | UINT8 ExecuteHddDiagnosticsFlag : 1; |
e3e7f36a | 846 | \r |
847 | ///\r | |
848 | /// Reserved for future use. Set to 0.\r | |
849 | /// | |
8d129536 | 850 | UINT8 Reserved : 5; |
851 | } UDC_ATTRIBUTES; | |
852 | ||
853 | /// | |
854 | /// UD_TABLE | |
855 | /// | |
03df1608 | 856 | typedef struct { |
e3e7f36a | 857 | ///\r |
858 | /// This field contains the bit-mapped attributes of the PARTIES information. Type\r | |
859 | /// UDC_ATTRIBUTES is defined below.\r | |
860 | /// | |
03df1608 | 861 | UDC_ATTRIBUTES Attributes; |
e3e7f36a | 862 | \r |
863 | ///\r | |
864 | /// This field contains the zero-based device on which the selected\r | |
865 | /// ServiceDataArea is present. It is 0 for master and 1 for the slave device. \r | |
866 | /// | |
03df1608 | 867 | UINT8 DeviceNumber; |
e3e7f36a | 868 | \r |
869 | ///\r | |
870 | /// This field contains the zero-based index into the BbsTable for the parent device.\r | |
871 | /// This index allows the user to reference the parent device information such as PCI\r | |
872 | /// bus, device function.\r | |
873 | /// | |
03df1608 | 874 | UINT8 BbsTableEntryNumberForParentDevice; |
e3e7f36a | 875 | \r |
876 | ///\r | |
877 | /// This field contains the zero-based index into the BbsTable for the boot entry.\r | |
878 | /// | |
03df1608 | 879 | UINT8 BbsTableEntryNumberForBoot; |
e3e7f36a | 880 | \r |
881 | ///\r | |
882 | /// This field contains the zero-based index into the BbsTable for the HDD diagnostics entry.\r | |
883 | /// | |
03df1608 | 884 | UINT8 BbsTableEntryNumberForHddDiag; |
e3e7f36a | 885 | \r |
886 | ///\r | |
887 | /// The raw Beer data.\r | |
888 | /// | |
03df1608 | 889 | UINT8 BeerData[128]; |
e3e7f36a | 890 | \r |
891 | ///\r | |
892 | /// The raw data of selected service area.\r | |
893 | /// | |
8d129536 | 894 | UINT8 ServiceAreaData[64]; |
895 | } UD_TABLE; | |
896 | ||
897 | #define EFI_TO_LEGACY_MAJOR_VERSION 0x02 | |
898 | #define EFI_TO_LEGACY_MINOR_VERSION 0x00 | |
899 | #define MAX_IDE_CONTROLLER 8 | |
900 | ||
901 | /// | |
902 | /// EFI_TO_COMPATIBILITY16_BOOT_TABLE | |
903 | /// | |
904 | typedef struct { | |
e3e7f36a | 905 | UINT16 MajorVersion; ///< The EfiCompatibility major version number. |
906 | UINT16 MinorVersion; ///< The EfiCompatibility minor version number. | |
907 | UINT32 AcpiTable; ///< Location of the RSDT ACPI table. < 4G range | |
908 | UINT32 SmbiosTable; ///< Location of the SMBIOS table in EFI memory. < 4G range | |
8d129536 | 909 | UINT32 SmbiosTableLength; |
910 | // | |
911 | // Legacy SIO state | |
912 | // | |
e3e7f36a | 913 | DEVICE_PRODUCER_DATA_HEADER SioData; ///< Standard traditional device information. |
914 | UINT16 DevicePathType; ///< The default boot type. | |
915 | UINT16 PciIrqMask; ///< Mask of which IRQs have been assigned to PCI. | |
916 | UINT32 NumberE820Entries; ///< Number of E820 entries. The number can change from the\r | |
917 | ///< Compatibility16InitializeYourself() function. | |
8d129536 | 918 | // |
919 | // Controller & Drive Identify[2] per controller information | |
920 | // | |
e3e7f36a | 921 | HDD_INFO HddInfo[MAX_IDE_CONTROLLER]; ///< Hard disk drive information, including raw Identify Drive data. |
922 | UINT32 NumberBbsEntries; ///< Number of entries in the BBS table | |
923 | UINT32 BbsTable; ///< Pointer to the BBS table. Type BBS_TABLE is defined below. | |
924 | UINT32 SmmTable; ///< Pointer to the SMM table. Type SMM_TABLE is defined below. | |
925 | UINT32 OsMemoryAbove1Mb; ///< The amount of usable memory above 1 MB, i.e. E820 type 1 memory. This value can\r | |
926 | ///< differ from the value in EFI_TO_COMPATIBILITY16_INIT_TABLE as more\r | |
927 | ///< memory may have been discovered. | |
928 | UINT32 UnconventionalDeviceTable; ///< Information to boot off an unconventional device like a PARTIES partition. Type\r | |
929 | ///< UD_TABLE is defined below. | |
8d129536 | 930 | } EFI_TO_COMPATIBILITY16_BOOT_TABLE; |
931 | ||
932 | /// | |
933 | /// EFI_LEGACY_INSTALL_PCI_HANDLER | |
934 | /// | |
935 | typedef struct { | |
e3e7f36a | 936 | UINT8 PciBus; ///< The PCI bus of the device. |
937 | UINT8 PciDeviceFun; ///< The PCI device in bits 7:3 and function in bits 2:0. | |
938 | UINT8 PciSegment; ///< The PCI segment of the device. | |
939 | UINT8 PciClass; ///< The PCI class code of the device. | |
940 | UINT8 PciSubclass; ///< The PCI subclass code of the device. | |
941 | UINT8 PciInterface; ///< The PCI interface code of the device. | |
8d129536 | 942 | // |
943 | // Primary section | |
944 | // | |
e3e7f36a | 945 | UINT8 PrimaryIrq; ///< The primary device IRQ. |
946 | UINT8 PrimaryReserved; ///< Reserved. | |
947 | UINT16 PrimaryControl; ///< The primary device control I/O base. | |
948 | UINT16 PrimaryBase; ///< The primary device I/O base. | |
949 | UINT16 PrimaryBusMaster; ///< The primary device bus master I/O base. | |
8d129536 | 950 | // |
951 | // Secondary Section | |
952 | // | |
e3e7f36a | 953 | UINT8 SecondaryIrq; ///< The secondary device IRQ. |
954 | UINT8 SecondaryReserved; ///< Reserved. | |
955 | UINT16 SecondaryControl; ///< The secondary device control I/O base. | |
956 | UINT16 SecondaryBase; ///< The secondary device I/O base. | |
957 | UINT16 SecondaryBusMaster; ///< The secondary device bus master I/O base. | |
8d129536 | 958 | } EFI_LEGACY_INSTALL_PCI_HANDLER; |
959 | ||
960 | // | |
961 | // Restore default pack value | |
962 | // | |
963 | #pragma pack() | |
964 | ||
965 | #endif /* _FRAMEWORK_LEGACY_16_H_ */ |