| e3e7f36a |
1 | /** @file\r |
| 2 | The header file provides interface definitions exposed by CSM (Compatible Support Module).\r |
| 3 | \r |
| 4 | The CSM provides compatibility support between the Framework and traditional, legacy BIOS code \r |
| 5 | and allows booting a traditional OS or booting an EFI OS off a device that requires a traditional \r |
| 6 | option ROM (OpROM). \r |
| 7 | \r |
| 8 | These definitions are from Compatibility Support Module Spec Version 0.97.\r |
| 9 | |
| 8d129536 |
10 | Copyright (c) 2007-2009, Intel Corporation |
| 11 | All rights reserved. This program and the accompanying materials |
| 12 | are licensed and made available under the terms and conditions of the BSD License |
| 13 | which accompanies this distribution. The full text of the license may be found at |
| 14 | http://opensource.org/licenses/bsd-license.php |
| 15 | |
| 16 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, |
| 17 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. |
| 18 | |
| 8d129536 |
19 | **/ |
| 20 | |
| 21 | #ifndef _FRAMEWORK_LEGACY_16_H_ |
| 22 | #define _FRAMEWORK_LEGACY_16_H_ |
| 23 | |
| 24 | #include <Base.h> |
| 25 | |
| 26 | #pragma pack(1) |
| 27 | |
| 28 | typedef UINT8 SERIAL_MODE; |
| 29 | typedef UINT8 PARALLEL_MODE; |
| 30 | |
| 31 | #define EFI_COMPATIBILITY16_TABLE_SIGNATURE SIGNATURE_32 ('I', 'F', 'E', '$') |
| 32 | |
| e3e7f36a |
33 | ///\r |
| 34 | /// There is a table located within the traditional BIOS in either the 0xF000:xxxx or 0xE000:xxxx\r |
| 35 | /// physical address range. It is located on a 16-byte boundary and provides the physical address of the\r |
| 36 | /// entry point for the Compatibility16 functions. These functions provide the platform-specific\r |
| 37 | /// information that is required by the generic EfiCompatibility code. The functions are invoked via\r |
| 38 | /// thunking by using EFI_LEGACY_BIOS_PROTOCOL.FarCall86() with the 32-bit physical\r |
| 39 | /// entry point.\r |
| 40 | /// |
| 41 | typedef struct {\r |
| 42 | ///\r |
| 43 | /// The string "$EFI" denotes the start of the EfiCompatibility table. Byte 0 is "I," byte\r |
| 44 | /// 1 is "F," byte 2 is "E," and byte 3 is "$" and is normally accessed as a DWORD or UINT32.\r |
| 45 | /// |
| 46 | UINT32 Signature;\r |
| 47 | \r |
| 48 | ///\r |
| 49 | /// The value required such that byte checksum of TableLength equals zero.\r |
| 50 | /// |
| 51 | UINT8 TableChecksum;\r |
| 52 | \r |
| 53 | ///\r |
| 54 | /// The length of this table.\r |
| 55 | /// |
| 56 | UINT8 TableLength;\r |
| 57 | \r |
| 58 | ///\r |
| 59 | /// The major EFI revision for which this table was generated.\r |
| 60 | /// |
| 61 | UINT8 EfiMajorRevision;\r |
| 62 | \r |
| 63 | ///\r |
| 64 | /// The minor EFI revision for which this table was generated.\r |
| 65 | /// |
| 66 | UINT8 EfiMinorRevision;\r |
| 67 | \r |
| 68 | ///\r |
| 69 | /// The major revision of this table.\r |
| 70 | /// |
| 71 | UINT8 TableMajorRevision;\r |
| 72 | \r |
| 73 | ///\r |
| 74 | /// The minor revision of this table.\r |
| 75 | /// |
| 76 | UINT8 TableMinorRevision;\r |
| 77 | \r |
| 78 | ///\r |
| 79 | /// Reserved for future usage.\r |
| 80 | /// |
| 81 | UINT16 Reserved;\r |
| 82 | \r |
| 83 | ///\r |
| 84 | /// The segment of the entry point within the traditional BIOS for Compatibility16 functions.\r |
| 85 | /// |
| 86 | UINT16 Compatibility16CallSegment;\r |
| 87 | \r |
| 88 | ///\r |
| 89 | /// The offset of the entry point within the traditional BIOS for Compatibility16 functions.\r |
| 90 | /// |
| 91 | UINT16 Compatibility16CallOffset;\r |
| 92 | \r |
| 93 | ///\r |
| 94 | /// The segment of the entry point within the traditional BIOS for EfiCompatibility to invoke the PnP installation check.\r |
| 95 | /// |
| 96 | UINT16 PnPInstallationCheckSegment;\r |
| 97 | \r |
| 98 | ///\r |
| 99 | /// The Offset of the entry point within the traditional BIOS for EfiCompatibility to invoke the PnP installation check.\r |
| 100 | /// |
| 101 | UINT16 PnPInstallationCheckOffset;\r |
| 102 | \r |
| 103 | ///\r |
| 104 | /// EFI system resources table. Type EFI_SYSTEM_TABLE is defined in the IntelPlatform Innovation Framework for EFI \r |
| 105 | /// Driver Execution Environment Core Interface Specification (DXE CIS).\r |
| 106 | /// |
| 107 | UINT32 EfiSystemTable; \r |
| 108 | \r |
| 109 | ///\r |
| 110 | /// The address of an OEM-provided identifier string. The string is null terminated.\r |
| 111 | /// |
| 112 | UINT32 OemIdStringPointer;\r |
| 113 | \r |
| 114 | ///\r |
| 115 | /// The 32-bit physical address where ACPI RSD PTR is stored within the traditional\r |
| 116 | /// BIOS. The remained of the ACPI tables are located at their EFI addresses. The size\r |
| 117 | /// reserved is the maximum for ACPI 2.0. The EfiCompatibility will fill in the ACPI\r |
| 118 | /// RSD PTR with either the ACPI 1.0b or 2.0 values.\r |
| 119 | /// |
| 120 | UINT32 AcpiRsdPtrPointer;\r |
| 121 | \r |
| 122 | ///\r |
| 123 | /// The OEM revision number. Usage is undefined but provided for OEM module usage.\r |
| 124 | /// |
| 125 | UINT16 OemRevision;\r |
| 126 | \r |
| 127 | ///\r |
| 128 | /// The 32-bit physical address where INT15 E820 data is stored within the traditional\r |
| 129 | /// BIOS. The EfiCompatibility code will fill in the E820Pointer value and copy the\r |
| 130 | /// data to the indicated area.\r |
| 131 | /// |
| 132 | UINT32 E820Pointer;\r |
| 133 | \r |
| 134 | ///\r |
| 135 | /// The length of the E820 data and is filled in by the EfiCompatibility code.\r |
| 136 | /// |
| 137 | UINT32 E820Length;\r |
| 138 | \r |
| 139 | ///\r |
| 140 | /// The 32-bit physical address where the $PIR table is stored in the traditional BIOS.\r |
| 141 | /// The EfiCompatibility code will fill in the IrqRoutingTablePointer value and\r |
| 142 | /// copy the data to the indicated area.\r |
| 143 | /// |
| 144 | UINT32 IrqRoutingTablePointer;\r |
| 145 | \r |
| 146 | ///\r |
| 147 | /// The length of the $PIR table and is filled in by the EfiCompatibility code.\r |
| 148 | /// |
| 149 | UINT32 IrqRoutingTableLength;\r |
| 150 | \r |
| 151 | ///\r |
| 152 | /// The 32-bit physical address where the MP table is stored in the traditional BIOS.\r |
| 153 | /// The EfiCompatibility code will fill in the MpTablePtr value and copy the data to the indicated area.\r |
| 154 | /// |
| 155 | UINT32 MpTablePtr;\r |
| 156 | \r |
| 157 | ///\r |
| 158 | /// The length of the MP table and is filled in by the EfiCompatibility code.\r |
| 159 | /// |
| 160 | UINT32 MpTableLength;\r |
| 161 | \r |
| 162 | ///\r |
| 8d303ef3 |
163 | /// The segment of the OEM-specific INT table/code.\r |
| e3e7f36a |
164 | /// |
| 8d303ef3 |
165 | UINT16 OemIntSegment;\r |
| e3e7f36a |
166 | \r |
| 167 | ///\r |
| 8d303ef3 |
168 | /// The offset of the OEM-specific INT table/code.\r |
| e3e7f36a |
169 | /// |
| 8d303ef3 |
170 | UINT16 OemIntOffset;\r |
| e3e7f36a |
171 | \r |
| 172 | ///\r |
| 173 | /// The segment of the OEM-specific 32-bit table/code.\r |
| 174 | /// |
| 175 | UINT16 Oem32Segment;\r |
| 176 | \r |
| 177 | ///\r |
| 178 | /// The offset of the OEM-specific 32-bit table/code.\r |
| 179 | /// |
| 8d303ef3 |
180 | UINT16 Oem32Offset;\r |
| 181 | \r |
| 182 | ///\r |
| 183 | /// The segment of the OEM-specific 16-bit table/code.\r |
| 184 | /// |
| 185 | UINT16 Oem16Segment;\r |
| 186 | \r |
| 187 | ///\r |
| 188 | /// The offset of the OEM-specific 16-bit table/code.\r |
| 189 | /// |
| 190 | UINT16 Oem16Offset;\r |
| 191 | \r |
| 192 | ///\r |
| 193 | /// The segment of the TPM binary passed to 16-bit CSM.\r |
| 194 | /// |
| 195 | UINT16 TpmSegment;\r |
| 196 | \r |
| 197 | ///\r |
| 198 | /// The offset of the TPM binary passed to 16-bit CSM.\r |
| 199 | /// |
| e3e7f36a |
200 | UINT16 TpmOffset;\r |
| 201 | \r |
| 202 | ///\r |
| 203 | /// A pointer to a string identifying the independent BIOS vendor.\r |
| 204 | /// |
| 8d303ef3 |
205 | UINT32 IbvPointer;\r |
| 206 | \r |
| 207 | ///\r |
| 208 | /// This field is NULL for all systems not supporting PCI Express. This field is the base\r |
| 209 | /// value of the start of the PCI Express memory-mapped configuration registers and\r |
| 210 | /// must be filled in prior to EfiCompatibility code issuing the Compatibility16 function\r |
| 211 | /// Compatibility16InitializeYourself().\r |
| 212 | /// Compatibility16InitializeYourself() is defined in Compatability16\r |
| 213 | /// Functions.\r |
| 214 | /// |
| 215 | UINT32 PciExpressBase;\r |
| 216 | \r |
| 217 | ///\r |
| 218 | /// Maximum PCI bus number assigned.\r |
| 219 | /// |
| 8d129536 |
220 | UINT8 LastPciBus; |
| 221 | } EFI_COMPATIBILITY16_TABLE; |
| 222 | |
| 223 | /// |
| e3e7f36a |
224 | /// Functions provided by the CSM binary which communicate between the EfiCompatibility \r |
| 225 | /// and Compatability16 code. |
| 226 | /// |
| 227 | typedef enum {\r |
| 228 | ///\r |
| 229 | /// Causes the Compatibility16 code to do any internal initialization required.\r |
| 230 | /// Input:\r |
| 231 | /// AX = Compatibility16InitializeYourself\r |
| 232 | /// ES:BX = Pointer to EFI_TO_COMPATIBILITY16_INIT_TABLE\r |
| 233 | /// Return:\r |
| 234 | /// AX = Return Status codes\r |
| 235 | /// |
| 236 | Compatibility16InitializeYourself = 0x0000,\r |
| 237 | \r |
| 238 | ///\r |
| 239 | /// Causes the Compatibility16 BIOS to perform any drive number translations to match the boot sequence.\r |
| 240 | /// Input:\r |
| 241 | /// AX = Compatibility16UpdateBbs\r |
| 242 | /// ES:BX = Pointer to EFI_TO_COMPATIBILITY16_BOOT_TABLE\r |
| 243 | /// Return:\r |
| 244 | /// AX = Returned status codes\r |
| 245 | /// |
| 246 | Compatibility16UpdateBbs = 0x0001,\r |
| 247 | \r |
| 248 | ///\r |
| 249 | /// Allows the Compatibility16 code to perform any final actions before booting. The Compatibility16\r |
| 250 | /// code is read/write.\r |
| 251 | /// Input:\r |
| 252 | /// AX = Compatibility16PrepareToBoot\r |
| 253 | /// ES:BX = Pointer to EFI_TO_COMPATIBILITY16_BOOT_TABLE structure \r |
| 254 | /// Return:\r |
| 255 | /// AX = Returned status codes\r |
| 256 | /// |
| 257 | Compatibility16PrepareToBoot = 0x0002,\r |
| 258 | \r |
| 259 | ///\r |
| 260 | /// Causes the Compatibility16 BIOS to boot. The Compatibility16 code is Read/Only.\r |
| 261 | /// Input:\r |
| 262 | /// AX = Compatibility16Boot\r |
| 263 | /// Output:\r |
| 264 | /// AX = Returned status codes\r |
| 265 | /// |
| 266 | Compatibility16Boot = 0x0003,\r |
| 267 | \r |
| 268 | ///\r |
| 269 | /// Allows the Compatibility16 code to get the last device from which a boot was attempted. This is\r |
| 270 | /// stored in CMOS and is the priority number of the last attempted boot device.\r |
| 271 | /// Input:\r |
| 272 | /// AX = Compatibility16RetrieveLastBootDevice\r |
| 273 | /// Output:\r |
| 274 | /// AX = Returned status codes\r |
| 275 | /// BX = Priority number of the boot device.\r |
| 276 | /// |
| 277 | Compatibility16RetrieveLastBootDevice= 0x0004,\r |
| 278 | \r |
| 279 | ///\r |
| 280 | /// Allows the Compatibility16 code rehook INT13, INT18, and/or INT19 after dispatching a legacy OpROM.\r |
| 281 | /// Input:\r |
| 282 | /// AX = Compatibility16DispatchOprom\r |
| 283 | /// ES:BX = Pointer to EFI_DISPATCH_OPROM_TABLE\r |
| 284 | /// Output:\r |
| 285 | /// AX = Returned status codes\r |
| 286 | /// BX = Number of non-BBS-compliant devices found. Equals 0 if BBS compliant.\r |
| 287 | /// |
| 288 | Compatibility16DispatchOprom = 0x0005,\r |
| 289 | \r |
| 290 | ///\r |
| 291 | /// Finds a free area in the 0xFxxxx or 0xExxxx region of the specified length and returns the address\r |
| 292 | /// of that region.\r |
| 293 | /// Input:\r |
| 294 | /// AX = Compatibility16GetTableAddress\r |
| 295 | /// BX = Allocation region\r |
| 296 | /// 00 = Allocate from either 0xE0000 or 0xF0000 64 KB blocks.\r |
| 297 | /// Bit 0 = 1 Allocate from 0xF0000 64 KB block\r |
| 298 | /// Bit 1 = 1 Allocate from 0xE0000 64 KB block\r |
| 299 | /// CX = Requested length in bytes.\r |
| 300 | /// DX = Required address alignment. Bit mapped. First non-zero bit from the right is the alignment.\r |
| 301 | /// Output:\r |
| 302 | /// AX = Returned status codes\r |
| 303 | /// DS:BX = Address of the region\r |
| 304 | /// |
| 305 | Compatibility16GetTableAddress = 0x0006,\r |
| 306 | \r |
| 307 | ///\r |
| 308 | /// Enables the EfiCompatibility module to do any nonstandard processing of keyboard LEDs or state.\r |
| 309 | /// Input:\r |
| 310 | /// AX = Compatibility16SetKeyboardLeds\r |
| 311 | /// CL = LED status.\r |
| e02a0e92 |
312 | /// Bit 0 Scroll Lock 0 = Off\r |
| 313 | /// Bit 1 NumLock\r |
| 314 | /// Bit 2 Caps Lock\r |
| e3e7f36a |
315 | /// Output:\r |
| 316 | /// AX = Returned status codes\r |
| 317 | /// |
| 318 | Compatibility16SetKeyboardLeds = 0x0007,\r |
| 319 | \r |
| 320 | ///\r |
| 321 | /// Enables the EfiCompatibility module to install an interrupt handler for PCI mass media devices that\r |
| 322 | /// do not have an OpROM associated with them. An example is SATA.\r |
| 323 | /// Input:\r |
| 324 | /// AX = Compatibility16InstallPciHandler\r |
| 325 | /// ES:BX = Pointer to EFI_LEGACY_INSTALL_PCI_HANDLER structure\r |
| 326 | /// Output:\r |
| 327 | /// AX = Returned status codes\r |
| 328 | /// |
| 2e747cee |
329 | Compatibility16InstallPciHandler = 0x0008 |
| 8d129536 |
330 | } EFI_COMPATIBILITY_FUNCTIONS; |
| 331 | |
| 332 | |
| 333 | /// |
| 334 | /// EFI_DISPATCH_OPROM_TABLE |
| 335 | /// |
| 336 | typedef struct { |
| e3e7f36a |
337 | UINT16 PnPInstallationCheckSegment; ///< Pointer to the PnpInstallationCheck data structure. |
| 338 | UINT16 PnPInstallationCheckOffset; ///< Pointer to the PnpInstallationCheck data structure. |
| 339 | UINT16 OpromSegment; ///< The segment where the OpROM was placed. Offset is assumed to be 3. |
| 340 | UINT8 PciBus; ///< The PCI bus. |
| 341 | UINT8 PciDeviceFunction; ///< The PCI device * 0x08 | PCI function. |
| 342 | UINT8 NumberBbsEntries; ///< The number of valid BBS table entries upon entry and exit. The IBV code may\r |
| 343 | ///< increase this number, if BBS-compliant devices also hook INTs in order to force the\r |
| 344 | ///< OpROM BIOS Setup to be executed. |
| 8d303ef3 |
345 | VOID *BbsTablePointer; ///< Pointer to the BBS table. |
| 346 | UINT16 OpromDestinationSegment; ///< The segment where the OpROM can be relocated to. If this value is 0x0000, this\r |
| 347 | ///< means that the relocation of this run time code is not supported. |
| 8d129536 |
348 | } EFI_DISPATCH_OPROM_TABLE; |
| 349 | |
| 350 | /// |
| 351 | /// EFI_TO_COMPATIBILITY16_INIT_TABLE |
| 352 | /// |
| e3e7f36a |
353 | typedef struct {\r |
| 354 | ///\r |
| 355 | /// Starting address of memory under 1 MB. The ending address is assumed to be 640 KB or 0x9FFFF.\r |
| 356 | /// |
| 357 | UINT32 BiosLessThan1MB;\r |
| 358 | \r |
| 359 | ///\r |
| 360 | /// Starting address of the high memory block.\r |
| 361 | /// |
| 362 | UINT32 HiPmmMemory;\r |
| 363 | \r |
| 364 | ///\r |
| 365 | /// Length of high memory block.\r |
| 366 | /// |
| 367 | UINT32 HiPmmMemorySizeInBytes;\r |
| 368 | \r |
| 369 | ///\r |
| 370 | /// The segment of the reverse thunk call code.\r |
| 371 | /// |
| 372 | UINT16 ReverseThunkCallSegment;\r |
| 373 | \r |
| 374 | ///\r |
| 375 | /// The offset of the reverse thunk call code.\r |
| 376 | /// |
| 377 | UINT16 ReverseThunkCallOffset;\r |
| 378 | \r |
| 379 | ///\r |
| 380 | /// The number of E820 entries copied to the Compatibility16 BIOS.\r |
| 381 | /// |
| 382 | UINT32 NumberE820Entries;\r |
| 383 | \r |
| 384 | ///\r |
| 385 | /// The amount of usable memory above 1 MB, e.g., E820 type 1 memory.\r |
| 386 | /// |
| 387 | UINT32 OsMemoryAbove1Mb;\r |
| 388 | \r |
| 389 | ///\r |
| 390 | /// The start of thunk code in main memory. Memory cannot be used by BIOS or PMM.\r |
| 391 | /// |
| 392 | UINT32 ThunkStart;\r |
| 393 | \r |
| 394 | ///\r |
| 395 | /// The size of the thunk code.\r |
| 396 | /// |
| 8d303ef3 |
397 | UINT32 ThunkSizeInBytes;\r |
| 398 | \r |
| 399 | ///\r |
| 400 | /// Starting address of memory under 1 MB.\r |
| 401 | /// |
| 402 | UINT32 LowPmmMemory;\r |
| 403 | \r |
| 404 | ///\r |
| 405 | /// Length of low Memory block.\r |
| 406 | /// |
| 8d129536 |
407 | UINT32 LowPmmMemorySizeInBytes; |
| 408 | } EFI_TO_COMPATIBILITY16_INIT_TABLE; |
| 409 | |
| 410 | /// |
| 411 | /// DEVICE_PRODUCER_SERIAL & its modes |
| 412 | /// |
| 413 | typedef struct { |
| e3e7f36a |
414 | UINT16 Address; ///< I/O address assigned to the serial port |
| 415 | UINT8 Irq; ///< IRQ assigned to the serial port. |
| 416 | SERIAL_MODE Mode; ///< Mode of serial port. Values are defined below. |
| 8d129536 |
417 | } DEVICE_PRODUCER_SERIAL; |
| 418 | |
| 419 | #define DEVICE_SERIAL_MODE_NORMAL 0x00 |
| 420 | #define DEVICE_SERIAL_MODE_IRDA 0x01 |
| 421 | #define DEVICE_SERIAL_MODE_ASK_IR 0x02 |
| 422 | #define DEVICE_SERIAL_MODE_DUPLEX_HALF 0x00 |
| 423 | #define DEVICE_SERIAL_MODE_DUPLEX_FULL 0x10 |
| 424 | |
| 425 | /// |
| 426 | /// DEVICE_PRODUCER_PARALLEL & its modes |
| 427 | /// |
| 428 | typedef struct { |
| e3e7f36a |
429 | UINT16 Address; ///< I/O address assigned to the parallel port |
| 430 | UINT8 Irq; ///< IRQ assigned to the parallel port. |
| 431 | UINT8 Dma; ///< DMA assigned to the parallel port. |
| 432 | PARALLEL_MODE Mode; ///< Mode of the parallel port. Values are defined below. |
| 8d129536 |
433 | } DEVICE_PRODUCER_PARALLEL; |
| 434 | |
| 435 | #define DEVICE_PARALLEL_MODE_MODE_OUTPUT_ONLY 0x00 |
| 436 | #define DEVICE_PARALLEL_MODE_MODE_BIDIRECTIONAL 0x01 |
| 437 | #define DEVICE_PARALLEL_MODE_MODE_EPP 0x02 |
| 438 | #define DEVICE_PARALLEL_MODE_MODE_ECP 0x03 |
| 439 | |
| 440 | /// |
| 441 | /// DEVICE_PRODUCER_FLOPPY |
| 442 | /// |
| 443 | typedef struct { |
| e3e7f36a |
444 | UINT16 Address; ///< I/O address assigned to the floppy |
| 445 | UINT8 Irq; ///< IRQ assigned to the floppy. |
| 446 | UINT8 Dma; ///< DMA assigned to the floppy. |
| 447 | UINT8 NumberOfFloppy; ///< Number of floppies in the system. |
| 8d129536 |
448 | } DEVICE_PRODUCER_FLOPPY; |
| 449 | |
| 450 | /// |
| 451 | /// LEGACY_DEVICE_FLAGS |
| 452 | /// |
| 453 | typedef struct { |
| e3e7f36a |
454 | UINT32 A20Kybd : 1; ///< A20 controller by keyboard controller. |
| 455 | UINT32 A20Port90 : 1; ///< A20 controlled by port 0x92. |
| 456 | UINT32 Reserved : 30; ///< Reserved for future usage. |
| 8d129536 |
457 | } LEGACY_DEVICE_FLAGS; |
| 458 | |
| 459 | /// |
| 460 | /// DEVICE_PRODUCER_DATA_HEADER |
| 461 | /// |
| 462 | typedef struct { |
| e3e7f36a |
463 | DEVICE_PRODUCER_SERIAL Serial[4]; ///< Data for serial port x. Type DEVICE_PRODUCER_SERIAL is defined below. |
| 464 | DEVICE_PRODUCER_PARALLEL Parallel[3]; ///< Data for parallel port x. Type DEVICE_PRODUCER_PARALLEL is defined below. |
| 465 | DEVICE_PRODUCER_FLOPPY Floppy; ///< Data for floppy. Type DEVICE_PRODUCER_FLOPPY is defined below. |
| 466 | UINT8 MousePresent; ///< Flag to indicate if mouse is present. |
| 467 | LEGACY_DEVICE_FLAGS Flags; ///< Miscellaneous Boolean state information passed to CSM. |
| 8d129536 |
468 | } DEVICE_PRODUCER_DATA_HEADER; |
| 469 | |
| 470 | /// |
| 471 | /// ATAPI_IDENTIFY |
| 472 | /// |
| 473 | typedef struct { |
| e3e7f36a |
474 | UINT16 Raw[256]; ///< Raw data from the IDE IdentifyDrive command. |
| 8d129536 |
475 | } ATAPI_IDENTIFY; |
| 476 | |
| 477 | /// |
| 478 | /// HDD_INFO & its status |
| 479 | /// |
| e3e7f36a |
480 | typedef struct {\r |
| 481 | ///\r |
| 482 | /// Status of IDE device. Values are defined below. There is one HDD_INFO structure\r |
| 483 | /// per IDE controller. The IdentifyDrive is per drive. Index 0 is master and index\r |
| 484 | /// 1 is slave.\r |
| 485 | /// |
| 486 | UINT16 Status; \r |
| 487 | \r |
| 488 | ///\r |
| 489 | /// PCI bus of IDE controller.\r |
| 490 | /// |
| 491 | UINT32 Bus;\r |
| 492 | \r |
| 493 | ///\r |
| 494 | /// PCI device of IDE controller.\r |
| 495 | /// |
| 496 | UINT32 Device;\r |
| 497 | \r |
| 498 | ///\r |
| 499 | /// PCI function of IDE controller.\r |
| 500 | /// |
| 501 | UINT32 Function;\r |
| 502 | \r |
| 503 | ///\r |
| 504 | /// Command ports base address.\r |
| 505 | /// |
| 506 | UINT16 CommandBaseAddress;\r |
| 507 | \r |
| 508 | ///\r |
| 509 | /// Control ports base address.\r |
| 510 | /// |
| 511 | UINT16 ControlBaseAddress;\r |
| 512 | \r |
| 513 | ///\r |
| 514 | /// Bus master address\r |
| 515 | /// |
| 516 | UINT16 BusMasterAddress;\r |
| 517 | |
| 518 | UINT8 HddIrq;\r |
| 519 | \r |
| 520 | ///\r |
| 521 | /// Data that identifies the drive data, one per possible attached drive\r |
| 522 | /// |
| 8d129536 |
523 | ATAPI_IDENTIFY IdentifyDrive[2]; |
| 524 | } HDD_INFO; |
| 525 | |
| 526 | #define HDD_PRIMARY 0x01 |
| 527 | #define HDD_SECONDARY 0x02 |
| 528 | #define HDD_MASTER_ATAPI_CDROM 0x04 |
| 529 | #define HDD_SLAVE_ATAPI_CDROM 0x08 |
| 530 | #define HDD_MASTER_IDE 0x20 |
| 531 | #define HDD_SLAVE_IDE 0x40 |
| 532 | #define HDD_MASTER_ATAPI_ZIPDISK 0x10 |
| 533 | #define HDD_SLAVE_ATAPI_ZIPDISK 0x80 |
| 534 | |
| 535 | /// |
| 536 | /// BBS_STATUS_FLAGS |
| 537 | /// |
| 538 | typedef struct { |
| e3e7f36a |
539 | UINT16 OldPosition : 4; ///< Prior priority. |
| 540 | UINT16 Reserved1 : 4; ///< Reserved for future use. |
| 541 | UINT16 Enabled : 1; ///< If 0, ignore this entry. |
| 542 | UINT16 Failed : 1; ///< 0 = Not known if boot failure occurred.\r |
| 543 | ///< 1 = Boot attempted failed.\r |
| 544 | \r |
| 545 | ///\r |
| 546 | /// State of media present.\r |
| 547 | /// 00 = No bootable media is present in the device.\r |
| 548 | /// 01 = Unknown if a bootable media present.\r |
| 549 | /// 10 = Media is present and appears bootable.\r |
| 550 | /// 11 = Reserved.\r |
| 551 | /// |
| 8d129536 |
552 | UINT16 MediaPresent : 2; |
| e3e7f36a |
553 | UINT16 Reserved2 : 4; ///< Reserved for future use. |
| 8d129536 |
554 | } BBS_STATUS_FLAGS; |
| 555 | |
| 556 | /// |
| 557 | /// BBS_TABLE, device type values & boot priority values |
| 558 | /// |
| e3e7f36a |
559 | typedef struct {\r |
| 560 | ///\r |
| 561 | /// The boot priority for this boot device. Values are defined below.\r |
| 562 | /// |
| 563 | UINT16 BootPriority;\r |
| 564 | \r |
| 565 | ///\r |
| 566 | /// The PCI bus for this boot device.\r |
| 567 | /// |
| 568 | UINT32 Bus;\r |
| 569 | \r |
| 570 | ///\r |
| 571 | /// The PCI device for this boot device.\r |
| 572 | /// |
| 573 | UINT32 Device;\r |
| 574 | \r |
| 575 | ///\r |
| 576 | /// The PCI function for the boot device.\r |
| 577 | /// |
| 578 | UINT32 Function;\r |
| 579 | \r |
| 580 | ///\r |
| 581 | /// The PCI class for this boot device.\r |
| 582 | /// |
| 583 | UINT8 Class;\r |
| 584 | \r |
| 585 | ///\r |
| 586 | /// The PCI Subclass for this boot device.\r |
| 587 | /// |
| 588 | UINT8 SubClass;\r |
| 589 | \r |
| 590 | ///\r |
| 591 | /// Segment:offset address of an ASCIIZ description string describing the manufacturer.\r |
| 592 | /// |
| 593 | UINT16 MfgStringOffset;\r |
| 594 | \r |
| 595 | ///\r |
| 596 | /// Segment:offset address of an ASCIIZ description string describing the manufacturer.\r |
| 597 | /// |
| 598 | UINT16 MfgStringSegment;\r |
| 599 | \r |
| 600 | ///\r |
| 601 | /// BBS device type. BBS device types are defined below.\r |
| 602 | /// |
| 603 | UINT16 DeviceType;\r |
| 604 | \r |
| 605 | ///\r |
| 606 | /// Status of this boot device. Type BBS_STATUS_FLAGS is defined below.\r |
| 607 | /// |
| 608 | BBS_STATUS_FLAGS StatusFlags;\r |
| 609 | \r |
| 610 | ///\r |
| 611 | /// Segment:Offset address of boot loader for IPL devices or install INT13 handler for\r |
| 612 | /// BCV devices.\r |
| 613 | /// |
| 614 | UINT16 BootHandlerOffset;\r |
| 615 | \r |
| 616 | ///\r |
| 617 | /// Segment:Offset address of boot loader for IPL devices or install INT13 handler for\r |
| 618 | /// BCV devices.\r |
| 619 | /// |
| 620 | UINT16 BootHandlerSegment;\r |
| 621 | \r |
| 622 | ///\r |
| 623 | /// Segment:offset address of an ASCIIZ description string describing this device.\r |
| 624 | /// |
| 8d129536 |
625 | UINT16 DescStringOffset; |
| e3e7f36a |
626 | \r |
| 627 | ///\r |
| 628 | /// Segment:offset address of an ASCIIZ description string describing this device.\r |
| 629 | ///\r |
| 630 | UINT16 DescStringSegment;\r |
| 631 | \r |
| 632 | ///\r |
| 633 | /// Reserved.\r |
| 634 | /// |
| 635 | UINT32 InitPerReserved;\r |
| 636 | \r |
| 637 | ///\r |
| 638 | /// The use of these fields is IBV dependent. They can be used to flag that an OpROM\r |
| 639 | /// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI\r |
| 640 | /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup\r |
| 641 | /// |
| 642 | UINT32 AdditionalIrq13Handler;\r |
| 643 | \r |
| 644 | ///\r |
| 645 | /// The use of these fields is IBV dependent. They can be used to flag that an OpROM\r |
| 646 | /// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI\r |
| 647 | /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup\r |
| 648 | /// |
| 649 | UINT32 AdditionalIrq18Handler;\r |
| 650 | \r |
| 651 | ///\r |
| 652 | /// The use of these fields is IBV dependent. They can be used to flag that an OpROM\r |
| 653 | /// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI\r |
| 654 | /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup\r |
| 655 | /// |
| 656 | UINT32 AdditionalIrq19Handler;\r |
| 657 | \r |
| 658 | ///\r |
| 659 | /// The use of these fields is IBV dependent. They can be used to flag that an OpROM\r |
| 660 | /// has hooked the specified IRQ. The OpROM may be BBS compliant as some SCSI\r |
| 661 | /// BBS-compliant OpROMs also hook IRQ vectors in order to run their BIOS Setup\r |
| 662 | /// |
| 8d129536 |
663 | UINT32 AdditionalIrq40Handler; |
| 664 | UINT8 AssignedDriveNumber; |
| 665 | UINT32 AdditionalIrq41Handler; |
| 666 | UINT32 AdditionalIrq46Handler; |
| 667 | UINT32 IBV1; |
| 668 | UINT32 IBV2; |
| 669 | } BBS_TABLE; |
| 670 | |
| 671 | #define BBS_FLOPPY 0x01 |
| 672 | #define BBS_HARDDISK 0x02 |
| 673 | #define BBS_CDROM 0x03 |
| 674 | #define BBS_PCMCIA 0x04 |
| 675 | #define BBS_USB 0x05 |
| 676 | #define BBS_EMBED_NETWORK 0x06 |
| 677 | #define BBS_BEV_DEVICE 0x80 |
| 678 | #define BBS_UNKNOWN 0xff |
| 679 | |
| 680 | #define BBS_DO_NOT_BOOT_FROM 0xFFFC |
| 681 | #define BBS_LOWEST_PRIORITY 0xFFFD |
| 682 | #define BBS_UNPRIORITIZED_ENTRY 0xFFFE |
| 683 | #define BBS_IGNORE_ENTRY 0xFFFF |
| 684 | |
| 685 | /// |
| 686 | /// SMM_ATTRIBUTES & relating type, port and data size constants |
| 687 | /// |
| e3e7f36a |
688 | typedef struct {\r |
| 689 | ///\r |
| 690 | /// Access mechanism used to generate the soft SMI. Defined types are below. The other\r |
| 691 | /// values are reserved for future usage.\r |
| 692 | /// |
| 693 | UINT16 Type : 3;\r |
| 694 | \r |
| 695 | ///\r |
| 696 | /// Size of "port" in bits. Defined values are below.\r |
| 697 | /// |
| 698 | UINT16 PortGranularity : 3;\r |
| 699 | \r |
| 700 | ///\r |
| 701 | /// Size of data in bits. Defined values are below.\r |
| 702 | /// |
| 703 | UINT16 DataGranularity : 3;\r |
| 704 | \r |
| 705 | ///\r |
| 706 | /// Reserved for future use.\r |
| 707 | /// |
| 8d129536 |
708 | UINT16 Reserved : 7; |
| 709 | } SMM_ATTRIBUTES; |
| 710 | |
| 711 | #define STANDARD_IO 0x00 |
| 712 | #define STANDARD_MEMORY 0x01 |
| 713 | |
| 714 | #define PORT_SIZE_8 0x00 |
| 715 | #define PORT_SIZE_16 0x01 |
| 716 | #define PORT_SIZE_32 0x02 |
| 717 | #define PORT_SIZE_64 0x03 |
| 718 | |
| 719 | #define DATA_SIZE_8 0x00 |
| 720 | #define DATA_SIZE_16 0x01 |
| 721 | #define DATA_SIZE_32 0x02 |
| 722 | #define DATA_SIZE_64 0x03 |
| 723 | |
| 724 | /// |
| 725 | /// SMM_FUNCTION & relating constants |
| 726 | /// |
| 727 | typedef struct { |
| 728 | UINT16 Function : 15; |
| 729 | UINT16 Owner : 1; |
| 730 | } SMM_FUNCTION; |
| 731 | |
| 732 | #define INT15_D042 0x0000 |
| 733 | #define GET_USB_BOOT_INFO 0x0001 |
| 734 | #define DMI_PNP_50_57 0x0002 |
| 735 | |
| 736 | #define STANDARD_OWNER 0x0 |
| 737 | #define OEM_OWNER 0x1 |
| 738 | |
| 739 | /** |
| 740 | * SMM_ENTRY |
| 741 | * |
| 742 | * This structure assumes both port and data sizes are 1. SmmAttribute must be |
| 743 | * properly to reflect that assumption. |
| 744 | **/ |
| e3e7f36a |
745 | typedef struct {\r |
| 746 | ///\r |
| 747 | /// Describes the access mechanism, SmmPort, and SmmData sizes. Type\r |
| 748 | /// SMM_ATTRIBUTES is defined below.\r |
| 749 | /// |
| 750 | SMM_ATTRIBUTES SmmAttributes;\r |
| 751 | \r |
| 752 | ///\r |
| 753 | /// Function Soft SMI is to perform. Type SMM_FUNCTION is defined below.\r |
| 754 | /// |
| 755 | SMM_FUNCTION SmmFunction;\r |
| 756 | \r |
| 757 | ///\r |
| 758 | /// SmmPort size depends upon SmmAttributes and ranges from2 bytes to 16 bytes\r |
| 759 | /// |
| 760 | UINT8 SmmPort;\r |
| 761 | \r |
| 762 | ///\r |
| 763 | /// SmmData size depends upon SmmAttributes and ranges from2 bytes to 16 bytes\r |
| 764 | /// |
| 8d129536 |
765 | UINT8 SmmData; |
| 766 | } SMM_ENTRY; |
| 767 | |
| 768 | /// |
| 769 | /// SMM_TABLE |
| 770 | /// |
| 771 | typedef struct { |
| e3e7f36a |
772 | UINT16 NumSmmEntries; ///< Number of entries represented by SmmEntry. |
| 773 | SMM_ENTRY SmmEntry; ///< One entry per function. Type SMM_ENTRY is defined below. |
| 8d129536 |
774 | } SMM_TABLE; |
| 775 | |
| 776 | /// |
| 777 | /// UDC_ATTRIBUTES |
| 778 | /// |
| e3e7f36a |
779 | typedef struct {\r |
| 780 | ///\r |
| 781 | /// This bit set indicates that the ServiceAreaData is valid.\r |
| 782 | /// |
| 783 | UINT8 DirectoryServiceValidity : 1;\r |
| 784 | \r |
| 785 | ///\r |
| 786 | /// This bit set indicates to use the Reserve Area Boot Code Address (RACBA) only if\r |
| 787 | /// DirectoryServiceValidity is 0.\r |
| 788 | /// |
| 789 | UINT8 RabcaUsedFlag : 1;\r |
| 790 | \r |
| 791 | ///\r |
| 792 | /// This bit set indicates to execute hard disk diagnostics.\r |
| 793 | /// |
| 794 | UINT8 ExecuteHddDiagnosticsFlag : 1;\r |
| 795 | \r |
| 796 | ///\r |
| 797 | /// Reserved for future use. Set to 0.\r |
| 798 | /// |
| 8d129536 |
799 | UINT8 Reserved : 5; |
| 800 | } UDC_ATTRIBUTES; |
| 801 | |
| 802 | /// |
| 803 | /// UD_TABLE |
| 804 | /// |
| e3e7f36a |
805 | typedef struct {\r |
| 806 | ///\r |
| 807 | /// This field contains the bit-mapped attributes of the PARTIES information. Type\r |
| 808 | /// UDC_ATTRIBUTES is defined below.\r |
| 809 | /// |
| 810 | UDC_ATTRIBUTES Attributes;\r |
| 811 | \r |
| 812 | ///\r |
| 813 | /// This field contains the zero-based device on which the selected\r |
| 814 | /// ServiceDataArea is present. It is 0 for master and 1 for the slave device. \r |
| 815 | /// |
| 816 | UINT8 DeviceNumber;\r |
| 817 | \r |
| 818 | ///\r |
| 819 | /// This field contains the zero-based index into the BbsTable for the parent device.\r |
| 820 | /// This index allows the user to reference the parent device information such as PCI\r |
| 821 | /// bus, device function.\r |
| 822 | /// |
| 823 | UINT8 BbsTableEntryNumberForParentDevice;\r |
| 824 | \r |
| 825 | ///\r |
| 826 | /// This field contains the zero-based index into the BbsTable for the boot entry.\r |
| 827 | /// |
| 828 | UINT8 BbsTableEntryNumberForBoot;\r |
| 829 | \r |
| 830 | ///\r |
| 831 | /// This field contains the zero-based index into the BbsTable for the HDD diagnostics entry.\r |
| 832 | /// |
| 833 | UINT8 BbsTableEntryNumberForHddDiag;\r |
| 834 | \r |
| 835 | ///\r |
| 836 | /// The raw Beer data.\r |
| 837 | /// |
| 838 | UINT8 BeerData[128];\r |
| 839 | \r |
| 840 | ///\r |
| 841 | /// The raw data of selected service area.\r |
| 842 | /// |
| 8d129536 |
843 | UINT8 ServiceAreaData[64]; |
| 844 | } UD_TABLE; |
| 845 | |
| 846 | #define EFI_TO_LEGACY_MAJOR_VERSION 0x02 |
| 847 | #define EFI_TO_LEGACY_MINOR_VERSION 0x00 |
| 848 | #define MAX_IDE_CONTROLLER 8 |
| 849 | |
| 850 | /// |
| 851 | /// EFI_TO_COMPATIBILITY16_BOOT_TABLE |
| 852 | /// |
| 853 | typedef struct { |
| e3e7f36a |
854 | UINT16 MajorVersion; ///< The EfiCompatibility major version number. |
| 855 | UINT16 MinorVersion; ///< The EfiCompatibility minor version number. |
| 856 | UINT32 AcpiTable; ///< Location of the RSDT ACPI table. < 4G range |
| 857 | UINT32 SmbiosTable; ///< Location of the SMBIOS table in EFI memory. < 4G range |
| 8d129536 |
858 | UINT32 SmbiosTableLength; |
| 859 | // |
| 860 | // Legacy SIO state |
| 861 | // |
| e3e7f36a |
862 | DEVICE_PRODUCER_DATA_HEADER SioData; ///< Standard traditional device information. |
| 863 | UINT16 DevicePathType; ///< The default boot type. |
| 864 | UINT16 PciIrqMask; ///< Mask of which IRQs have been assigned to PCI. |
| 865 | UINT32 NumberE820Entries; ///< Number of E820 entries. The number can change from the\r |
| 866 | ///< Compatibility16InitializeYourself() function. |
| 8d129536 |
867 | // |
| 868 | // Controller & Drive Identify[2] per controller information |
| 869 | // |
| e3e7f36a |
870 | HDD_INFO HddInfo[MAX_IDE_CONTROLLER]; ///< Hard disk drive information, including raw Identify Drive data. |
| 871 | UINT32 NumberBbsEntries; ///< Number of entries in the BBS table |
| 872 | UINT32 BbsTable; ///< Pointer to the BBS table. Type BBS_TABLE is defined below. |
| 873 | UINT32 SmmTable; ///< Pointer to the SMM table. Type SMM_TABLE is defined below. |
| 874 | UINT32 OsMemoryAbove1Mb; ///< The amount of usable memory above 1 MB, i.e. E820 type 1 memory. This value can\r |
| 875 | ///< differ from the value in EFI_TO_COMPATIBILITY16_INIT_TABLE as more\r |
| 876 | ///< memory may have been discovered. |
| 877 | UINT32 UnconventionalDeviceTable; ///< Information to boot off an unconventional device like a PARTIES partition. Type\r |
| 878 | ///< UD_TABLE is defined below. |
| 8d129536 |
879 | } EFI_TO_COMPATIBILITY16_BOOT_TABLE; |
| 880 | |
| 881 | /// |
| 882 | /// EFI_LEGACY_INSTALL_PCI_HANDLER |
| 883 | /// |
| 884 | typedef struct { |
| e3e7f36a |
885 | UINT8 PciBus; ///< The PCI bus of the device. |
| 886 | UINT8 PciDeviceFun; ///< The PCI device in bits 7:3 and function in bits 2:0. |
| 887 | UINT8 PciSegment; ///< The PCI segment of the device. |
| 888 | UINT8 PciClass; ///< The PCI class code of the device. |
| 889 | UINT8 PciSubclass; ///< The PCI subclass code of the device. |
| 890 | UINT8 PciInterface; ///< The PCI interface code of the device. |
| 8d129536 |
891 | // |
| 892 | // Primary section |
| 893 | // |
| e3e7f36a |
894 | UINT8 PrimaryIrq; ///< The primary device IRQ. |
| 895 | UINT8 PrimaryReserved; ///< Reserved. |
| 896 | UINT16 PrimaryControl; ///< The primary device control I/O base. |
| 897 | UINT16 PrimaryBase; ///< The primary device I/O base. |
| 898 | UINT16 PrimaryBusMaster; ///< The primary device bus master I/O base. |
| 8d129536 |
899 | // |
| 900 | // Secondary Section |
| 901 | // |
| e3e7f36a |
902 | UINT8 SecondaryIrq; ///< The secondary device IRQ. |
| 903 | UINT8 SecondaryReserved; ///< Reserved. |
| 904 | UINT16 SecondaryControl; ///< The secondary device control I/O base. |
| 905 | UINT16 SecondaryBase; ///< The secondary device I/O base. |
| 906 | UINT16 SecondaryBusMaster; ///< The secondary device bus master I/O base. |
| 8d129536 |
907 | } EFI_LEGACY_INSTALL_PCI_HANDLER; |
| 908 | |
| 909 | // |
| 910 | // Restore default pack value |
| 911 | // |
| 912 | #pragma pack() |
| 913 | |
| 914 | #endif /* _FRAMEWORK_LEGACY_16_H_ */ |
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