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79964ac8 1/** @file\r
9f6f9534 2 Include file for definitions in the Intel Platform Innovation Framework for EFI\r
3 System Management Mode Core Interface Specification (SMM CIS) version 0.90.\r
79964ac8 4\r
9f6f9534 5 Copyright (c) 2007 - 2009, Intel Corporation\r
79964ac8 6 All rights reserved. This program and the accompanying materials\r
7 are licensed and made available under the terms and conditions of the BSD License\r
8 which accompanies this distribution. The full text of the license may be found at\r
9 http://opensource.org/licenses/bsd-license.php\r
10\r
11 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
12 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
13\r
79964ac8 14**/\r
15\r
108854b2
LG
16#ifndef _SMM_CIS_H_\r
17#define _SMM_CIS_H_\r
79964ac8 18\r
79964ac8 19#define EFI_SMM_CPU_IO_GUID \\r
20 { \\r
21 0x5f439a0b, 0x45d8, 0x4682, {0xa4, 0xf4, 0xf0, 0x57, 0x6b, 0x51, 0x34, 0x41 } \\r
22 }\r
23\r
24typedef struct _EFI_SMM_SYSTEM_TABLE EFI_SMM_SYSTEM_TABLE;\r
25typedef struct _EFI_SMM_CPU_IO_INTERFACE EFI_SMM_CPU_IO_INTERFACE;\r
26\r
27\r
28//\r
29// SMM Base specification constant and types\r
30//\r
e89ec8f6 31#define SMM_SMST_SIGNATURE SIGNATURE_32 ('S', 'M', 'S', 'T')\r
79964ac8 32#define EFI_SMM_SYSTEM_TABLE_REVISION (0 << 16) | (0x09)\r
33\r
34//\r
35// *******************************************************\r
36// EFI_SMM_IO_WIDTH\r
37// *******************************************************\r
38//\r
39typedef enum {\r
40 SMM_IO_UINT8 = 0,\r
41 SMM_IO_UINT16 = 1,\r
42 SMM_IO_UINT32 = 2,\r
43 SMM_IO_UINT64 = 3\r
44} EFI_SMM_IO_WIDTH;\r
45\r
46/**\r
47 Provides the basic memory and I/O interfaces that are used to\r
48 abstract accesses to devices.\r
49\r
50 @param This The EFI_SMM_CPU_IO_INTERFACE instance.\r
51 @param Width Signifies the width of the I/O operations.\r
52 @param Address The base address of the I/O operations.\r
53 @param Count The number of I/O operations to perform.\r
5259c97d 54 @param Buffer For read operations, the destination buffer to store the results (out parameter).\r
55 For write operations, the source buffer from which to write data (in parameter).\r
79964ac8 56\r
57 @retval EFI_SUCCESS The data was read from or written to the device.\r
58 @retval EFI_UNSUPPORTED The Address is not valid for this system.\r
59 @retval EFI_INVALID_PARAMETER Width or Count, or both, were invalid.\r
60 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r
61\r
62**/\r
63typedef\r
64EFI_STATUS\r
69686d56 65(EFIAPI *EFI_SMM_CPU_IO)(\r
79964ac8 66 IN EFI_SMM_CPU_IO_INTERFACE *This,\r
67 IN EFI_SMM_IO_WIDTH Width,\r
68 IN UINT64 Address,\r
69 IN UINTN Count,\r
70 IN OUT VOID *Buffer\r
71 );\r
72\r
73typedef struct {\r
2bbaeb0d 74 EFI_SMM_CPU_IO Read; ///< This service provides the various modalities of memory and I/O read.\r
75 EFI_SMM_CPU_IO Write; ///< This service provides the various modalities of memory and I/O write.\r
79964ac8 76} EFI_SMM_IO_ACCESS;\r
77\r
470d0b27 78///\r
79/// The EFI_SMM_CPU_IO_INTERFACE service provides the basic memory, I/O, and PCI\r
80/// interfaces that are used to abstract accesses to devices.\r
81///\r
79964ac8 82struct _EFI_SMM_CPU_IO_INTERFACE {\r
470d0b27 83 ///\r
84 /// Allows reads and writes to memory-mapped I/O space. \r
85 ///\r
79964ac8 86 EFI_SMM_IO_ACCESS Mem;\r
470d0b27 87 ///\r
88 /// Allows reads and writes to I/O space. \r
89 ///\r
79964ac8 90 EFI_SMM_IO_ACCESS Io;\r
91};\r
92\r
93/**\r
94 Allocates pool memory from SMRAM for IA-32 or runtime memory for\r
95 the Itanium processor family.\r
96\r
5259c97d 97 @param PoolType The type of pool to allocate. The only supported type is EfiRuntimeServicesData\r
79964ac8 98 @param Size The number of bytes to allocate from the pool.\r
99 @param Buffer A pointer to a pointer to the allocated buffer if the call\r
100 succeeds; undefined otherwise.\r
101\r
102 @retval EFI_SUCCESS The requested number of bytes was allocated.\r
103 @retval EFI_OUT_OF_RESOURCES The pool requested could not be allocated.\r
104 @retval EFI_UNSUPPORTED In runtime.\r
6d1824fc 105 @note: Inconsistent with specification here:\r
18d7ae2e 106 In Framework Spec, This definition is naming EFI_SMM_ALLOCATE_POOL. However, \r
107 To avoid the naming conflict, the definition is renamed.\r
79964ac8 108**/\r
109typedef\r
110EFI_STATUS\r
69686d56 111(EFIAPI *EFI_SMMCORE_ALLOCATE_POOL)(\r
79964ac8 112 IN EFI_MEMORY_TYPE PoolType,\r
113 IN UINTN Size,\r
114 OUT VOID **Buffer\r
115 );\r
116\r
117/**\r
118 Returns pool memory to the system.\r
119\r
120 @param Buffer Pointer to the buffer to free.\r
121\r
122 @retval EFI_SUCCESS The memory was returned to the system.\r
123 @retval EFI_INVALID_PARAMETER Buffer was invalid.\r
124 @retval EFI_UNSUPPORTED In runtime.\r
6d1824fc 125 @note: Inconsistent with specification here:\r
5259c97d 126 In the Framework Spec, this definition is named EFI_SMM_FREE_POOL. \r
127 To avoid a naming conflict, the definition here is renamed. \r
79964ac8 128**/\r
129typedef\r
130EFI_STATUS\r
69686d56 131(EFIAPI *EFI_SMMCORE_FREE_POOL)(\r
79964ac8 132 IN VOID *Buffer\r
133 );\r
134\r
135/**\r
136 Allocates memory pages from the system.\r
137\r
138 @param Type The type of allocation to perform.\r
139 @param MemoryType The only supported type is EfiRuntimeServicesData\r
140 @param NumberofPages The number of contiguous 4 KB pages to allocate\r
141 @param Memory Pointer to a physical address. On input, the way in which\r
142 the address is used depends on the value of Type. On output, the address\r
143 is set to the base of the page range that was allocated.\r
144\r
145 @retval EFI_SUCCESS The requested pages were allocated.\r
146 @retval EFI_OUT_OF_RESOURCES The pages requested could not be allocated.\r
147 @retval EFI_NOT_FOUND The requested pages could not be found.\r
148 @retval EFI_INVALID_PARAMETER Type is not AllocateAnyPages or AllocateMaxAddress\r
149 or AllocateAddress. Or MemoryType is in the range EfiMaxMemoryType..0x7FFFFFFF.\r
6d1824fc 150 @note: Inconsistent with specification here:\r
5259c97d 151 In the Framework Spec, this definition is named EFI_SMM_ALLOCATE_PAGES. \r
152 To avoid a naming conflict, the definition here is renamed.\r
79964ac8 153**/\r
154typedef\r
155EFI_STATUS\r
69686d56 156(EFIAPI *EFI_SMMCORE_ALLOCATE_PAGES)(\r
79964ac8 157 IN EFI_ALLOCATE_TYPE Type,\r
158 IN EFI_MEMORY_TYPE MemoryType,\r
159 IN UINTN NumberOfPages,\r
160 OUT EFI_PHYSICAL_ADDRESS *Memory\r
161 );\r
162\r
163/**\r
164 Frees memory pages for the system.\r
165\r
166 @param Memory The base physical address of the pages to be freed\r
167 @param NumberOfPages The number of contiguous 4 KB pages to free.\r
168\r
169 @retval EFI_SUCCESS The requested memory pages were freed.\r
170 @retval EFI_INVALID_PARAMETER Memory is not a page-aligned address or NumberOfPages is invalid.\r
171 @retval EFI_NOT_FOUND The requested memory pages were not allocated with SmmAllocatePages().\r
18d7ae2e 172 \r
6d1824fc 173 @note: Inconsistent with specification here:\r
5259c97d 174 In the Framework Spec, this definition is named EFI_SMM_FREE_PAGES. \r
175 To avoid a naming conflict, the definition here is renamed.\r
79964ac8 176**/\r
177typedef\r
178EFI_STATUS\r
69686d56 179(EFIAPI *EFI_SMMCORE_FREE_PAGES)(\r
79964ac8 180 IN EFI_PHYSICAL_ADDRESS Memory,\r
181 IN UINTN NumberOfPages\r
182 );\r
b6d47a83 183\r
18d7ae2e 184/**\r
185 Frees memory pages for the system.\r
79964ac8 186\r
18d7ae2e 187 @param Procedure A pointer to the code stream to be run on the designated AP of the system.\r
188 @param CpuNumber The zero-based index of the processor number of the AP on which the code stream is\r
189 supposed to run. If the processor number points to the current processor or a disabled\r
190 processor, then it will not run the supplied code.\r
191 @param ProcArguments Allows the caller to pass a list of parameters to the code that is run by\r
192 the AP. It is an optional common mailbox between APs and the BSP to share information.\r
193\r
194 @retval EFI_SUCCESS The call was successful and the return parameters are valid.\r
195 @retval EFI_INVALID_PARAMETER The input arguments are out of range.\r
196 @retval EFI_INVALID_PARAMETER The CPU requested is not available on this SMI invocation.\r
197 @retval EFI_INVALID_PARAMETER The CPU cannot support an additional service invocation.\r
198 \r
6d1824fc 199 @note: Inconsistent with specification here:\r
5259c97d 200 In Framework Spec, this definition does not exist. This method is introduced in PI1.0 spec for \r
201 implementation needs.\r
18d7ae2e 202 \r
203**/\r
79964ac8 204typedef\r
205EFI_STATUS\r
69686d56 206(EFIAPI *EFI_SMM_STARTUP_THIS_AP)(\r
b6d47a83 207 IN FRAMEWORK_EFI_AP_PROCEDURE Procedure,\r
79964ac8 208 IN UINTN CpuNumber,\r
209 IN OUT VOID *ProcArguments OPTIONAL\r
210 );\r
211\r
470d0b27 212///\r
213/// The processor save-state information for IA-32 processors. This information is important in that the\r
214/// SMM drivers may need to ascertain the state of the processor before invoking the SMI.\r
215///\r
79964ac8 216typedef struct {\r
470d0b27 217 ///\r
218 /// Reserved for future processors. As such, software should not attempt to interpret or\r
219 /// write to this region.\r
220 ///\r
79964ac8 221 UINT8 Reserved1[248];\r
470d0b27 222 ///\r
223 /// The location of the processor SMBASE, which is the location where the processor\r
224 /// will pass control upon receipt of an SMI.\r
225 ///\r
79964ac8 226 UINT32 SMBASE;\r
470d0b27 227 ///\r
228 /// The revision of the SMM save state. This value is set by the processor.\r
229 ///\r
79964ac8 230 UINT32 SMMRevId;\r
470d0b27 231 ///\r
232 /// The value of the I/O restart field. Allows for restarting an in-process I/O instruction.\r
233 ///\r
79964ac8 234 UINT16 IORestart;\r
470d0b27 235 ///\r
236 /// Describes behavior that should be commenced in response to a halt instruction.\r
237 ///\r
79964ac8 238 UINT16 AutoHALTRestart;\r
470d0b27 239 ///\r
240 /// Reserved for future processors. As such, software should not attempt to interpret or\r
241 /// write to this region.\r
242 ///\r
79964ac8 243 UINT8 Reserved2[164];\r
470d0b27 244\r
245 //\r
246 // Registers in IA-32 processors. \r
247 //\r
79964ac8 248 UINT32 ES;\r
249 UINT32 CS;\r
250 UINT32 SS;\r
251 UINT32 DS;\r
252 UINT32 FS;\r
253 UINT32 GS;\r
254 UINT32 LDTBase;\r
255 UINT32 TR;\r
256 UINT32 DR7;\r
257 UINT32 DR6;\r
258 UINT32 EAX;\r
259 UINT32 ECX;\r
260 UINT32 EDX;\r
261 UINT32 EBX;\r
262 UINT32 ESP;\r
263 UINT32 EBP;\r
264 UINT32 ESI;\r
265 UINT32 EDI;\r
266 UINT32 EIP;\r
267 UINT32 EFLAGS;\r
268 UINT32 CR3;\r
269 UINT32 CR0;\r
270} EFI_SMI_CPU_SAVE_STATE;\r
271\r
470d0b27 272///\r
273/// The processor save-state information for the Itanium processor family. This information is\r
274/// important in that the SMM drivers may need to ascertain the state of the processor before invoking\r
275/// the PMI. This structure is mandatory and must be 512 byte aligned.\r
276/// \r
79964ac8 277typedef struct {\r
278 UINT64 reserved;\r
279 UINT64 r1;\r
280 UINT64 r2;\r
281 UINT64 r3;\r
282 UINT64 r4;\r
283 UINT64 r5;\r
284 UINT64 r6;\r
285 UINT64 r7;\r
286 UINT64 r8;\r
287 UINT64 r9;\r
288 UINT64 r10;\r
289 UINT64 r11;\r
290 UINT64 r12;\r
291 UINT64 r13;\r
292 UINT64 r14;\r
293 UINT64 r15;\r
294 UINT64 r16;\r
295 UINT64 r17;\r
296 UINT64 r18;\r
297 UINT64 r19;\r
298 UINT64 r20;\r
299 UINT64 r21;\r
300 UINT64 r22;\r
301 UINT64 r23;\r
302 UINT64 r24;\r
303 UINT64 r25;\r
304 UINT64 r26;\r
305 UINT64 r27;\r
306 UINT64 r28;\r
307 UINT64 r29;\r
308 UINT64 r30;\r
309 UINT64 r31;\r
310\r
311 UINT64 pr;\r
312\r
313 UINT64 b0;\r
314 UINT64 b1;\r
315 UINT64 b2;\r
316 UINT64 b3;\r
317 UINT64 b4;\r
318 UINT64 b5;\r
319 UINT64 b6;\r
320 UINT64 b7;\r
321\r
322 // application registers\r
323 UINT64 ar_rsc;\r
324 UINT64 ar_bsp;\r
325 UINT64 ar_bspstore;\r
326 UINT64 ar_rnat;\r
327\r
328 UINT64 ar_fcr;\r
329\r
330 UINT64 ar_eflag;\r
331 UINT64 ar_csd;\r
332 UINT64 ar_ssd;\r
333 UINT64 ar_cflg;\r
334 UINT64 ar_fsr;\r
335 UINT64 ar_fir;\r
336 UINT64 ar_fdr;\r
337\r
338 UINT64 ar_ccv;\r
339\r
340 UINT64 ar_unat;\r
341\r
342 UINT64 ar_fpsr;\r
343\r
344 UINT64 ar_pfs;\r
345 UINT64 ar_lc;\r
346 UINT64 ar_ec;\r
347\r
348 // control registers\r
349 UINT64 cr_dcr;\r
350 UINT64 cr_itm;\r
351 UINT64 cr_iva;\r
352 UINT64 cr_pta;\r
353 UINT64 cr_ipsr;\r
354 UINT64 cr_isr;\r
355 UINT64 cr_iip;\r
356 UINT64 cr_ifa;\r
357 UINT64 cr_itir;\r
358 UINT64 cr_iipa;\r
359 UINT64 cr_ifs;\r
360 UINT64 cr_iim;\r
361 UINT64 cr_iha;\r
362\r
363 // debug registers\r
364 UINT64 dbr0;\r
365 UINT64 dbr1;\r
366 UINT64 dbr2;\r
367 UINT64 dbr3;\r
368 UINT64 dbr4;\r
369 UINT64 dbr5;\r
370 UINT64 dbr6;\r
371 UINT64 dbr7;\r
372\r
373 UINT64 ibr0;\r
374 UINT64 ibr1;\r
375 UINT64 ibr2;\r
376 UINT64 ibr3;\r
377 UINT64 ibr4;\r
378 UINT64 ibr5;\r
379 UINT64 ibr6;\r
380 UINT64 ibr7;\r
381\r
382 // virtual registers\r
383 UINT64 int_nat; // nat bits for R1-R31\r
384\r
385} EFI_PMI_SYSTEM_CONTEXT;\r
386\r
470d0b27 387///\r
388/// The processor save-state information for IA-32 and Itanium processors. This information is\r
389/// important in that the SMM drivers may need to ascertain the state of the processor before invoking\r
390/// the SMI or PMI.\r
391///\r
79964ac8 392typedef union {\r
470d0b27 393 ///\r
394 /// The processor save-state information for IA-32 processors. \r
395 ///\r
79964ac8 396 EFI_SMI_CPU_SAVE_STATE Ia32SaveState;\r
470d0b27 397 ///\r
398 /// The processor save-state information for Itanium processors.\r
399 ///\r
79964ac8 400 EFI_PMI_SYSTEM_CONTEXT ItaniumSaveState;\r
401} EFI_SMM_CPU_SAVE_STATE;\r
402\r
470d0b27 403///\r
404/// The optional floating point save-state information for IA-32 processors. If the optional floating\r
405/// point save is indicated for any handler, the following data structure must be preserved.\r
406///\r
79964ac8 407typedef struct {\r
408 UINT16 Fcw;\r
409 UINT16 Fsw;\r
410 UINT16 Ftw;\r
411 UINT16 Opcode;\r
412 UINT32 Eip;\r
413 UINT16 Cs;\r
414 UINT16 Rsvd1;\r
415 UINT32 DataOffset;\r
416 UINT16 Ds;\r
417 UINT8 Rsvd2[10];\r
418 UINT8 St0Mm0[10], Rsvd3[6];\r
419 UINT8 St0Mm1[10], Rsvd4[6];\r
420 UINT8 St0Mm2[10], Rsvd5[6];\r
421 UINT8 St0Mm3[10], Rsvd6[6];\r
422 UINT8 St0Mm4[10], Rsvd7[6];\r
423 UINT8 St0Mm5[10], Rsvd8[6];\r
424 UINT8 St0Mm6[10], Rsvd9[6];\r
425 UINT8 St0Mm7[10], Rsvd10[6];\r
426 UINT8 Rsvd11[22*16];\r
427} EFI_SMI_OPTIONAL_FPSAVE_STATE;\r
428\r
470d0b27 429///\r
430/// The optional floating point save-state information for the Itanium processor family. If the optional\r
431/// floating point save is indicated for any handler, then this data structure must be preserved. \r
432/// \r
79964ac8 433typedef struct {\r
434 UINT64 f2[2];\r
435 UINT64 f3[2];\r
436 UINT64 f4[2];\r
437 UINT64 f5[2];\r
438 UINT64 f6[2];\r
439 UINT64 f7[2];\r
440 UINT64 f8[2];\r
441 UINT64 f9[2];\r
442 UINT64 f10[2];\r
443 UINT64 f11[2];\r
444 UINT64 f12[2];\r
445 UINT64 f13[2];\r
446 UINT64 f14[2];\r
447 UINT64 f15[2];\r
448 UINT64 f16[2];\r
449 UINT64 f17[2];\r
450 UINT64 f18[2];\r
451 UINT64 f19[2];\r
452 UINT64 f20[2];\r
453 UINT64 f21[2];\r
454 UINT64 f22[2];\r
455 UINT64 f23[2];\r
456 UINT64 f24[2];\r
457 UINT64 f25[2];\r
458 UINT64 f26[2];\r
459 UINT64 f27[2];\r
460 UINT64 f28[2];\r
461 UINT64 f29[2];\r
462 UINT64 f30[2];\r
463 UINT64 f31[2];\r
464} EFI_PMI_OPTIONAL_FLOATING_POINT_CONTEXT;\r
465\r
470d0b27 466///\r
467/// The processor save-state information for IA-32 and Itanium processors. If the optional floating\r
468/// point save is indicated for any handler, then this data structure must be preserved.\r
469///\r
79964ac8 470typedef union {\r
470d0b27 471 /// \r
472 /// The optional floating point save-state information for IA-32 processors. \r
473 ///\r
79964ac8 474 EFI_SMI_OPTIONAL_FPSAVE_STATE Ia32FpSave;\r
470d0b27 475 ///\r
476 /// The optional floating point save-state information for Itanium processors. \r
477 ///\r
79964ac8 478 EFI_PMI_OPTIONAL_FLOATING_POINT_CONTEXT ItaniumFpSave;\r
479} EFI_SMM_FLOATING_POINT_SAVE_STATE;\r
480\r
481/**\r
482 This function is the main entry point for an SMM handler dispatch\r
483 or communicate-based callback.\r
484\r
485 @param SmmImageHandle A unique value returned by the SMM infrastructure\r
486 in response to registration for a communicate-based callback or dispatch.\r
487 @param CommunicationBuffer\r
488 An optional buffer that will be populated\r
489 by the SMM infrastructure in response to a non-SMM agent (preboot or runtime)\r
490 invoking the EFI_SMM_BASE_PROTOCOL.Communicate() service.\r
491 @param SourceSize If CommunicationBuffer is non-NULL, this field\r
492 indicates the size of the data payload in this buffer.\r
493\r
494 @return Status Code\r
495\r
496**/\r
497typedef\r
498EFI_STATUS\r
69686d56 499(EFIAPI *EFI_SMM_HANDLER_ENTRY_POINT)(\r
79964ac8 500 IN EFI_HANDLE SmmImageHandle,\r
501 IN OUT VOID *CommunicationBuffer OPTIONAL,\r
502 IN OUT UINTN *SourceSize OPTIONAL\r
503 );\r
504\r
505/**\r
506 The SmmInstallConfigurationTable() function is used to maintain the list\r
507 of configuration tables that are stored in the System Management System\r
508 Table. The list is stored as an array of (GUID, Pointer) pairs. The list\r
509 must be allocated from pool memory with PoolType set to EfiRuntimeServicesData.\r
510\r
511 @param SystemTable A pointer to the SMM System Table.\r
512 @param Guid A pointer to the GUID for the entry to add, update, or remove.\r
513 @param Table A pointer to the buffer of the table to add.\r
514 @param TableSize The size of the table to install.\r
515\r
516 @retval EFI_SUCCESS The (Guid, Table) pair was added, updated, or removed.\r
517 @retval EFI_INVALID_PARAMETER Guid is not valid.\r
518 @retval EFI_NOT_FOUND An attempt was made to delete a non-existent entry.\r
519 @retval EFI_OUT_OF_RESOURCES There is not enough memory available to complete the operation.\r
520\r
521**/\r
522typedef\r
523EFI_STATUS\r
69686d56 524(EFIAPI *EFI_SMM_INSTALL_CONFIGURATION_TABLE)(\r
79964ac8 525 IN EFI_SMM_SYSTEM_TABLE *SystemTable,\r
526 IN EFI_GUID *Guid,\r
527 IN VOID *Table,\r
528 IN UINTN TableSize\r
529 );\r
530\r
531//\r
532// System Management System Table (SMST)\r
533//\r
534struct _EFI_SMM_SYSTEM_TABLE {\r
470d0b27 535 ///\r
536 /// The table header for the System Management System Table (SMST). \r
537 ///\r
79964ac8 538 EFI_TABLE_HEADER Hdr;\r
539\r
470d0b27 540 ///\r
541 /// A pointer to a NULL-terminated Unicode string containing the vendor name. It is\r
542 /// permissible for this pointer to be NULL.\r
543 ///\r
79964ac8 544 CHAR16 *SmmFirmwareVendor;\r
470d0b27 545 ///\r
546 /// The particular revision of the firmware.\r
547 ///\r
79964ac8 548 UINT32 SmmFirmwareRevision;\r
549\r
470d0b27 550 ///\r
551 /// Adds, updates, or removes a configuration table entry from the SMST. \r
552 ///\r
79964ac8 553 EFI_SMM_INSTALL_CONFIGURATION_TABLE SmmInstallConfigurationTable;\r
554\r
555 //\r
556 // I/O Services\r
557 //\r
470d0b27 558 ///\r
559 /// A GUID that designates the particular CPU I/O services. \r
560 ///\r
79964ac8 561 EFI_GUID EfiSmmCpuIoGuid;\r
470d0b27 562 ///\r
563 /// Provides the basic memory and I/O interfaces that are used to abstract accesses to\r
564 /// devices.\r
565 ///\r
79964ac8 566 EFI_SMM_CPU_IO_INTERFACE SmmIo;\r
567\r
568 //\r
569 // Runtime memory service\r
570 //\r
470d0b27 571 ///\r
18d7ae2e 572 ///\r
470d0b27 573 /// Allocates pool memory from SMRAM for IA-32 or runtime memory for the\r
574 /// Itanium processor family.\r
575 ///\r
79964ac8 576 EFI_SMMCORE_ALLOCATE_POOL SmmAllocatePool;\r
470d0b27 577 ///\r
578 /// Returns pool memory to the system. \r
579 ///\r
79964ac8 580 EFI_SMMCORE_FREE_POOL SmmFreePool;\r
470d0b27 581 ///\r
582 /// Allocates memory pages from the system. \r
583 ///\r
79964ac8 584 EFI_SMMCORE_ALLOCATE_PAGES SmmAllocatePages;\r
470d0b27 585 ///\r
586 /// Frees memory pages for the system.\r
587 ///\r
79964ac8 588 EFI_SMMCORE_FREE_PAGES SmmFreePages;\r
589\r
590 //\r
591 // MP service\r
592 //\r
18d7ae2e 593 \r
594 ///Inconsistent with specification here:\r
69c8f27c 595 /// In Framework Spec, this definition does not exist. This method is introduced in PI1.1 spec for \r
18d7ae2e 596 /// implementation needed.\r
79964ac8 597 EFI_SMM_STARTUP_THIS_AP SmmStartupThisAp;\r
598\r
599 //\r
600 // CPU information records\r
601 //\r
470d0b27 602 ///\r
603 /// A 1-relative number between 1 and the NumberOfCpus field. This field designates\r
604 /// which processor is executing the SMM infrastructure. This number also serves as an\r
605 /// index into the CpuSaveState and CpuOptionalFloatingPointState\r
606 /// fields.\r
607 ///\r
79964ac8 608 UINTN CurrentlyExecutingCpu;\r
470d0b27 609 ///\r
610 /// The number of EFI Configuration Tables in the buffer\r
611 /// SmmConfigurationTable.\r
612 ///\r
79964ac8 613 UINTN NumberOfCpus;\r
470d0b27 614 ///\r
615 /// A pointer to the EFI Configuration Tables. The number of entries in the table is\r
616 /// NumberOfTableEntries.\r
617 ///\r
79964ac8 618 EFI_SMM_CPU_SAVE_STATE *CpuSaveState;\r
470d0b27 619 ///\r
620 /// A pointer to a catenation of the EFI_SMM_FLOATING_POINT_SAVE_STATE.\r
621 /// The size of this entire table is NumberOfCpus* size of the\r
622 /// EFI_SMM_FLOATING_POINT_SAVE_STATE. These fields are populated only if\r
623 /// there is at least one SMM driver that has registered for a callback with the\r
624 /// FloatingPointSave field in EFI_SMM_BASE_PROTOCOL.RegisterCallback() set to TRUE.\r
625 ///\r
79964ac8 626 EFI_SMM_FLOATING_POINT_SAVE_STATE *CpuOptionalFloatingPointState;\r
627\r
628 //\r
629 // Extensibility table\r
630 //\r
470d0b27 631 ///\r
632 /// The number of EFI Configuration Tables in the buffer\r
633 /// SmmConfigurationTable.\r
634 ///\r
79964ac8 635 UINTN NumberOfTableEntries;\r
470d0b27 636 ///\r
637 /// A pointer to the EFI Configuration Tables. The number of entries in the table is\r
638 /// NumberOfTableEntries.\r
639 ///\r
79964ac8 640 EFI_CONFIGURATION_TABLE *SmmConfigurationTable;\r
641};\r
642\r
643#endif\r