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79964ac8 1/** @file\r
f22f941e 2 DataHubRecord.h includes all data hub subclass GUID definitions.\r
905574d8 3\r
1c2f052d 4 This file includes all data hub sub class defitions from\r
f22f941e 5 Cache subclass specification 0.9, DataHub SubClass specification 0.9, Memory SubClass Spec 0.9,\r
6 Processor Subclass specification 0.9, and Misc SubClass specification 0.9.\r
1c2f052d
LG		 7\r
8Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>\r
22a69a5e 9SPDX-License-Identifier: BSD-2-Clause-Patent\r
79964ac8 10\r
79964ac8 11**/\r
12#ifndef _DATAHUB_RECORDS_GUID_H_\r
13#define _DATAHUB_RECORDS_GUID_H_\r
14\r
7f586454 15//\r
16// The include is required to retrieve type EFI_EXP_BASE10_DATA\r
17//\r
18#include <Guid/StatusCodeDataTypeId.h>\r
19\r
79964ac8 20#define EFI_PROCESSOR_SUBCLASS_GUID \\r
21 { 0x26fdeb7e, 0xb8af, 0x4ccf, {0xaa, 0x97, 0x02, 0x63, 0x3c, 0xe4, 0x8c, 0xa7 } }\r
22\r
23extern EFI_GUID gEfiProcessorSubClassGuid;\r
24\r
25\r
26#define EFI_CACHE_SUBCLASS_GUID \\r
27 { 0x7f0013a7, 0xdc79, 0x4b22, {0x80, 0x99, 0x11, 0xf7, 0x5f, 0xdc, 0x82, 0x9d } }\r
28\r
29extern EFI_GUID gEfiCacheSubClassGuid;\r
30\r
2bbaeb0d 31///\r
1c2f052d 32/// The memory subclass belongs to the data class and is identified as the memory\r
2bbaeb0d 33/// subclass by the GUID.\r
34///\r
79964ac8 35#define EFI_MEMORY_SUBCLASS_GUID \\r
36 {0x4E8F4EBB, 0x64B9, 0x4e05, {0x9B, 0x18, 0x4C, 0xFE, 0x49, 0x23, 0x50, 0x97} }\r
37\r
38extern EFI_GUID gEfiMemorySubClassGuid;\r
39\r
79964ac8 40#define EFI_MISC_SUBCLASS_GUID \\r
41 { 0x772484B2, 0x7482, 0x4b91, {0x9F, 0x9A, 0xAD, 0x43, 0xF8, 0x1C, 0x58, 0x81 } }\r
42\r
43extern EFI_GUID gEfiMiscSubClassGuid;\r
44\r
87d63447 45\r
46///\r
1c2f052d 47/// Inconsistent with specification here:\r
f22f941e 48/// In ProcSubclass specification 0.9, the value is 0x0100.\r
87d63447 49/// Keep it unchanged from the perspective of binary consistency.\r
50///\r
51#define EFI_PROCESSOR_SUBCLASS_VERSION 0x00010000\r
52\r
53#pragma pack(1)\r
54\r
55typedef struct _USB_PORT_DEVICE_PATH {\r
56 ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;\r
57 PCI_DEVICE_PATH PciBusDevicePath;\r
58 EFI_DEVICE_PATH_PROTOCOL EndDevicePath;\r
59} USB_PORT_DEVICE_PATH;\r
60\r
61//\r
62// IDE\r
63//\r
64typedef struct _IDE_DEVICE_PATH {\r
65 ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;\r
66 PCI_DEVICE_PATH PciBusDevicePath;\r
67 EFI_DEVICE_PATH_PROTOCOL EndDevicePath;\r
68} IDE_DEVICE_PATH;\r
69\r
70//\r
71// RMC Connector\r
72//\r
73typedef struct _RMC_CONN_DEVICE_PATH {\r
74 ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;\r
75 PCI_DEVICE_PATH PciBridgeDevicePath;\r
76 PCI_DEVICE_PATH PciBusDevicePath;\r
77 EFI_DEVICE_PATH_PROTOCOL EndDevicePath;\r
78} RMC_CONN_DEVICE_PATH;\r
79\r
80//\r
81// RIDE\r
82//\r
83typedef struct _RIDE_DEVICE_PATH {\r
84 ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;\r
85 PCI_DEVICE_PATH PciBridgeDevicePath;\r
86 PCI_DEVICE_PATH PciBusDevicePath;\r
87 EFI_DEVICE_PATH_PROTOCOL EndDevicePath;\r
88} RIDE_DEVICE_PATH;\r
89\r
90//\r
91// Gigabit NIC\r
92//\r
93typedef struct _GB_NIC_DEVICE_PATH {\r
94 ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;\r
95 PCI_DEVICE_PATH PciBridgeDevicePath;\r
96 PCI_DEVICE_PATH PciXBridgeDevicePath;\r
97 PCI_DEVICE_PATH PciXBusDevicePath;\r
98 EFI_DEVICE_PATH_PROTOCOL EndDevicePath;\r
99} GB_NIC_DEVICE_PATH;\r
100\r
101//\r
102// P/S2 Connector\r
103//\r
104typedef struct _PS2_CONN_DEVICE_PATH {\r
105 ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;\r
106 PCI_DEVICE_PATH LpcBridgeDevicePath;\r
107 ACPI_HID_DEVICE_PATH LpcBusDevicePath;\r
108 EFI_DEVICE_PATH_PROTOCOL EndDevicePath;\r
109} PS2_CONN_DEVICE_PATH;\r
110\r
111//\r
112// Serial Port Connector\r
113//\r
114typedef struct _SERIAL_CONN_DEVICE_PATH {\r
115 ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;\r
116 PCI_DEVICE_PATH LpcBridgeDevicePath;\r
117 ACPI_HID_DEVICE_PATH LpcBusDevicePath;\r
118 EFI_DEVICE_PATH_PROTOCOL EndDevicePath;\r
119} SERIAL_CONN_DEVICE_PATH;\r
120\r
121//\r
122// Parallel Port Connector\r
123//\r
124typedef struct _PARALLEL_CONN_DEVICE_PATH {\r
125 ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;\r
126 PCI_DEVICE_PATH LpcBridgeDevicePath;\r
127 ACPI_HID_DEVICE_PATH LpcBusDevicePath;\r
128 EFI_DEVICE_PATH_PROTOCOL EndDevicePath;\r
129} PARALLEL_CONN_DEVICE_PATH;\r
130\r
131//\r
132// Floopy Connector\r
133//\r
134typedef struct _FLOOPY_CONN_DEVICE_PATH {\r
135 ACPI_HID_DEVICE_PATH PciRootBridgeDevicePath;\r
136 PCI_DEVICE_PATH LpcBridgeDevicePath;\r
137 ACPI_HID_DEVICE_PATH LpcBusDevicePath;\r
138 EFI_DEVICE_PATH_PROTOCOL EndDevicePath;\r
139} FLOOPY_CONN_DEVICE_PATH;\r
140\r
141///\r
1c2f052d 142/// Inconsistent with specification here:\r
f22f941e 143/// In MiscSubclass specification 0.9, this data structure and corrsponding fields are NOT defined.\r
87d63447 144/// It's implementation-specific to simplify the code logic.\r
145///\r
146typedef union _EFI_MISC_PORT_DEVICE_PATH {\r
147 USB_PORT_DEVICE_PATH UsbDevicePath;\r
148 IDE_DEVICE_PATH IdeDevicePath;\r
149 RMC_CONN_DEVICE_PATH RmcConnDevicePath;\r
150 RIDE_DEVICE_PATH RideDevicePath;\r
151 GB_NIC_DEVICE_PATH GbNicDevicePath;\r
152 PS2_CONN_DEVICE_PATH Ps2ConnDevicePath;\r
153 SERIAL_CONN_DEVICE_PATH SerialConnDevicePath;\r
154 PARALLEL_CONN_DEVICE_PATH ParallelConnDevicePath;\r
155 FLOOPY_CONN_DEVICE_PATH FloppyConnDevicePath;\r
156} EFI_MISC_PORT_DEVICE_PATH;\r
157\r
158#pragma pack()\r
159\r
160///\r
161/// String Token Definition\r
162///\r
1c2f052d 163/// Inconsistent with specification here:\r
f22f941e 164/// The macro isn't defined by any specification.\r
87d63447 165/// Keep it unchanged for backward compatibility.\r
166///\r
167#define EFI_STRING_TOKEN UINT16\r
168\r
169///\r
1c2f052d 170/// Each data record that is a member of some subclass starts with a standard\r
87d63447 171/// header of type EFI_SUBCLASS_TYPE1_HEADER.\r
1c2f052d
LG		 172/// This header is only a guideline and applicable only to a data\r
173/// subclass that is producing SMBIOS data records. A subclass can start with a\r
174/// different header if needed.\r
87d63447 175///\r
176typedef struct {\r
177 ///\r
1c2f052d 178 /// The version of the specification to which a specific subclass data record adheres.\r
87d63447 179 ///\r
180 UINT32 Version;\r
181 ///\r
1c2f052d 182 /// The size in bytes of this data class header.\r
87d63447 183 ///\r
184 UINT32 HeaderSize;\r
185 ///\r
1c2f052d
LG		 186 /// The instance number of the subclass with the same ProducerName. This number is\r
187 /// applicable in cases where multiple subclass instances that were produced by the same\r
188 /// driver exist in the system. This entry is 1 based; 0 means Reserved and -1 means Not\r
189 /// Applicable. All data consumer drivers should be able to handle all the possible values\r
190 /// of Instance, including Not Applicable and Reserved.\r
87d63447 191 ///\r
192 UINT16 Instance;\r
193 ///\r
1c2f052d
LG		 194 /// The instance number of the RecordType for the same Instance. This number is\r
195 /// applicable in cases where multiple instances of the RecordType exist for a specific\r
196 /// Instance. This entry is 1 based; 0 means Reserved and -1 means Not Applicable.\r
197 /// All data consumer drivers should be able to handle all the possible values of\r
198 /// SubInstance, including Not Applicable and Reserved.\r
87d63447 199 ///\r
200 UINT16 SubInstance;\r
201 ///\r
1c2f052d
LG		 202 /// The record number for the data record being specified. The numbering scheme and\r
203 /// definition is defined in the specific subclass specification.\r
87d63447 204 ///\r
205 UINT32 RecordType;\r
206} EFI_SUBCLASS_TYPE1_HEADER;\r
207\r
208///\r
1c2f052d
LG		 209/// This structure is used to link data records in the same subclasses. A data record is\r
210/// defined as a link to another data record in the same subclass using this structure.\r
87d63447 211///\r
212typedef struct {\r
213 ///\r
1c2f052d
LG		 214 /// An EFI_GUID that identifies the component that produced this data record. Type\r
215 /// EFI_GUID is defined in InstallProtocolInterface() in the EFI 1.10 Specification.\r
87d63447 216 ///\r
217 EFI_GUID ProducerName;\r
218 ///\r
1c2f052d
LG		 219 /// The instance number of the subclass with the same ProducerName. This number is\r
220 /// applicable in cases where multiple subclass instances that were produced by the same\r
221 /// driver exist in the system. This entry is 1 based; 0 means Reserved and -1 means Not\r
222 /// Applicable. All data consumer drivers should be able to handle all the possible values\r
223 /// of Instance, including Not Applicable and Reserved.\r
87d63447 224 ///\r
225 UINT16 Instance;\r
1c2f052d
LG		 226 /// The instance number of the RecordType for the same Instance. This number is\r
227 /// applicable in cases where multiple instances of the RecordType exist for a specific\r
228 /// Instance. This entry is 1 based; 0 means Reserved and -1 means Not Applicable.\r
229 /// All data consumer drivers should be able to handle all the possible values of\r
230 /// SubInstance, including Not Applicable and Reserved.\r
87d63447 231 UINT16 SubInstance;\r
232} EFI_INTER_LINK_DATA;\r
233\r
234//\r
235// EXP data\r
236//\r
237///\r
1c2f052d 238/// This macro provides a calculation for base-10 representations. Value and Exponent are each\r
87d63447 239/// INT16. It is signed to cover negative values and is 16 bits wide (15 bits for data and 1 bit\r
1c2f052d 240/// for the sign).\r
87d63447 241///\r
242typedef struct {\r
243 ///\r
1c2f052d 244 /// The INT16 number by which to multiply the base-10 representation.\r
87d63447 245 ///\r
246 UINT16 Value;\r
247 ///\r
1c2f052d 248 /// The INT16 number by which to raise the base-10 calculation.\r
87d63447 249 ///\r
250 UINT16 Exponent;\r
251} EFI_EXP_BASE2_DATA;\r
252\r
87d63447 253typedef EFI_EXP_BASE10_DATA EFI_PROCESSOR_MAX_CORE_FREQUENCY_DATA;\r
254typedef EFI_EXP_BASE10_DATA EFI_PROCESSOR_MAX_FSB_FREQUENCY_DATA;\r
255typedef EFI_EXP_BASE10_DATA EFI_PROCESSOR_CORE_FREQUENCY_DATA;\r
256\r
257///\r
1c2f052d
LG		 258/// This data record refers to the list of frequencies that the processor core supports. The list of\r
259/// supported frequencies is determined by the firmware based on hardware capabilities--for example,\r
260/// it could be a common subset of all processors and the chipset. The unit of measurement of this data\r
261/// record is in Hertz. For asynchronous processors, the content of this data record is zero.\r
262/// The list is terminated by -1 in the Value field of the last element. A Value field of zero means\r
263/// that the processor/driver supports automatic frequency selection.\r
87d63447 264///\r
1c2f052d 265/// Inconsistent with specification here:\r
f22f941e 266/// According to MiscSubclass 0.9 specification, it should be a pointer since it refers to a list of frequencies.\r
87d63447 267///\r
268typedef EFI_EXP_BASE10_DATA *EFI_PROCESSOR_CORE_FREQUENCY_LIST_DATA;\r
269\r
270///\r
1c2f052d
LG		 271/// This data record refers to the list of supported frequencies of the processor external bus. The list of\r
272/// supported frequencies is determined by the firmware based on hardware capabilities--for example,\r
273/// it could be a common subset of all processors and the chipset. The unit of measurement of this data\r
274/// record is in Hertz. For asynchronous processors, the content of this data record is NULL.\r
275/// The list is terminated by -1 in the Value field of the last element. A Value field of zero means\r
276/// that the processor/driver supports automatic frequency selection.\r
87d63447 277///\r
278typedef EFI_EXP_BASE10_DATA *EFI_PROCESSOR_FSB_FREQUENCY_LIST_DATA;\r
279typedef EFI_EXP_BASE10_DATA EFI_PROCESSOR_FSB_FREQUENCY_DATA;\r
280typedef STRING_REF EFI_PROCESSOR_VERSION_DATA;\r
281typedef STRING_REF EFI_PROCESSOR_MANUFACTURER_DATA;\r
282typedef STRING_REF EFI_PROCESSOR_SERIAL_NUMBER_DATA;\r
283typedef STRING_REF EFI_PROCESSOR_ASSET_TAG_DATA;\r
54acdc7b 284typedef STRING_REF EFI_PROCESSOR_PART_NUMBER_DATA;\r
87d63447 285\r
286typedef struct {\r
287 UINT32 ProcessorSteppingId:4;\r
288 UINT32 ProcessorModel: 4;\r
289 UINT32 ProcessorFamily: 4;\r
290 UINT32 ProcessorType: 2;\r
291 UINT32 ProcessorReserved1: 2;\r
292 UINT32 ProcessorXModel: 4;\r
293 UINT32 ProcessorXFamily: 8;\r
294 UINT32 ProcessorReserved2: 4;\r
295} EFI_PROCESSOR_SIGNATURE;\r
296\r
297\r
298///\r
1c2f052d 299/// Inconsistent with specification here:\r
f22f941e 300/// The name of third field in ProcSubClass specification 0.9 is LogicalProcessorCount.\r
87d63447 301/// Keep it unchanged for backward compatibility.\r
302///\r
303typedef struct {\r
304 UINT32 ProcessorBrandIndex :8;\r
305 UINT32 ProcessorClflush :8;\r
306 UINT32 ProcessorReserved :8;\r
307 UINT32 ProcessorDfltApicId :8;\r
308} EFI_PROCESSOR_MISC_INFO;\r
309\r
310typedef struct {\r
311 UINT32 ProcessorFpu: 1;\r
312 UINT32 ProcessorVme: 1;\r
313 UINT32 ProcessorDe: 1;\r
314 UINT32 ProcessorPse: 1;\r
315 UINT32 ProcessorTsc: 1;\r
316 UINT32 ProcessorMsr: 1;\r
317 UINT32 ProcessorPae: 1;\r
318 UINT32 ProcessorMce: 1;\r
319 UINT32 ProcessorCx8: 1;\r
320 UINT32 ProcessorApic: 1;\r
321 UINT32 ProcessorReserved1: 1;\r
322 UINT32 ProcessorSep: 1;\r
323 UINT32 ProcessorMtrr: 1;\r
324 UINT32 ProcessorPge: 1;\r
325 UINT32 ProcessorMca: 1;\r
326 UINT32 ProcessorCmov: 1;\r
327 UINT32 ProcessorPat: 1;\r
328 UINT32 ProcessorPse36: 1;\r
329 UINT32 ProcessorPsn: 1;\r
330 UINT32 ProcessorClfsh: 1;\r
331 UINT32 ProcessorReserved2: 1;\r
332 UINT32 ProcessorDs: 1;\r
333 UINT32 ProcessorAcpi: 1;\r
334 UINT32 ProcessorMmx: 1;\r
335 UINT32 ProcessorFxsr: 1;\r
336 UINT32 ProcessorSse: 1;\r
337 UINT32 ProcessorSse2: 1;\r
338 UINT32 ProcessorSs: 1;\r
339 UINT32 ProcessorReserved3: 1;\r
340 UINT32 ProcessorTm: 1;\r
341 UINT32 ProcessorReserved4: 2;\r
342} EFI_PROCESSOR_FEATURE_FLAGS;\r
343\r
344///\r
1c2f052d
LG		 345/// This data record refers to the unique ID that identifies a set of processors. This data record is 16\r
346/// bytes in length. The data in this structure is processor specific and reserved values can be defined\r
347/// for future use. The consumer of this data should not make any assumption and should use this data\r
348/// with respect to the processor family defined in the Family record number.\r
87d63447 349///\r
350typedef struct {\r
351 ///\r
352 /// Identifies the processor.\r
353 ///\r
354 EFI_PROCESSOR_SIGNATURE Signature;\r
355 ///\r
1c2f052d 356 /// Provides additional processor information.\r
87d63447 357 ///\r
358 EFI_PROCESSOR_MISC_INFO MiscInfo;\r
359 ///\r
1c2f052d 360 /// Reserved for future use.\r
87d63447 361 ///\r
362 UINT32 Reserved;\r
363 ///\r
1c2f052d 364 /// Provides additional processor information.\r
87d63447 365 ///\r
366 EFI_PROCESSOR_FEATURE_FLAGS FeatureFlags;\r
367} EFI_PROCESSOR_ID_DATA;\r
368\r
369///\r
1c2f052d
LG		 370/// This data record refers to the general classification of the processor. This data record is 4 bytes in\r
371/// length.\r
87d63447 372///\r
373typedef enum {\r
374 EfiProcessorOther = 1,\r
375 EfiProcessorUnknown = 2,\r
376 EfiCentralProcessor = 3,\r
377 EfiMathProcessor = 4,\r
378 EfiDspProcessor = 5,\r
379 EfiVideoProcessor = 6\r
380} EFI_PROCESSOR_TYPE_DATA;\r
381\r
382///\r
1c2f052d
LG		 383/// This data record refers to the family of the processor as defined by the DMTF.\r
384/// This data record is 4 bytes in length.\r
87d63447 385///\r
386typedef enum {\r
1c2f052d 387 EfiProcessorFamilyOther = 0x01,\r
87d63447 388 EfiProcessorFamilyUnknown = 0x02,\r
1c2f052d 389 EfiProcessorFamily8086 = 0x03,\r
87d63447 390 EfiProcessorFamily80286 = 0x04,\r
1c2f052d 391 EfiProcessorFamilyIntel386 = 0x05,\r
87d63447 392 EfiProcessorFamilyIntel486 = 0x06,\r
393 EfiProcessorFamily8087 = 0x07,\r
394 EfiProcessorFamily80287 = 0x08,\r
1c2f052d 395 EfiProcessorFamily80387 = 0x09,\r
87d63447 396 EfiProcessorFamily80487 = 0x0A,\r
1c2f052d 397 EfiProcessorFamilyPentium = 0x0B,\r
87d63447 398 EfiProcessorFamilyPentiumPro = 0x0C,\r
399 EfiProcessorFamilyPentiumII = 0x0D,\r
400 EfiProcessorFamilyPentiumMMX = 0x0E,\r
401 EfiProcessorFamilyCeleron = 0x0F,\r
402 EfiProcessorFamilyPentiumIIXeon = 0x10,\r
1c2f052d 403 EfiProcessorFamilyPentiumIII = 0x11,\r
87d63447 404 EfiProcessorFamilyM1 = 0x12,\r
405 EfiProcessorFamilyM2 = 0x13,\r
406 EfiProcessorFamilyM1Reserved2 = 0x14,\r
407 EfiProcessorFamilyM1Reserved3 = 0x15,\r
408 EfiProcessorFamilyM1Reserved4 = 0x16,\r
409 EfiProcessorFamilyM1Reserved5 = 0x17,\r
410 EfiProcessorFamilyAmdDuron = 0x18,\r
1c2f052d 411 EfiProcessorFamilyK5 = 0x19,\r
87d63447 412 EfiProcessorFamilyK6 = 0x1A,\r
413 EfiProcessorFamilyK6_2 = 0x1B,\r
414 EfiProcessorFamilyK6_3 = 0x1C,\r
415 EfiProcessorFamilyAmdAthlon = 0x1D,\r
416 EfiProcessorFamilyAmd29000 = 0x1E,\r
417 EfiProcessorFamilyK6_2Plus = 0x1F,\r
418 EfiProcessorFamilyPowerPC = 0x20,\r
419 EfiProcessorFamilyPowerPC601 = 0x21,\r
420 EfiProcessorFamilyPowerPC603 = 0x22,\r
421 EfiProcessorFamilyPowerPC603Plus = 0x23,\r
422 EfiProcessorFamilyPowerPC604 = 0x24,\r
423 EfiProcessorFamilyPowerPC620 = 0x25,\r
424 EfiProcessorFamilyPowerPCx704 = 0x26,\r
425 EfiProcessorFamilyPowerPC750 = 0x27,\r
426 EfiProcessorFamilyAlpha3 = 0x30,\r
427 EfiProcessorFamilyAlpha21064 = 0x31,\r
428 EfiProcessorFamilyAlpha21066 = 0x32,\r
429 EfiProcessorFamilyAlpha21164 = 0x33,\r
430 EfiProcessorFamilyAlpha21164PC = 0x34,\r
431 EfiProcessorFamilyAlpha21164a = 0x35,\r
432 EfiProcessorFamilyAlpha21264 = 0x36,\r
433 EfiProcessorFamilyAlpha21364 = 0x37,\r
434 EfiProcessorFamilyMips = 0x40,\r
435 EfiProcessorFamilyMIPSR4000 = 0x41,\r
436 EfiProcessorFamilyMIPSR4200 = 0x42,\r
437 EfiProcessorFamilyMIPSR4400 = 0x43,\r
438 EfiProcessorFamilyMIPSR4600 = 0x44,\r
439 EfiProcessorFamilyMIPSR10000 = 0x45,\r
440 EfiProcessorFamilySparc = 0x50,\r
441 EfiProcessorFamilySuperSparc = 0x51,\r
442 EfiProcessorFamilymicroSparcII = 0x52,\r
443 EfiProcessorFamilymicroSparcIIep = 0x53,\r
444 EfiProcessorFamilyUltraSparc = 0x54,\r
445 EfiProcessorFamilyUltraSparcII = 0x55,\r
446 EfiProcessorFamilyUltraSparcIIi = 0x56,\r
447 EfiProcessorFamilyUltraSparcIII = 0x57,\r
448 ///\r
1c2f052d 449 /// Inconsistent with specification here:\r
f22f941e 450 /// This field in ProcSubClass specification 0.9 is defined as EfiProcessorFamilyUltraSparcIIi.\r
87d63447 451 /// Change it to EfiProcessorFamilyUltraSparcIIIi to avoid build break.\r
452 ///\r
453 EfiProcessorFamilyUltraSparcIIIi = 0x58,\r
454 EfiProcessorFamily68040 = 0x60,\r
455 EfiProcessorFamily68xxx = 0x61,\r
456 EfiProcessorFamily68000 = 0x62,\r
457 EfiProcessorFamily68010 = 0x63,\r
458 EfiProcessorFamily68020 = 0x64,\r
459 EfiProcessorFamily68030 = 0x65,\r
460 EfiProcessorFamilyHobbit = 0x70,\r
461 EfiProcessorFamilyCrusoeTM5000 = 0x78,\r
462 EfiProcessorFamilyCrusoeTM3000 = 0x79,\r
463 EfiProcessorFamilyEfficeonTM8000 = 0x7A,\r
464 EfiProcessorFamilyWeitek = 0x80,\r
465 EfiProcessorFamilyItanium = 0x82,\r
466 EfiProcessorFamilyAmdAthlon64 = 0x83,\r
467 EfiProcessorFamilyAmdOpteron = 0x84,\r
468 EfiProcessorFamilyAmdSempron = 0x85,\r
469 EfiProcessorFamilyAmdTurion64Mobile = 0x86,\r
470 EfiProcessorFamilyDualCoreAmdOpteron = 0x87,\r
471 EfiProcessorFamilyAmdAthlon64X2DualCore = 0x88,\r
472 EfiProcessorFamilyAmdTurion64X2Mobile = 0x89,\r
473 EfiProcessorFamilyPARISC = 0x90,\r
474 EfiProcessorFamilyPaRisc8500 = 0x91,\r
475 EfiProcessorFamilyPaRisc8000 = 0x92,\r
476 EfiProcessorFamilyPaRisc7300LC = 0x93,\r
477 EfiProcessorFamilyPaRisc7200 = 0x94,\r
478 EfiProcessorFamilyPaRisc7100LC = 0x95,\r
479 EfiProcessorFamilyPaRisc7100 = 0x96,\r
480 EfiProcessorFamilyV30 = 0xA0,\r
481 EfiProcessorFamilyPentiumIIIXeon = 0xB0,\r
482 EfiProcessorFamilyPentiumIIISpeedStep = 0xB1,\r
483 EfiProcessorFamilyPentium4 = 0xB2,\r
484 EfiProcessorFamilyIntelXeon = 0xB3,\r
485 EfiProcessorFamilyAS400 = 0xB4,\r
486 EfiProcessorFamilyIntelXeonMP = 0xB5,\r
487 EfiProcessorFamilyAMDAthlonXP = 0xB6,\r
488 EfiProcessorFamilyAMDAthlonMP = 0xB7,\r
489 EfiProcessorFamilyIntelItanium2 = 0xB8,\r
490 ///\r
1c2f052d 491 /// Inconsistent with specification here:\r
f22f941e 492 /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.\r
87d63447 493 ///\r
494 EfiProcessorFamilyIntelPentiumM = 0xB9,\r
495 ///\r
1c2f052d 496 /// Inconsistent with specification here:\r
f22f941e 497 /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.\r
87d63447 498 ///\r
499 EfiProcessorFamilyIntelCeleronD = 0xBA,\r
500 ///\r
1c2f052d 501 /// Inconsistent with specification here:\r
f22f941e 502 /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.\r
87d63447 503 ///\r
504 EfiProcessorFamilyIntelPentiumD = 0xBB,\r
505 ///\r
1c2f052d 506 /// Inconsistent with specification here:\r
f22f941e 507 /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.\r
87d63447 508 ///\r
509 EfiProcessorFamilyIntelPentiumEx = 0xBC,\r
510 ///\r
1c2f052d 511 /// Inconsistent with specification here:\r
f22f941e 512 /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.\r
87d63447 513 ///\r
1c2f052d 514 EfiProcessorFamilyIntelCoreSolo = 0xBD,\r
87d63447 515 ///\r
1c2f052d 516 /// Inconsistent with specification here:\r
f22f941e 517 /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.\r
87d63447 518 ///\r
1c2f052d 519 EfiProcessorFamilyReserved = 0xBE,\r
87d63447 520 ///\r
1c2f052d 521 /// Inconsistent with specification here:\r
f22f941e 522 /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.\r
87d63447 523 ///\r
524 EfiProcessorFamilyIntelCore2 = 0xBF,\r
525 EfiProcessorFamilyIBM390 = 0xC8,\r
526 EfiProcessorFamilyG4 = 0xC9,\r
527 EfiProcessorFamilyG5 = 0xCA,\r
528 ///\r
1c2f052d 529 /// Inconsistent with specification here:\r
f22f941e 530 /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.\r
87d63447 531 ///\r
532 EfiProcessorFamilyG6 = 0xCB,\r
533 ///\r
1c2f052d 534 /// Inconsistent with specification here:\r
f22f941e 535 /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.\r
87d63447 536 ///\r
537 EfiProcessorFamilyzArchitectur = 0xCC,\r
538 ///\r
1c2f052d 539 /// Inconsistent with specification here:\r
f22f941e 540 /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.\r
87d63447 541 ///\r
542 EfiProcessorFamilyViaC7M = 0xD2,\r
543 ///\r
1c2f052d 544 /// Inconsistent with specification here:\r
f22f941e 545 /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.\r
87d63447 546 ///\r
547 EfiProcessorFamilyViaC7D = 0xD3,\r
548 ///\r
1c2f052d 549 /// Inconsistent with specification here:\r
f22f941e 550 /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.\r
87d63447 551 ///\r
552 EfiProcessorFamilyViaC7 = 0xD4,\r
553 ///\r
1c2f052d 554 /// Inconsistent with specification here:\r
f22f941e 555 /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.\r
87d63447 556 ///\r
557 EfiProcessorFamilyViaEden = 0xD5,\r
558 EfiProcessorFamilyi860 = 0xFA,\r
559 EfiProcessorFamilyi960 = 0xFB,\r
560 ///\r
1c2f052d 561 /// Inconsistent with specification here:\r
f22f941e 562 /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.\r
87d63447 563 ///\r
564 EfiProcessorFamilyIndicatorFamily2 = 0xFE,\r
565 ///\r
1c2f052d 566 /// Inconsistent with specification here:\r
f22f941e 567 /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.\r
87d63447 568 ///\r
569 EfiProcessorFamilyReserved1 = 0xFF\r
570} EFI_PROCESSOR_FAMILY_DATA;\r
571\r
54acdc7b 572typedef enum {\r
573 EfiProcessorFamilySh3 = 0x104,\r
574 EfiProcessorFamilySh4 = 0x105,\r
575 EfiProcessorFamilyArm = 0x118,\r
576 EfiProcessorFamilyStrongArm = 0x119,\r
577 EfiProcessorFamily6x86 = 0x12C,\r
578 EfiProcessorFamilyMediaGx = 0x12D,\r
579 EfiProcessorFamilyMii = 0x12E,\r
580 EfiProcessorFamilyWinChip = 0x140,\r
581 EfiProcessorFamilyDsp = 0x15E,\r
582 EfiProcessorFamilyVideo = 0x1F4\r
583} EFI_PROCESSOR_FAMILY2_DATA;\r
584\r
87d63447 585///\r
1c2f052d
LG		 586/// This data record refers to the core voltage of the processor being defined. The unit of measurement\r
587/// of this data record is in volts.\r
87d63447 588///\r
589typedef EFI_EXP_BASE10_DATA EFI_PROCESSOR_VOLTAGE_DATA;\r
590\r
591///\r
1c2f052d
LG		 592/// This data record refers to the base address of the APIC of the processor being defined. This data\r
593/// record is a physical address location.\r
87d63447 594///\r
595typedef EFI_PHYSICAL_ADDRESS EFI_PROCESSOR_APIC_BASE_ADDRESS_DATA;\r
596\r
597///\r
1c2f052d
LG		 598/// This data record refers to the ID of the APIC of the processor being defined. This data record is a\r
599/// 4-byte entry.\r
87d63447 600///\r
601typedef UINT32 EFI_PROCESSOR_APIC_ID_DATA;\r
602\r
603///\r
1c2f052d
LG		 604/// This data record refers to the version number of the APIC of the processor being defined. This data\r
605/// record is a 4-byte entry.\r
87d63447 606///\r
607typedef UINT32 EFI_PROCESSOR_APIC_VERSION_NUMBER_DATA;\r
608\r
609typedef enum {\r
610 EfiProcessorIa32Microcode = 1,\r
611 EfiProcessorIpfPalAMicrocode = 2,\r
612 EfiProcessorIpfPalBMicrocode = 3\r
613} EFI_PROCESSOR_MICROCODE_TYPE;\r
614\r
615///\r
1c2f052d
LG		 616/// This data record refers to the revision of the processor microcode that is loaded in the processor.\r
617/// This data record is a 4-byte entry.\r
87d63447 618///\r
619typedef struct {\r
620 ///\r
1c2f052d
LG		 621 /// Identifies what type of microcode the data is.\r
622 ///\r
87d63447 623 EFI_PROCESSOR_MICROCODE_TYPE ProcessorMicrocodeType;\r
624 ///\r
1c2f052d 625 /// Indicates the revision number of this microcode.\r
87d63447 626 ///\r
627 UINT32 ProcessorMicrocodeRevisionNumber;\r
628} EFI_PROCESSOR_MICROCODE_REVISION_DATA;\r
629\r
630///\r
631/// This data record refers to the status of the processor.\r
632///\r
633typedef struct {\r
1c2f052d
LG		 634 UINT32 CpuStatus :3; ///< Indicates the status of the processor.\r
635 UINT32 Reserved1 :3; ///< Reserved for future use. Should be set to zero.\r
636 UINT32 SocketPopulated :1; ///< Indicates if the processor is socketed or not.\r
637 UINT32 Reserved2 :1; ///< Reserved for future use. Should be set to zero.\r
638 UINT32 ApicEnable :1; ///< Indicates if the APIC is enabled or not.\r
639 UINT32 BootApplicationProcessor :1; ///< Indicates if this processor is the boot processor.\r
640 UINT32 Reserved3 :22;///< Reserved for future use. Should be set to zero.\r
87d63447 641} EFI_PROCESSOR_STATUS_DATA;\r
642\r
643typedef enum {\r
644 EfiCpuStatusUnknown = 0,\r
645 EfiCpuStatusEnabled = 1,\r
646 EfiCpuStatusDisabledByUser = 2,\r
647 EfiCpuStatusDisabledbyBios = 3,\r
648 EfiCpuStatusIdle = 4,\r
649 EfiCpuStatusOther = 7\r
650} EFI_CPU_STATUS;\r
651\r
652typedef enum {\r
653 EfiProcessorSocketOther = 1,\r
654 EfiProcessorSocketUnknown = 2,\r
655 EfiProcessorSocketDaughterBoard = 3,\r
656 EfiProcessorSocketZIF = 4,\r
657 EfiProcessorSocketReplacePiggyBack = 5,\r
658 EfiProcessorSocketNone = 6,\r
659 EfiProcessorSocketLIF = 7,\r
660 EfiProcessorSocketSlot1 = 8,\r
661 EfiProcessorSocketSlot2 = 9,\r
662 EfiProcessorSocket370Pin = 0xA,\r
663 EfiProcessorSocketSlotA = 0xB,\r
664 EfiProcessorSocketSlotM = 0xC,\r
665 EfiProcessorSocket423 = 0xD,\r
666 EfiProcessorSocketA462 = 0xE,\r
667 EfiProcessorSocket478 = 0xF,\r
668 EfiProcessorSocket754 = 0x10,\r
669 EfiProcessorSocket940 = 0x11,\r
670 ///\r
1c2f052d 671 /// Inconsistent with specification here:\r
f22f941e 672 /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.\r
87d63447 673 ///\r
674 EfiProcessorSocket939 = 0x12,\r
675 ///\r
1c2f052d 676 /// Inconsistent with specification here:\r
f22f941e 677 /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.\r
87d63447 678 ///\r
679 EfiProcessorSocketmPGA604 = 0x13,\r
680 ///\r
1c2f052d 681 /// Inconsistent with specification here:\r
f22f941e 682 /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.\r
87d63447 683 ///\r
684 EfiProcessorSocketLGA771 = 0x14,\r
685 ///\r
1c2f052d 686 /// Inconsistent with specification here:\r
f22f941e 687 /// This field is NOT defined in ProcSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.\r
87d63447 688 ///\r
689 EfiProcessorSocketLGA775 = 0x15\r
690\r
691} EFI_PROCESSOR_SOCKET_TYPE_DATA;\r
692\r
693typedef STRING_REF EFI_PROCESSOR_SOCKET_NAME_DATA;\r
694\r
695///\r
1c2f052d 696/// Inconsistent with specification here:\r
f22f941e 697/// In ProcSubclass specification 0.9, the naming is EFI_PROCESSOR_CACHE_ASSOCIATION_DATA.\r
87d63447 698/// Keep it unchanged for backward compatibilty.\r
699///\r
700typedef EFI_INTER_LINK_DATA EFI_CACHE_ASSOCIATION_DATA;\r
701\r
702///\r
1c2f052d 703/// This data record refers to the health status of the processor.\r
87d63447 704///\r
1c2f052d 705/// Inconsistent with specification here:\r
f22f941e 706/// In ProcSubclass specification 0.9, the naming is EFI_PROCESSOR_HEALTH_STATUS_DATA.\r
87d63447 707/// Keep it unchanged for backward compatibilty.\r
708///\r
709typedef enum {\r
710 EfiProcessorHealthy = 1,\r
711 EfiProcessorPerfRestricted = 2,\r
1c2f052d 712 EfiProcessorFuncRestricted = 3\r
87d63447 713} EFI_PROCESSOR_HEALTH_STATUS;\r
714\r
715///\r
1c2f052d
LG		 716/// This data record refers to the package number of this processor. Multiple logical processors can\r
717/// exist in a system and each logical processor can be correlated to the physical processor using this\r
718/// record type.\r
87d63447 719///\r
720typedef UINTN EFI_PROCESSOR_PACKAGE_NUMBER_DATA;\r
721\r
54acdc7b 722typedef UINT8 EFI_PROCESSOR_CORE_COUNT_DATA;\r
723typedef UINT8 EFI_PROCESSOR_ENABLED_CORE_COUNT_DATA;\r
724typedef UINT8 EFI_PROCESSOR_THREAD_COUNT_DATA;\r
725\r
726typedef struct {\r
727 UINT16 Reserved :1;\r
728 UINT16 Unknown :1;\r
729 UINT16 Capable64Bit :1;\r
730 UINT16 Reserved2 :13;\r
731} EFI_PROCESSOR_CHARACTERISTICS_DATA;\r
732\r
87d63447 733///\r
734/// Inconsistent with specification here:\r
f22f941e 735/// In ProcSubclass specification 0.9, the enumeration type data structure is NOT defined.\r
1c2f052d 736/// The equivalent in specification is\r
87d63447 737/// #define EFI_PROCESSOR_FREQUENCY_RECORD_NUMBER 0x00000001\r
738/// #define EFI_PROCESSOR_BUS_FREQUENCY_RECORD_NUMBER 0x00000002\r
739/// #define EFI_PROCESSOR_VERSION_RECORD_NUMBER 0x00000003\r
740/// #define EFI_PROCESSOR_MANUFACTURER_RECORD_NUMBER 0x00000004\r
741/// #define EFI_PROCESSOR_SERIAL_NUMBER_RECORD_NUMBER 0x00000005\r
742/// #define EFI_PROCESSOR_ID_RECORD_NUMBER 0x00000006\r
743/// #define EFI_PROCESSOR_TYPE_RECORD_NUMBER 0x00000007\r
744/// #define EFI_PROCESSOR_FAMILY_RECORD_NUMBER 0x00000008\r
745/// #define EFI_PROCESSOR_VOLTAGE_RECORD_NUMBER 0x00000009\r
746/// #define EFI_PROCESSOR_APIC_BASE_ADDRESS_RECORD_NUMBER 0x0000000A\r
747/// #define EFI_PROCESSOR_APIC_ID_RECORD_NUMBER 0x0000000B\r
748/// #define EFI_PROCESSOR_APIC_VER_NUMBER_RECORD_NUMBER 0x0000000C\r
749/// #define EFI_PROCESSOR_MICROCODE_REVISION_RECORD_NUMBER 0x0000000D\r
750/// #define EFI_PROCESSOR_STATUS_RECORD_NUMBER 0x0000000E\r
751/// #define EFI_PROCESSOR_SOCKET_TYPE_RECORD_NUMBER 0x0000000F\r
752/// #define EFI_PROCESSOR_SOCKET_NAME_RECORD_NUMBER 0x00000010\r
753/// #define EFI_PROCESSOR_CACHE_ASSOCIATION_RECORD_NUMBER 0x00000011\r
754/// #define EFI_PROCESSOR_MAX_FREQUENCY_RECORD_NUMBER 0x00000012\r
755/// #define EFI_PROCESSOR_ASSET_TAG_RECORD_NUMBER 0x00000013\r
756/// #define EFI_PROCESSOR_MAX_FSB_FREQUENCY_RECORD_NUMBER 0x00000014\r
757/// #define EFI_PROCESSOR_PACKAGE_NUMBER_RECORD_NUMBER 0x00000015\r
758/// #define EFI_PROCESSOR_FREQUENCY_LIST_RECORD_NUMBER 0x00000016\r
759/// #define EFI_PROCESSOR_FSB_FREQUENCY_LIST_RECORD_NUMBER 0x00000017\r
760/// #define EFI_PROCESSOR_HEALTH_STATUS_RECORD_NUMBER 0x00000018\r
761///\r
762/// Keep the definition unchanged for backward compatibility.\r
763typedef enum {\r
764 ProcessorCoreFrequencyRecordType = 1,\r
765 ProcessorFsbFrequencyRecordType = 2,\r
766 ProcessorVersionRecordType = 3,\r
767 ProcessorManufacturerRecordType = 4,\r
768 ProcessorSerialNumberRecordType = 5,\r
769 ProcessorIdRecordType = 6,\r
770 ProcessorTypeRecordType = 7,\r
771 ProcessorFamilyRecordType = 8,\r
772 ProcessorVoltageRecordType = 9,\r
773 ProcessorApicBaseAddressRecordType = 10,\r
774 ProcessorApicIdRecordType = 11,\r
775 ProcessorApicVersionNumberRecordType = 12,\r
776 CpuUcodeRevisionDataRecordType = 13,\r
777 ProcessorStatusRecordType = 14,\r
778 ProcessorSocketTypeRecordType = 15,\r
779 ProcessorSocketNameRecordType = 16,\r
780 CacheAssociationRecordType = 17,\r
781 ProcessorMaxCoreFrequencyRecordType = 18,\r
782 ProcessorAssetTagRecordType = 19,\r
783 ProcessorMaxFsbFrequencyRecordType = 20,\r
784 ProcessorPackageNumberRecordType = 21,\r
785 ProcessorCoreFrequencyListRecordType = 22,\r
786 ProcessorFsbFrequencyListRecordType = 23,\r
54acdc7b 787 ProcessorHealthStatusRecordType = 24,\r
788 ProcessorCoreCountRecordType = 25,\r
789 ProcessorEnabledCoreCountRecordType = 26,\r
790 ProcessorThreadCountRecordType = 27,\r
791 ProcessorCharacteristicsRecordType = 28,\r
792 ProcessorFamily2RecordType = 29,\r
793 ProcessorPartNumberRecordType = 30,\r
87d63447 794} EFI_CPU_VARIABLE_RECORD_TYPE;\r
795\r
796///\r
1c2f052d 797/// Inconsistent with specification here:\r
f22f941e 798/// In ProcSubclass specification 0.9, the union type data structure is NOT defined.\r
87d63447 799/// It's implementation-specific to simplify the code logic.\r
800///\r
801typedef union {\r
802 EFI_PROCESSOR_CORE_FREQUENCY_LIST_DATA ProcessorCoreFrequencyList;\r
803 EFI_PROCESSOR_FSB_FREQUENCY_LIST_DATA ProcessorFsbFrequencyList;\r
804 EFI_PROCESSOR_SERIAL_NUMBER_DATA ProcessorSerialNumber;\r
805 EFI_PROCESSOR_CORE_FREQUENCY_DATA ProcessorCoreFrequency;\r
806 EFI_PROCESSOR_FSB_FREQUENCY_DATA ProcessorFsbFrequency;\r
807 EFI_PROCESSOR_MAX_CORE_FREQUENCY_DATA ProcessorMaxCoreFrequency;\r
808 EFI_PROCESSOR_MAX_FSB_FREQUENCY_DATA ProcessorMaxFsbFrequency;\r
809 EFI_PROCESSOR_VERSION_DATA ProcessorVersion;\r
810 EFI_PROCESSOR_MANUFACTURER_DATA ProcessorManufacturer;\r
811 EFI_PROCESSOR_ID_DATA ProcessorId;\r
812 EFI_PROCESSOR_TYPE_DATA ProcessorType;\r
813 EFI_PROCESSOR_FAMILY_DATA ProcessorFamily;\r
814 EFI_PROCESSOR_VOLTAGE_DATA ProcessorVoltage;\r
815 EFI_PROCESSOR_APIC_BASE_ADDRESS_DATA ProcessorApicBase;\r
816 EFI_PROCESSOR_APIC_ID_DATA ProcessorApicId;\r
817 EFI_PROCESSOR_APIC_VERSION_NUMBER_DATA ProcessorApicVersionNumber;\r
818 EFI_PROCESSOR_MICROCODE_REVISION_DATA CpuUcodeRevisionData;\r
819 EFI_PROCESSOR_STATUS_DATA ProcessorStatus;\r
820 EFI_PROCESSOR_SOCKET_TYPE_DATA ProcessorSocketType;\r
821 EFI_PROCESSOR_SOCKET_NAME_DATA ProcessorSocketName;\r
822 EFI_PROCESSOR_ASSET_TAG_DATA ProcessorAssetTag;\r
54acdc7b 823 EFI_PROCESSOR_PART_NUMBER_DATA ProcessorPartNumber;\r
87d63447 824 EFI_PROCESSOR_HEALTH_STATUS ProcessorHealthStatus;\r
825 EFI_PROCESSOR_PACKAGE_NUMBER_DATA ProcessorPackageNumber;\r
54acdc7b 826 EFI_PROCESSOR_CORE_COUNT_DATA ProcessorCoreCount;\r
827 EFI_PROCESSOR_ENABLED_CORE_COUNT_DATA ProcessorEnabledCoreCount;\r
828 EFI_PROCESSOR_THREAD_COUNT_DATA ProcessorThreadCount;\r
829 EFI_PROCESSOR_CHARACTERISTICS_DATA ProcessorCharacteristics;\r
830 EFI_PROCESSOR_FAMILY2_DATA ProcessorFamily2;\r
87d63447 831} EFI_CPU_VARIABLE_RECORD;\r
832\r
833typedef struct {\r
834 EFI_SUBCLASS_TYPE1_HEADER DataRecordHeader;\r
835 EFI_CPU_VARIABLE_RECORD VariableRecord;\r
836} EFI_CPU_DATA_RECORD;\r
837\r
838#define EFI_CACHE_SUBCLASS_VERSION 0x00010000\r
839\r
840typedef EFI_EXP_BASE2_DATA EFI_CACHE_SIZE_DATA;\r
841///\r
1c2f052d 842/// Inconsistent with specification here:\r
f22f941e 843/// In CacheSubclass specification 0.9, the naming is EFI_CACHE_MAXIMUM_SIZE_DATA.\r
87d63447 844/// Keep it unchanged for backward compatibilty.\r
845///\r
846typedef EFI_EXP_BASE2_DATA EFI_MAXIMUM_CACHE_SIZE_DATA;\r
847typedef EFI_EXP_BASE10_DATA EFI_CACHE_SPEED_DATA;\r
848typedef STRING_REF EFI_CACHE_SOCKET_DATA;\r
849\r
850typedef struct {\r
851 UINT32 Other :1;\r
852 UINT32 Unknown :1;\r
853 UINT32 NonBurst :1;\r
854 UINT32 Burst :1;\r
855 UINT32 PipelineBurst :1;\r
f7d5dbab
SZ		 856 ///\r
857 /// Inconsistent between CacheSubclass 0.9 and SMBIOS specifications here:\r
858 /// In CacheSubclass specification 0.9, the sequence of Asynchronous and Synchronous fileds\r
859 /// are opposite to SMBIOS specification.\r
860 ///\r
87d63447 861 UINT32 Asynchronous :1;\r
862 UINT32 Synchronous :1;\r
863 UINT32 Reserved :25;\r
864} EFI_CACHE_SRAM_TYPE_DATA;\r
865\r
866typedef EFI_CACHE_SRAM_TYPE_DATA EFI_CACHE_SRAM_INSTALL_DATA;\r
867\r
868typedef enum {\r
869 EfiCacheErrorOther = 1,\r
870 EfiCacheErrorUnknown = 2,\r
871 EfiCacheErrorNone = 3,\r
872 EfiCacheErrorParity = 4,\r
873 EfiCacheErrorSingleBit = 5,\r
874 EfiCacheErrorMultiBit = 6\r
875} EFI_CACHE_ERROR_TYPE_DATA;\r
876\r
877typedef enum {\r
878 EfiCacheTypeOther = 1,\r
879 EfiCacheTypeUnknown = 2,\r
880 EfiCacheTypeInstruction = 3,\r
881 EfiCacheTypeData = 4,\r
882 EfiCacheTypeUnified = 5\r
883} EFI_CACHE_TYPE_DATA;\r
884\r
885typedef enum {\r
886 EfiCacheAssociativityOther = 1,\r
887 EfiCacheAssociativityUnknown = 2,\r
888 EfiCacheAssociativityDirectMapped = 3,\r
889 EfiCacheAssociativity2Way = 4,\r
890 EfiCacheAssociativity4Way = 5,\r
891 EfiCacheAssociativityFully = 6,\r
892 EfiCacheAssociativity8Way = 7,\r
893 EfiCacheAssociativity16Way = 8\r
894} EFI_CACHE_ASSOCIATIVITY_DATA;\r
895\r
896///\r
1c2f052d 897/// Inconsistent with specification here:\r
f22f941e 898/// In CacheSubclass 0.9 specification. It defines the field type as UINT16.\r
899/// In fact, it should be UINT32 type because it refers to a 32bit width data.\r
87d63447 900///\r
901typedef struct {\r
902 UINT32 Level :3;\r
903 UINT32 Socketed :1;\r
904 UINT32 Reserved2 :1;\r
905 UINT32 Location :2;\r
906 UINT32 Enable :1;\r
907 UINT32 OperationalMode :2;\r
908 UINT32 Reserved1 :22;\r
909} EFI_CACHE_CONFIGURATION_DATA;\r
910\r
911#define EFI_CACHE_L1 1\r
912#define EFI_CACHE_L2 2\r
913#define EFI_CACHE_L3 3\r
914#define EFI_CACHE_L4 4\r
915#define EFI_CACHE_LMAX EFI_CACHE_L4\r
916\r
917#define EFI_CACHE_SOCKETED 1\r
918#define EFI_CACHE_NOT_SOCKETED 0\r
919\r
920typedef enum {\r
921 EfiCacheInternal = 0,\r
922 EfiCacheExternal = 1,\r
923 EfiCacheReserved = 2,\r
924 EfiCacheUnknown = 3\r
925} EFI_CACHE_LOCATION;\r
926\r
927#define EFI_CACHE_ENABLED 1\r
928#define EFI_CACHE_DISABLED 0\r
929\r
930typedef enum {\r
931 EfiCacheWriteThrough = 0,\r
932 EfiCacheWriteBack = 1,\r
933 EfiCacheDynamicMode = 2,\r
934 EfiCacheUnknownMode = 3\r
935} EFI_CACHE_OPERATIONAL_MODE;\r
936\r
937\r
409669d5 938///\r
939/// Inconsistent with specification here:\r
f22f941e 940/// In CacheSubclass specification 0.9, the enumeration type data structure is NOT defined.\r
1c2f052d 941/// The equivalent in specification is\r
409669d5 942/// #define EFI_CACHE_SIZE_RECORD_NUMBER 0x00000001\r
943/// #define EFI_CACHE_MAXIMUM_SIZE_RECORD_NUMBER 0x00000002\r
944/// #define EFI_CACHE_SPEED_RECORD_NUMBER 0x00000003\r
945/// #define EFI_CACHE_SOCKET_RECORD_NUMBER 0x00000004\r
1c2f052d
LG		 946/// #define EFI_CACHE_SRAM_SUPPORT_RECORD_NUMBER 0x00000005\r
947/// #define EFI_CACHE_SRAM_INSTALL_RECORD_NUMBER 0x00000006\r
409669d5 948/// #define EFI_CACHE_ERROR_SUPPORT_RECORD_NUMBER 0x00000007\r
949/// #define EFI_CACHE_TYPE_RECORD_NUMBER 0x00000008\r
950/// #define EFI_CACHE_ASSOCIATIVITY_RECORD_NUMBER 0x00000009\r
951/// #define EFI_CACHE_CONFIGURATION_RECORD_NUMBER 0x0000000A\r
952/// Keep the definition unchanged for backward compatibility.\r
953///\r
87d63447 954typedef enum {\r
955 CacheSizeRecordType = 1,\r
956 MaximumSizeCacheRecordType = 2,\r
957 CacheSpeedRecordType = 3,\r
958 CacheSocketRecordType = 4,\r
959 CacheSramTypeRecordType = 5,\r
960 CacheInstalledSramTypeRecordType = 6,\r
961 CacheErrorTypeRecordType = 7,\r
962 CacheTypeRecordType = 8,\r
963 CacheAssociativityRecordType = 9,\r
964 CacheConfigRecordType = 10\r
965} EFI_CACHE_VARIABLE_RECORD_TYPE;\r
966\r
967///\r
1c2f052d 968/// Inconsistent with specification here:\r
f22f941e 969/// In CacheSubclass specification 0.9, the union type data structure is NOT defined.\r
87d63447 970/// It's implementation-specific to simplify the code logic.\r
971///\r
972typedef union {\r
973 EFI_CACHE_SIZE_DATA CacheSize;\r
974 EFI_MAXIMUM_CACHE_SIZE_DATA MaximumCacheSize;\r
975 EFI_CACHE_SPEED_DATA CacheSpeed;\r
976 EFI_CACHE_SOCKET_DATA CacheSocket;\r
977 EFI_CACHE_SRAM_TYPE_DATA CacheSramType;\r
978 EFI_CACHE_SRAM_TYPE_DATA CacheInstalledSramType;\r
979 EFI_CACHE_ERROR_TYPE_DATA CacheErrorType;\r
980 EFI_CACHE_TYPE_DATA CacheType;\r
981 EFI_CACHE_ASSOCIATIVITY_DATA CacheAssociativity;\r
982 EFI_CACHE_CONFIGURATION_DATA CacheConfig;\r
983 EFI_CACHE_ASSOCIATION_DATA CacheAssociation;\r
984} EFI_CACHE_VARIABLE_RECORD;\r
985\r
986typedef struct {\r
987 EFI_SUBCLASS_TYPE1_HEADER DataRecordHeader;\r
988 EFI_CACHE_VARIABLE_RECORD VariableRecord;\r
989} EFI_CACHE_DATA_RECORD;\r
990\r
991#define EFI_MEMORY_SUBCLASS_VERSION 0x0100\r
992#define EFI_MEMORY_SIZE_RECORD_NUMBER 0x00000001\r
993\r
994typedef enum _EFI_MEMORY_REGION_TYPE {\r
995 EfiMemoryRegionMemory = 0x01,\r
996 EfiMemoryRegionReserved = 0x02,\r
997 EfiMemoryRegionAcpi = 0x03,\r
998 EfiMemoryRegionNvs = 0x04\r
999} EFI_MEMORY_REGION_TYPE;\r
1000\r
1001///\r
1c2f052d
LG		 1002/// This data record refers to the size of a memory region. The regions that are\r
1003/// described can refer to physical memory, memory-mapped I/O, or reserved BIOS memory regions.\r
1004/// The unit of measurement of this data record is in bytes.\r
87d63447 1005///\r
1006typedef struct {\r
1007 ///\r
1c2f052d
LG		 1008 /// A zero-based value that indicates which processor(s) can access the memory region.\r
1009 /// A value of 0xFFFF indicates the region is accessible by all processors.\r
87d63447 1010 ///\r
1011 UINT32 ProcessorNumber;\r
1012 ///\r
1c2f052d 1013 /// A zero-based value that indicates the starting bus that can access the memory region.\r
87d63447 1014 ///\r
1015 UINT16 StartBusNumber;\r
1016 ///\r
1c2f052d
LG		 1017 /// A zero-based value that indicates the ending bus that can access the memory region.\r
1018 /// A value of 0xFF for a PCI system indicates the region is accessible by all buses and\r
1019 /// is global in scope. An example of the EndBusNumber not being 0xFF is a system\r
1020 /// with two or more peer-to-host PCI bridges.\r
87d63447 1021 ///\r
1022 UINT16 EndBusNumber;\r
1023 ///\r
1c2f052d
LG		 1024 /// The type of memory region from the operating system's point of view.\r
1025 /// MemoryRegionType values are equivalent to the legacy INT 15 AX = E820 BIOS\r
1026 /// command values.\r
87d63447 1027 ///\r
1028 EFI_MEMORY_REGION_TYPE MemoryRegionType;\r
1029 ///\r
1c2f052d 1030 /// The size of the memory region in bytes.\r
87d63447 1031 ///\r
1032 EFI_EXP_BASE2_DATA MemorySize;\r
1033 ///\r
1c2f052d 1034 /// The starting physical address of the memory region.\r
87d63447 1035 ///\r
1036 EFI_PHYSICAL_ADDRESS MemoryStartAddress;\r
1037} EFI_MEMORY_SIZE_DATA;\r
1038\r
1039\r
1040#define EFI_MEMORY_ARRAY_LOCATION_RECORD_NUMBER 0x00000002\r
1041\r
1042typedef enum _EFI_MEMORY_ARRAY_LOCATION {\r
1043 EfiMemoryArrayLocationOther = 0x01,\r
1044 EfiMemoryArrayLocationUnknown = 0x02,\r
1045 EfiMemoryArrayLocationSystemBoard = 0x03,\r
1046 EfiMemoryArrayLocationIsaAddonCard = 0x04,\r
1047 EfiMemoryArrayLocationEisaAddonCard = 0x05,\r
1048 EfiMemoryArrayLocationPciAddonCard = 0x06,\r
1049 EfiMemoryArrayLocationMcaAddonCard = 0x07,\r
1050 EfiMemoryArrayLocationPcmciaAddonCard = 0x08,\r
1051 EfiMemoryArrayLocationProprietaryAddonCard = 0x09,\r
1052 EfiMemoryArrayLocationNuBus = 0x0A,\r
1053 EfiMemoryArrayLocationPc98C20AddonCard = 0xA0,\r
1054 EfiMemoryArrayLocationPc98C24AddonCard = 0xA1,\r
1055 EfiMemoryArrayLocationPc98EAddonCard = 0xA2,\r
1056 EfiMemoryArrayLocationPc98LocalBusAddonCard = 0xA3\r
1057} EFI_MEMORY_ARRAY_LOCATION;\r
1058\r
1059typedef enum _EFI_MEMORY_ARRAY_USE {\r
1060 EfiMemoryArrayUseOther = 0x01,\r
1061 EfiMemoryArrayUseUnknown = 0x02,\r
1062 EfiMemoryArrayUseSystemMemory = 0x03,\r
1063 EfiMemoryArrayUseVideoMemory = 0x04,\r
1064 EfiMemoryArrayUseFlashMemory = 0x05,\r
1065 EfiMemoryArrayUseNonVolatileRam = 0x06,\r
1066 EfiMemoryArrayUseCacheMemory = 0x07\r
1067} EFI_MEMORY_ARRAY_USE;\r
1068\r
1069typedef enum _EFI_MEMORY_ERROR_CORRECTION {\r
1070 EfiMemoryErrorCorrectionOther = 0x01,\r
1071 EfiMemoryErrorCorrectionUnknown = 0x02,\r
1072 EfiMemoryErrorCorrectionNone = 0x03,\r
1073 EfiMemoryErrorCorrectionParity = 0x04,\r
1074 EfiMemoryErrorCorrectionSingleBitEcc = 0x05,\r
1075 EfiMemoryErrorCorrectionMultiBitEcc = 0x06,\r
1076 EfiMemoryErrorCorrectionCrc = 0x07\r
1077} EFI_MEMORY_ERROR_CORRECTION;\r
1078\r
1079///\r
1c2f052d
LG		 1080/// This data record refers to the physical memory array. This data record is a structure.\r
1081/// The type definition structure for EFI_MEMORY_ARRAY_LOCATION_DATA is in SMBIOS 2.3.4:\r
1082/// - Table 3.3.17.1, Type 16, Offset 0x4\r
1083/// - Table 3.3.17.2, Type 16, Offset 0x5\r
1084/// - Table 3.3.17.3, Type 16, with the following offsets:\r
1085/// -- Offset 0x6\r
1086/// -- Offset 0x7\r
1087/// -- Offset 0xB\r
1088/// -- Offset 0xD\r
1089///\r
87d63447 1090typedef struct {\r
1091 ///\r
1c2f052d 1092 /// The physical location of the memory array.\r
87d63447 1093 ///\r
1094 EFI_MEMORY_ARRAY_LOCATION MemoryArrayLocation;\r
1095 ///\r
1096 /// The memory array usage.\r
1097 ///\r
1098 EFI_MEMORY_ARRAY_USE MemoryArrayUse;\r
1099 ///\r
1100 /// The primary error correction or detection supported by this memory array.\r
1101 ///\r
1102 EFI_MEMORY_ERROR_CORRECTION MemoryErrorCorrection;\r
1103 ///\r
1c2f052d
LG		 1104 /// The maximum memory capacity size in kilobytes. If capacity is unknown, then\r
1105 /// values of MaximumMemoryCapacity.Value = 0x00 and\r
87d63447 1106 /// MaximumMemoryCapacity.Exponent = 0x8000 are used.\r
1107 ///\r
1108 EFI_EXP_BASE2_DATA MaximumMemoryCapacity;\r
1109 ///\r
1c2f052d
LG		 1110 /// The number of memory slots or sockets that are available for memory devices\r
1111 /// in this array.\r
87d63447 1112 ///\r
1113 UINT16 NumberMemoryDevices;\r
1114} EFI_MEMORY_ARRAY_LOCATION_DATA;\r
1115\r
1116\r
1117#define EFI_MEMORY_ARRAY_LINK_RECORD_NUMBER 0x00000003\r
1118\r
1119typedef enum _EFI_MEMORY_FORM_FACTOR {\r
1120 EfiMemoryFormFactorOther = 0x01,\r
1121 EfiMemoryFormFactorUnknown = 0x02,\r
1122 EfiMemoryFormFactorSimm = 0x03,\r
1123 EfiMemoryFormFactorSip = 0x04,\r
1124 EfiMemoryFormFactorChip = 0x05,\r
1125 EfiMemoryFormFactorDip = 0x06,\r
1126 EfiMemoryFormFactorZip = 0x07,\r
1127 EfiMemoryFormFactorProprietaryCard = 0x08,\r
1128 EfiMemoryFormFactorDimm = 0x09,\r
1129 EfiMemoryFormFactorTsop = 0x0A,\r
1130 EfiMemoryFormFactorRowOfChips = 0x0B,\r
1131 EfiMemoryFormFactorRimm = 0x0C,\r
1132 EfiMemoryFormFactorSodimm = 0x0D,\r
1133 EfiMemoryFormFactorSrimm = 0x0E,\r
1134 ///\r
1c2f052d 1135 /// Inconsistent with specification here:\r
f22f941e 1136 /// This field is NOT defined in MemSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.\r
87d63447 1137 ///\r
1138 EfiMemoryFormFactorFbDimm = 0x0F\r
1139} EFI_MEMORY_FORM_FACTOR;\r
1140\r
1141typedef enum _EFI_MEMORY_ARRAY_TYPE {\r
1142 EfiMemoryTypeOther = 0x01,\r
1143 EfiMemoryTypeUnknown = 0x02,\r
1144 EfiMemoryTypeDram = 0x03,\r
1145 EfiMemoryTypeEdram = 0x04,\r
1146 EfiMemoryTypeVram = 0x05,\r
1147 EfiMemoryTypeSram = 0x06,\r
1148 EfiMemoryTypeRam = 0x07,\r
1149 EfiMemoryTypeRom = 0x08,\r
1150 EfiMemoryTypeFlash = 0x09,\r
1151 EfiMemoryTypeEeprom = 0x0A,\r
1152 EfiMemoryTypeFeprom = 0x0B,\r
1153 EfiMemoryTypeEprom = 0x0C,\r
1154 EfiMemoryTypeCdram = 0x0D,\r
1155 EfiMemoryType3Dram = 0x0E,\r
1156 EfiMemoryTypeSdram = 0x0F,\r
1157 EfiMemoryTypeSgram = 0x10,\r
1158 EfiMemoryTypeRdram = 0x11,\r
1159 EfiMemoryTypeDdr = 0x12,\r
1160 ///\r
1c2f052d 1161 /// Inconsistent with specification here:\r
f22f941e 1162 /// This field is NOT defined in MemSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.\r
87d63447 1163 ///\r
1164 EfiMemoryTypeDdr2 = 0x13,\r
1165 ///\r
1c2f052d 1166 /// Inconsistent with specification here:\r
f22f941e 1167 /// This field is NOT defined in MemSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.\r
87d63447 1168 ///\r
1169 EfiMemoryTypeDdr2FbDimm = 0x14\r
1170} EFI_MEMORY_ARRAY_TYPE;\r
1171\r
1172typedef struct {\r
1173 UINT32 Reserved :1;\r
1174 UINT32 Other :1;\r
1175 UINT32 Unknown :1;\r
1176 UINT32 FastPaged :1;\r
1177 UINT32 StaticColumn :1;\r
1178 UINT32 PseudoStatic :1;\r
1179 UINT32 Rambus :1;\r
1180 UINT32 Synchronous :1;\r
1181 UINT32 Cmos :1;\r
1182 UINT32 Edo :1;\r
1183 UINT32 WindowDram :1;\r
1184 UINT32 CacheDram :1;\r
1185 UINT32 Nonvolatile :1;\r
1186 UINT32 Reserved1 :19;\r
1187} EFI_MEMORY_TYPE_DETAIL;\r
1188\r
1189typedef enum {\r
1190 EfiMemoryStateEnabled = 0,\r
1191 EfiMemoryStateUnknown = 1,\r
1192 EfiMemoryStateUnsupported = 2,\r
1193 EfiMemoryStateError = 3,\r
1194 EfiMemoryStateAbsent = 4,\r
1195 EfiMemoryStateDisabled = 5,\r
1196 ///\r
1c2f052d 1197 /// Inconsistent with specification here:\r
f22f941e 1198 /// This field is NOT defined in MemSubClass specification 0.9. It's introduced for SMBIOS2.6 specification.\r
87d63447 1199 ///\r
1200 EfiMemoryStatePartial = 6\r
1201} EFI_MEMORY_STATE;\r
1202\r
1203///\r
1c2f052d 1204/// This data record describes a memory device. This data record is a structure.\r
87d63447 1205/// The type definition structure for EFI_MEMORY_ARRAY_LINK_DATA is in SMBIOS 2.3.4.\r
1206///\r
1207typedef struct {\r
1208 ///\r
1c2f052d 1209 /// A string that identifies the physically labeled socket or board position where the\r
87d63447 1210 /// memory device is located.\r
1211 ///\r
1212 STRING_REF MemoryDeviceLocator;\r
1213 ///\r
1c2f052d 1214 /// A string denoting the physically labeled bank where the memory device is located.\r
87d63447 1215 ///\r
1216 STRING_REF MemoryBankLocator;\r
1217 ///\r
1c2f052d
LG		 1218 /// A string denoting the memory manufacturer.\r
1219 ///\r
87d63447 1220 STRING_REF MemoryManufacturer;\r
1221 ///\r
1c2f052d 1222 /// A string denoting the serial number of the memory device.\r
87d63447 1223 ///\r
1224 STRING_REF MemorySerialNumber;\r
1225 ///\r
1c2f052d 1226 /// The asset tag of the memory device.\r
87d63447 1227 ///\r
1228 STRING_REF MemoryAssetTag;\r
1229 ///\r
1c2f052d 1230 /// A string denoting the part number of the memory device.\r
87d63447 1231 ///\r
1232 STRING_REF MemoryPartNumber;\r
1233 ///\r
1c2f052d 1234 /// A link to a memory array structure set.\r
87d63447 1235 ///\r
1236 EFI_INTER_LINK_DATA MemoryArrayLink;\r
1237 ///\r
1238 /// A link to a memory array structure set.\r
1239 ///\r
1240 EFI_INTER_LINK_DATA MemorySubArrayLink;\r
1241 ///\r
1c2f052d
LG		 1242 /// The total width in bits of this memory device. If there are no error correcting bits,\r
1243 /// then the total width equals the data width. If the width is unknown, then set the field\r
1244 /// to 0xFFFF.\r
87d63447 1245 ///\r
1246 UINT16 MemoryTotalWidth;\r
1247 ///\r
1c2f052d
LG		 1248 /// The data width in bits of the memory device. A data width of 0x00 and a total width\r
1249 /// of 0x08 indicate that the device is used solely for error correction.\r
87d63447 1250 ///\r
1251 UINT16 MemoryDataWidth;\r
1252 ///\r
1c2f052d 1253 /// The size in bytes of the memory device. A value of 0x00 denotes that no device is\r
87d63447 1254 /// installed, while a value of all Fs denotes that the size is not known.\r
1255 ///\r
1256 EFI_EXP_BASE2_DATA MemoryDeviceSize;\r
1257 ///\r
1c2f052d 1258 /// The form factor of the memory device.\r
87d63447 1259 ///\r
1260 EFI_MEMORY_FORM_FACTOR MemoryFormFactor;\r
1261 ///\r
1c2f052d
LG		 1262 /// A memory device set that must be populated with all devices of the same type and\r
1263 /// size. A value of 0x00 indicates that the device is not part of any set. A value of 0xFF\r
1264 /// indicates that the attribute is unknown. Any other value denotes the set number.\r
87d63447 1265 ///\r
1266 UINT8 MemoryDeviceSet;\r
1267 ///\r
1c2f052d 1268 /// The memory type in the socket.\r
87d63447 1269 ///\r
1270 EFI_MEMORY_ARRAY_TYPE MemoryType;\r
1271 ///\r
1c2f052d 1272 /// The memory type details.\r
87d63447 1273 ///\r
1274 EFI_MEMORY_TYPE_DETAIL MemoryTypeDetail;\r
1275 ///\r
1c2f052d 1276 /// The memory speed in megahertz (MHz). A value of 0x00 denotes that\r
87d63447 1277 /// the speed is unknown.\r
1c2f052d
LG		 1278 /// Inconsistent with specification here:\r
1279 /// In MemSubclass specification 0.9, the naming is MemoryTypeSpeed.\r
1280 /// Keep it unchanged for backward compatibilty.\r
1281 ///\r
87d63447 1282 EFI_EXP_BASE10_DATA MemorySpeed;\r
1283 ///\r
1c2f052d 1284 /// The memory state.\r
87d63447 1285 ///\r
1286 EFI_MEMORY_STATE MemoryState;\r
1287} EFI_MEMORY_ARRAY_LINK_DATA;\r
1288\r
1289\r
1290#define EFI_MEMORY_ARRAY_START_ADDRESS_RECORD_NUMBER 0x00000004\r
1291\r
1292///\r
1c2f052d
LG		 1293/// This data record refers to a specified physical memory array associated with\r
1294/// a given memory range.\r
1295///\r
87d63447 1296typedef struct {\r
1297 ///\r
1c2f052d
LG		 1298 /// The starting physical address in bytes of memory mapped to a specified physical\r
1299 /// memory array.\r
87d63447 1300 ///\r
1301 EFI_PHYSICAL_ADDRESS MemoryArrayStartAddress;\r
1302 ///\r
1c2f052d
LG		 1303 /// The last physical address in bytes of memory mapped to a specified physical memory\r
1304 /// array.\r
87d63447 1305 ///\r
1306 EFI_PHYSICAL_ADDRESS MemoryArrayEndAddress;\r
1307 ///\r
1308 /// See Physical Memory Array (Type 16) for physical memory array structures.\r
1309 ///\r
1310 EFI_INTER_LINK_DATA PhysicalMemoryArrayLink;\r
1311 ///\r
1c2f052d
LG		 1312 /// The number of memory devices that form a single row of memory for the address\r
1313 /// partition.\r
87d63447 1314 ///\r
1315 UINT16 MemoryArrayPartitionWidth;\r
1316} EFI_MEMORY_ARRAY_START_ADDRESS_DATA;\r
1317\r
1318\r
1319#define EFI_MEMORY_DEVICE_START_ADDRESS_RECORD_NUMBER 0x00000005\r
1320\r
1321///\r
1c2f052d 1322/// This data record refers to a physical memory device that is associated with\r
87d63447 1323/// a given memory range.\r
1c2f052d 1324///\r
87d63447 1325typedef struct {\r
1326 ///\r
1c2f052d 1327 /// The starting physical address that is associated with the device.\r
87d63447 1328 ///\r
1329 EFI_PHYSICAL_ADDRESS MemoryDeviceStartAddress;\r
1330 ///\r
1c2f052d 1331 /// The ending physical address that is associated with the device.\r
87d63447 1332 ///\r
1333 EFI_PHYSICAL_ADDRESS MemoryDeviceEndAddress;\r
1334 ///\r
1c2f052d 1335 /// A link to the memory device data structure.\r
87d63447 1336 ///\r
1337 EFI_INTER_LINK_DATA PhysicalMemoryDeviceLink;\r
1c2f052d
LG		 1338 ///\r
1339 /// A link to the memory array data structure.\r
87d63447 1340 ///\r
1341 EFI_INTER_LINK_DATA PhysicalMemoryArrayLink;\r
1342 ///\r
1c2f052d
LG		 1343 /// The position of the memory device in a row. A value of 0x00 is reserved and a value\r
1344 /// of 0xFF indicates that the position is unknown.\r
87d63447 1345 ///\r
1346 UINT8 MemoryDevicePartitionRowPosition;\r
1347 ///\r
1c2f052d 1348 /// The position of the device in an interleave.\r
87d63447 1349 ///\r
1350 UINT8 MemoryDeviceInterleavePosition;\r
1351 ///\r
1c2f052d
LG		 1352 /// The maximum number of consecutive rows from the device that are accessed in a\r
1353 /// single interleave transfer. A value of 0x00 indicates that the device is not interleaved\r
1354 /// and a value of 0xFF indicates that the interleave configuration is unknown.\r
87d63447 1355 ///\r
1356 UINT8 MemoryDeviceInterleaveDataDepth;\r
1357} EFI_MEMORY_DEVICE_START_ADDRESS_DATA;\r
1358\r
1359\r
1360//\r
1361// Memory. Channel Device Type - SMBIOS Type 37\r
1362//\r
1363\r
1364#define EFI_MEMORY_CHANNEL_TYPE_RECORD_NUMBER 0x00000006\r
1365\r
1366typedef enum _EFI_MEMORY_CHANNEL_TYPE {\r
1367 EfiMemoryChannelTypeOther = 1,\r
1368 EfiMemoryChannelTypeUnknown = 2,\r
1369 EfiMemoryChannelTypeRambus = 3,\r
1370 EfiMemoryChannelTypeSyncLink = 4\r
1371} EFI_MEMORY_CHANNEL_TYPE;\r
1372\r
1373///\r
1c2f052d
LG		 1374/// This data record refers the type of memory that is associated with the channel. This data record is a\r
1375/// structure.\r
1376/// The type definition structure for EFI_MEMORY_CHANNEL_TYPE_DATA is in SMBIOS 2.3.4,\r
1377/// Table 3.3.38, Type 37, with the following offsets:\r
1378/// - Offset 0x4\r
1379/// - Offset 0x5\r
87d63447 1380/// - Offset 0x6\r
1c2f052d 1381///\r
87d63447 1382typedef struct {\r
1383 ///\r
1c2f052d
LG		 1384 /// The type of memory that is associated with the channel.\r
1385 ///\r
87d63447 1386 EFI_MEMORY_CHANNEL_TYPE MemoryChannelType;\r
1387 ///\r
1388 /// The maximum load that is supported by the channel.\r
1389 ///\r
1390 UINT8 MemoryChannelMaximumLoad;\r
1391 ///\r
1c2f052d 1392 /// The number of memory devices on this channel.\r
87d63447 1393 ///\r
1394 UINT8 MemoryChannelDeviceCount;\r
1395} EFI_MEMORY_CHANNEL_TYPE_DATA;\r
1396\r
1397#define EFI_MEMORY_CHANNEL_DEVICE_RECORD_NUMBER 0x00000007\r
1398\r
1399///\r
1c2f052d
LG		 1400/// This data record refers to the memory device that is associated with the memory channel. This data\r
1401/// record is a structure.\r
1402/// The type definition structure for EFI_MEMORY_CHANNEL_DEVICE_DATA is in SMBIOS 2.3.4,\r
1403/// Table 3.3.38, Type 37, with the following offsets:\r
1404/// - Offset 0x7\r
87d63447 1405/// - Offset 0x8\r
1406///\r
1407typedef struct {\r
1408 ///\r
1c2f052d
LG		 1409 /// A number between one and MemoryChannelDeviceCount plus an arbitrary base.\r
1410 ///\r
87d63447 1411 UINT8 DeviceId;\r
1412 ///\r
1c2f052d
LG		 1413 /// The Link of the associated memory device. See Memory Device (Type 17) for\r
1414 /// memory devices.\r
87d63447 1415 ///\r
1416 EFI_INTER_LINK_DATA DeviceLink;\r
1417 ///\r
1c2f052d 1418 /// The number of load units that this device consumes.\r
87d63447 1419 ///\r
1420 UINT8 MemoryChannelDeviceLoad;\r
1421} EFI_MEMORY_CHANNEL_DEVICE_DATA;\r
1422\r
1423//\r
1424// Memory. Controller Information - SMBIOS Type 5\r
1425//\r
1426///\r
1c2f052d 1427/// Inconsistent with specification here:\r
f22f941e 1428/// In MemSubclass specification 0.9, the following data structures are NOT defined.\r
87d63447 1429/// It's introduced for SmBios 2.6 type 5.\r
1430///\r
1431#define EFI_MEMORY_CONTROLLER_INFORMATION_RECORD_NUMBER 0x00000008\r
1432\r
1433///\r
1c2f052d 1434/// Inconsistent with specification here:\r
f22f941e 1435/// In MemSubclass specification 0.9, the following data structures are NOT defined.\r
87d63447 1436/// It's introduced for SmBios 2.6 type 5.\r
1437///\r
1c2f052d 1438typedef enum {\r
87d63447 1439 EfiErrorDetectingMethodOther = 1,\r
1440 EfiErrorDetectingMethodUnknown = 2,\r
1441 EfiErrorDetectingMethodNone = 3,\r
1442 EfiErrorDetectingMethodParity = 4,\r
1443 EfiErrorDetectingMethod32Ecc = 5,\r
1444 EfiErrorDetectingMethod64Ecc = 6,\r
1445 EfiErrorDetectingMethod128Ecc = 7,\r
1446 EfiErrorDetectingMethodCrc = 8\r
1447} EFI_MEMORY_ERROR_DETECT_METHOD_TYPE;\r
1448\r
1449///\r
1c2f052d 1450/// Inconsistent with specification here:\r
f22f941e 1451/// In MemSubclass specification 0.9, the following data structures are NOT defined.\r
87d63447 1452/// It's introduced for SmBios 2.6 type 5.\r
1453///\r
1454typedef struct {\r
1455 UINT8 Other :1;\r
1456 UINT8 Unknown :1;\r
1457 UINT8 None :1;\r
1458 UINT8 SingleBitErrorCorrect :1;\r
1459 UINT8 DoubleBitErrorCorrect :1;\r
1460 UINT8 ErrorScrubbing :1;\r
1461 UINT8 Reserved :2;\r
1462} EFI_MEMORY_ERROR_CORRECT_CAPABILITY;\r
1463\r
1464///\r
1c2f052d 1465/// Inconsistent with specification here:\r
f22f941e 1466/// In MemSubclass specification 0.9, the following data structures are NOT defined.\r
87d63447 1467/// It's introduced for SmBios 2.6 type 5.\r
1468///\r
1c2f052d 1469typedef enum {\r
87d63447 1470 EfiMemoryInterleaveOther = 1,\r
1471 EfiMemoryInterleaveUnknown = 2,\r
1472 EfiMemoryInterleaveOneWay = 3,\r
1473 EfiMemoryInterleaveTwoWay = 4,\r
1474 EfiMemoryInterleaveFourWay = 5,\r
1475 EfiMemoryInterleaveEightWay = 6,\r
1476 EfiMemoryInterleaveSixteenWay = 7\r
1477} EFI_MEMORY_SUPPORT_INTERLEAVE_TYPE;\r
1478\r
1479///\r
1c2f052d 1480/// Inconsistent with specification here:\r
f22f941e 1481/// In MemSubclass specification 0.9, the following data structures are NOT defined.\r
87d63447 1482/// It's introduced for SmBios 2.6 type 5.\r
1483///\r
1484typedef struct {\r
1485 UINT16 Other :1;\r
1486 UINT16 Unknown :1;\r
1487 UINT16 SeventyNs:1;\r
1488 UINT16 SixtyNs :1;\r
1489 UINT16 FiftyNs :1;\r
1490 UINT16 Reserved :11;\r
1491} EFI_MEMORY_SPEED_TYPE;\r
1492\r
1493///\r
1c2f052d 1494/// Inconsistent with specification here:\r
f22f941e 1495/// In MemSubclass specification 0.9, the following data structures are NOT defined.\r
87d63447 1496/// It's introduced for SmBios 2.6 type 5.\r
1497///\r
1498typedef struct {\r
1499 UINT16 Other :1;\r
1500 UINT16 Unknown :1;\r
1501 UINT16 Standard :1;\r
1502 UINT16 FastPageMode:1;\r
1503 UINT16 EDO :1;\r
1504 UINT16 Parity :1;\r
1505 UINT16 ECC :1;\r
1506 UINT16 SIMM :1;\r
1507 UINT16 DIMM :1;\r
1508 UINT16 BurstEdo :1;\r
1509 UINT16 SDRAM :1;\r
1510 UINT16 Reserved :5;\r
1511} EFI_MEMORY_SUPPORTED_TYPE;\r
1512\r
1513///\r
1c2f052d 1514/// Inconsistent with specification here:\r
f22f941e 1515/// In MemSubclass specification 0.9, the following data structures are NOT defined.\r
87d63447 1516/// It's introduced for SmBios 2.6 type 5.\r
1517///\r
1518typedef struct {\r
1519 UINT8 Five :1;\r
1520 UINT8 Three :1;\r
1521 UINT8 Two :1;\r
1522 UINT8 Reserved:5;\r
1523} EFI_MEMORY_MODULE_VOLTAGE_TYPE;\r
1524\r
1525///\r
1526/// EFI_MEMORY_CONTROLLER_INFORMATION is obsolete\r
1527/// Use EFI_MEMORY_CONTROLLER_INFORMATION_DATA instead\r
1528///\r
1c2f052d 1529/// Inconsistent with specification here:\r
f22f941e 1530/// In MemSubclass specification 0.9, the following data structures are NOT defined.\r
87d63447 1531/// It's introduced for SmBios 2.6 type 5.\r
1532///\r
1533typedef struct {\r
1534 EFI_MEMORY_ERROR_DETECT_METHOD_TYPE ErrorDetectingMethod;\r
1535 EFI_MEMORY_ERROR_CORRECT_CAPABILITY ErrorCorrectingCapability;\r
1536 EFI_MEMORY_SUPPORT_INTERLEAVE_TYPE MemorySupportedInterleave;\r
1537 EFI_MEMORY_SUPPORT_INTERLEAVE_TYPE MemoryCurrentInterleave;\r
1538 UINT8 MaxMemoryModuleSize;\r
1539 EFI_MEMORY_SPEED_TYPE MemorySpeedType;\r
1540 EFI_MEMORY_SUPPORTED_TYPE MemorySupportedType;\r
1541 EFI_MEMORY_MODULE_VOLTAGE_TYPE MemoryModuleVoltage;\r
1542 UINT8 NumberofMemorySlot;\r
1543 EFI_MEMORY_ERROR_CORRECT_CAPABILITY EnabledCorrectingCapability;\r
1544 UINT16 *MemoryModuleConfigHandles;\r
1545} EFI_MEMORY_CONTROLLER_INFORMATION;\r
1546\r
1547///\r
1c2f052d 1548/// Inconsistent with specification here:\r
f22f941e 1549/// In MemSubclass specification 0.9, the following data structures are NOT defined.\r
87d63447 1550/// It's introduced for SmBios 2.6 type 5.\r
1551///\r
1552typedef struct {\r
1553 EFI_MEMORY_ERROR_DETECT_METHOD_TYPE ErrorDetectingMethod;\r
1554 EFI_MEMORY_ERROR_CORRECT_CAPABILITY ErrorCorrectingCapability;\r
1555 EFI_MEMORY_SUPPORT_INTERLEAVE_TYPE MemorySupportedInterleave;\r
1556 EFI_MEMORY_SUPPORT_INTERLEAVE_TYPE MemoryCurrentInterleave;\r
1557 UINT8 MaxMemoryModuleSize;\r
1558 EFI_MEMORY_SPEED_TYPE MemorySpeedType;\r
1559 EFI_MEMORY_SUPPORTED_TYPE MemorySupportedType;\r
1560 EFI_MEMORY_MODULE_VOLTAGE_TYPE MemoryModuleVoltage;\r
1561 UINT8 NumberofMemorySlot;\r
1562 EFI_MEMORY_ERROR_CORRECT_CAPABILITY EnabledCorrectingCapability;\r
1563 EFI_INTER_LINK_DATA MemoryModuleConfig[1];\r
1564} EFI_MEMORY_CONTROLLER_INFORMATION_DATA;\r
1565\r
1566///\r
1567/// Memory. Error Information - SMBIOS Type 18\r
1568///\r
1c2f052d 1569/// Inconsistent with specification here:\r
f22f941e 1570/// In MemSubclass specification 0.9, the following data structures are NOT defined.\r
87d63447 1571/// It's introduced for SmBios 2.6 type 18.\r
1572///\r
1573#define EFI_MEMORY_32BIT_ERROR_INFORMATION_RECORD_NUMBER 0x00000009\r
1574///\r
1c2f052d 1575/// Inconsistent with specification here:\r
f22f941e 1576/// In MemSubclass specification 0.9, the following data structures are NOT defined.\r
87d63447 1577/// It's introduced for SmBios 2.6 type 18.\r
1578///\r
1c2f052d 1579typedef enum {\r
87d63447 1580 EfiMemoryErrorOther = 1,\r
1581 EfiMemoryErrorUnknown = 2,\r
1582 EfiMemoryErrorOk = 3,\r
1583 EfiMemoryErrorBadRead = 4,\r
1584 EfiMemoryErrorParity = 5,\r
1585 EfiMemoryErrorSigleBit = 6,\r
1586 EfiMemoryErrorDoubleBit = 7,\r
1587 EfiMemoryErrorMultiBit = 8,\r
1588 EfiMemoryErrorNibble = 9,\r
1589 EfiMemoryErrorChecksum = 10,\r
1590 EfiMemoryErrorCrc = 11,\r
1591 EfiMemoryErrorCorrectSingleBit = 12,\r
1592 EfiMemoryErrorCorrected = 13,\r
1593 EfiMemoryErrorUnCorrectable = 14\r
1594} EFI_MEMORY_ERROR_TYPE;\r
1595///\r
1c2f052d 1596/// Inconsistent with specification here:\r
f22f941e 1597/// In MemSubclass specification 0.9, the following data structures are NOT defined.\r
87d63447 1598/// It's introduced for SmBios 2.6 type 18.\r
1599///\r
1c2f052d 1600typedef enum {\r
87d63447 1601 EfiMemoryGranularityOther = 1,\r
1602 EfiMemoryGranularityOtherUnknown = 2,\r
1603 EfiMemoryGranularityDeviceLevel = 3,\r
1604 EfiMemoryGranularityMemPartitionLevel = 4\r
1605} EFI_MEMORY_ERROR_GRANULARITY_TYPE;\r
1606///\r
1c2f052d 1607/// Inconsistent with specification here:\r
f22f941e 1608/// In MemSubclass specification 0.9, the following data structures are NOT defined.\r
87d63447 1609/// It's introduced for SmBios 2.6 type 18.\r
1610///\r
1c2f052d 1611typedef enum {\r
87d63447 1612 EfiMemoryErrorOperationOther = 1,\r
1613 EfiMemoryErrorOperationUnknown = 2,\r
1614 EfiMemoryErrorOperationRead = 3,\r
1615 EfiMemoryErrorOperationWrite = 4,\r
1616 EfiMemoryErrorOperationPartialWrite = 5\r
1617} EFI_MEMORY_ERROR_OPERATION_TYPE;\r
1618///\r
1c2f052d 1619/// Inconsistent with specification here:\r
f22f941e 1620/// In MemSubclass specification 0.9, the following data structures are NOT defined.\r
87d63447 1621/// It's introduced for SmBios 2.6 type 18.\r
1622///\r
1623typedef struct {\r
1624 EFI_MEMORY_ERROR_TYPE MemoryErrorType;\r
1625 EFI_MEMORY_ERROR_GRANULARITY_TYPE MemoryErrorGranularity;\r
1626 EFI_MEMORY_ERROR_OPERATION_TYPE MemoryErrorOperation;\r
1627 UINT32 VendorSyndrome;\r
1628 UINT32 MemoryArrayErrorAddress;\r
1629 UINT32 DeviceErrorAddress;\r
1630 UINT32 DeviceErrorResolution;\r
1631} EFI_MEMORY_32BIT_ERROR_INFORMATION;\r
1632\r
1633///\r
f22f941e 1634/// Memory. Error Information - SMBIOS Type 33.\r
87d63447 1635///\r
1c2f052d 1636/// Inconsistent with specification here:\r
f22f941e 1637/// In MemSubclass specification 0.9, the following data structures are NOT defined.\r
87d63447 1638/// It's introduced for SmBios 2.6 type 33.\r
1639///\r
1640#define EFI_MEMORY_64BIT_ERROR_INFORMATION_RECORD_NUMBER 0x0000000A\r
1641\r
1642///\r
1c2f052d 1643/// Inconsistent with specification here:\r
f22f941e 1644/// In MemSubclass specification 0.9, the following data structures are NOT defined.\r
87d63447 1645/// It's introduced for SmBios 2.6 type 33.\r
1646///\r
1647typedef struct {\r
1648 EFI_MEMORY_ERROR_TYPE MemoryErrorType;\r
1649 EFI_MEMORY_ERROR_GRANULARITY_TYPE MemoryErrorGranularity;\r
1650 EFI_MEMORY_ERROR_OPERATION_TYPE MemoryErrorOperation;\r
1651 UINT32 VendorSyndrome;\r
1652 UINT64 MemoryArrayErrorAddress;\r
1653 UINT64 DeviceErrorAddress;\r
1654 UINT32 DeviceErrorResolution;\r
1655} EFI_MEMORY_64BIT_ERROR_INFORMATION;\r
1656\r
1657///\r
1c2f052d 1658/// Inconsistent with specification here:\r
f22f941e 1659/// In MemSubclass specification 0.9, the following data structures are NOT defined.\r
87d63447 1660/// It is implementation-specific to simplify the code logic.\r
1661///\r
1662typedef union _EFI_MEMORY_SUBCLASS_RECORDS {\r
1663 EFI_MEMORY_SIZE_DATA SizeData;\r
1664 EFI_MEMORY_ARRAY_LOCATION_DATA ArrayLocationData;\r
1665 EFI_MEMORY_ARRAY_LINK_DATA ArrayLink;\r
1666 EFI_MEMORY_ARRAY_START_ADDRESS_DATA ArrayStartAddress;\r
1667 EFI_MEMORY_DEVICE_START_ADDRESS_DATA DeviceStartAddress;\r
1668 EFI_MEMORY_CHANNEL_TYPE_DATA ChannelTypeData;\r
1669 EFI_MEMORY_CHANNEL_DEVICE_DATA ChannelDeviceData;\r
1670 EFI_MEMORY_CONTROLLER_INFORMATION MemoryControllerInfo;\r
1671 EFI_MEMORY_32BIT_ERROR_INFORMATION Memory32bitErrorInfo;\r
1672 EFI_MEMORY_64BIT_ERROR_INFORMATION Memory64bitErrorInfo;\r
1673} EFI_MEMORY_SUBCLASS_RECORDS;\r
1674\r
1675typedef struct {\r
1676 EFI_SUBCLASS_TYPE1_HEADER Header;\r
1677 EFI_MEMORY_SUBCLASS_RECORDS Record;\r
1678} EFI_MEMORY_SUBCLASS_DRIVER_DATA;\r
1679\r
1680#define EFI_MISC_SUBCLASS_VERSION 0x0100\r
1681\r
1682#pragma pack(1)\r
1683\r
1684//\r
1685// Last PCI Bus Number\r
1686//\r
1687#define EFI_MISC_LAST_PCI_BUS_RECORD_NUMBER 0x00000001\r
1688\r
1689typedef struct {\r
1690 UINT8 LastPciBus;\r
1691} EFI_MISC_LAST_PCI_BUS_DATA;\r
1692\r
1693//\r
1694// Misc. BIOS Vendor - SMBIOS Type 0\r
1695//\r
1696#define EFI_MISC_BIOS_VENDOR_RECORD_NUMBER 0x00000002\r
1697\r
1698typedef struct {\r
1699 UINT64 Reserved1 :2;\r
1700 UINT64 Unknown :1;\r
1701 UINT64 BiosCharacteristicsNotSupported :1;\r
1702 UINT64 IsaIsSupported :1;\r
1703 UINT64 McaIsSupported :1;\r
1704 UINT64 EisaIsSupported :1;\r
1705 UINT64 PciIsSupported :1;\r
1706 UINT64 PcmciaIsSupported :1;\r
1707 UINT64 PlugAndPlayIsSupported :1;\r
1708 UINT64 ApmIsSupported :1;\r
1709 UINT64 BiosIsUpgradable :1;\r
1710 UINT64 BiosShadowingAllowed :1;\r
1711 UINT64 VlVesaIsSupported :1;\r
1712 UINT64 EscdSupportIsAvailable :1;\r
1713 UINT64 BootFromCdIsSupported :1;\r
1714 UINT64 SelectableBootIsSupported :1;\r
1715 UINT64 RomBiosIsSocketed :1;\r
1716 UINT64 BootFromPcmciaIsSupported :1;\r
1717 UINT64 EDDSpecificationIsSupported :1;\r
1718 UINT64 JapaneseNecFloppyIsSupported :1;\r
1719 UINT64 JapaneseToshibaFloppyIsSupported :1;\r
1720 UINT64 Floppy525_360IsSupported :1;\r
1721 UINT64 Floppy525_12IsSupported :1;\r
1722 UINT64 Floppy35_720IsSupported :1;\r
1723 UINT64 Floppy35_288IsSupported :1;\r
1724 UINT64 PrintScreenIsSupported :1;\r
1725 UINT64 Keyboard8042IsSupported :1;\r
1726 UINT64 SerialIsSupported :1;\r
1727 UINT64 PrinterIsSupported :1;\r
1728 UINT64 CgaMonoIsSupported :1;\r
1729 UINT64 NecPc98 :1;\r
1730 UINT64 AcpiIsSupported :1;\r
1731 UINT64 UsbLegacyIsSupported :1;\r
1732 UINT64 AgpIsSupported :1;\r
1733 UINT64 I20BootIsSupported :1;\r
1734 UINT64 Ls120BootIsSupported :1;\r
1735 UINT64 AtapiZipDriveBootIsSupported :1;\r
1736 UINT64 Boot1394IsSupported :1;\r
1737 UINT64 SmartBatteryIsSupported :1;\r
1738 UINT64 BiosBootSpecIsSupported :1;\r
1739 UINT64 FunctionKeyNetworkBootIsSupported :1;\r
1740 UINT64 Reserved :22;\r
1741} EFI_MISC_BIOS_CHARACTERISTICS;\r
1742\r
1743typedef struct {\r
1744 UINT64 BiosReserved :16;\r
1745 UINT64 SystemReserved:16;\r
1746 UINT64 Reserved :32;\r
1747} EFI_MISC_BIOS_CHARACTERISTICS_EXTENSION;\r
1748\r
1749typedef struct {\r
1750 STRING_REF BiosVendor;\r
1751 STRING_REF BiosVersion;\r
1752 STRING_REF BiosReleaseDate;\r
1753 EFI_PHYSICAL_ADDRESS BiosStartingAddress;\r
1754 EFI_EXP_BASE2_DATA BiosPhysicalDeviceSize;\r
1755 EFI_MISC_BIOS_CHARACTERISTICS BiosCharacteristics1;\r
1c2f052d 1756 EFI_MISC_BIOS_CHARACTERISTICS_EXTENSION\r
87d63447 1757 BiosCharacteristics2;\r
1758 ///\r
1c2f052d 1759 /// Inconsistent with specification here:\r
f22f941e 1760 /// In MiscSubclass specification 0.9, this data structure and corrsponding fields are NOT defined.\r
1761 /// It's introduced for SmBios 2.6 specification type 0.\r
87d63447 1762 ///\r
1763 UINT8 BiosMajorRelease;\r
1764 ///\r
1c2f052d 1765 /// Inconsistent with specification here:\r
f22f941e 1766 /// In MiscSubclass specification 0.9, this data structure and corrsponding fields are NOT defined.\r
1767 /// It's introduced for SmBios 2.6 specification type 0.\r
87d63447 1768 ///\r
1769 UINT8 BiosMinorRelease;\r
1770 ///\r
1c2f052d 1771 /// Inconsistent with specification here:\r
f22f941e 1772 /// In MiscSubclass specification 0.9, this data structure and corrsponding fields are NOT defined.\r
1773 /// It's introduced for SmBios 2.6 specification type 0.\r
87d63447 1774 ///\r
1775 UINT8 BiosEmbeddedFirmwareMajorRelease;\r
1776 ///\r
1c2f052d 1777 /// Inconsistent with specification here:\r
f22f941e 1778 /// In MiscSubclass specification 0.9, this data structure and corrsponding fields are NOT defined.\r
1779 /// It's introduced for SmBios 2.6 specification type 0.\r
87d63447 1780 ///\r
1781 UINT8 BiosEmbeddedFirmwareMinorRelease;\r
1782} EFI_MISC_BIOS_VENDOR_DATA;\r
1783\r
1784//\r
1785// Misc. System Manufacturer - SMBIOS Type 1\r
1786//\r
1787#define EFI_MISC_SYSTEM_MANUFACTURER_RECORD_NUMBER 0x00000003\r
1788\r
1789typedef enum {\r
1790 EfiSystemWakeupTypeReserved = 0,\r
1791 EfiSystemWakeupTypeOther = 1,\r
1792 EfiSystemWakeupTypeUnknown = 2,\r
1793 EfiSystemWakeupTypeApmTimer = 3,\r
1794 EfiSystemWakeupTypeModemRing = 4,\r
1795 EfiSystemWakeupTypeLanRemote = 5,\r
1796 EfiSystemWakeupTypePowerSwitch = 6,\r
1797 EfiSystemWakeupTypePciPme = 7,\r
1798 EfiSystemWakeupTypeAcPowerRestored = 8\r
1799} EFI_MISC_SYSTEM_WAKEUP_TYPE;\r
1800\r
1801typedef struct {\r
1802 STRING_REF SystemManufacturer;\r
1803 STRING_REF SystemProductName;\r
1804 STRING_REF SystemVersion;\r
1805 STRING_REF SystemSerialNumber;\r
1806 EFI_GUID SystemUuid;\r
1807 EFI_MISC_SYSTEM_WAKEUP_TYPE SystemWakeupType;\r
1808 ///\r
1c2f052d 1809 /// Inconsistent with specification here:\r
f22f941e 1810 /// In MiscSubclass specification 0.9, this data structure and corrsponding fields are NOT defined.\r
1811 /// It's introduced for SmBios 2.6 specification type 1.\r
87d63447 1812 ///\r
1813 STRING_REF SystemSKUNumber;\r
1814 ///\r
1c2f052d 1815 /// Inconsistent with specification here:\r
f22f941e 1816 /// In MiscSubclass specification 0.9, this data structure and corrsponding fields are NOT defined.\r
1817 /// It's introduced for SmBios 2.6 specification type 1.\r
87d63447 1818 ///\r
1819 STRING_REF SystemFamily;\r
1820} EFI_MISC_SYSTEM_MANUFACTURER_DATA;\r
1821\r
1822//\r
1823// Misc. Base Board Manufacturer - SMBIOS Type 2\r
1824//\r
1825#define EFI_MISC_BASE_BOARD_MANUFACTURER_RECORD_NUMBER 0x00000004\r
1826\r
1827typedef struct {\r
1828 UINT32 Motherboard :1;\r
1829 UINT32 RequiresDaughterCard :1;\r
1830 UINT32 Removable :1;\r
1831 UINT32 Replaceable :1;\r
1832 UINT32 HotSwappable :1;\r
1833 UINT32 Reserved :27;\r
1834} EFI_BASE_BOARD_FEATURE_FLAGS;\r
1835\r
1836typedef enum {\r
1837 EfiBaseBoardTypeUnknown = 1,\r
1838 EfiBaseBoardTypeOther = 2,\r
1839 EfiBaseBoardTypeServerBlade = 3,\r
1840 EfiBaseBoardTypeConnectivitySwitch = 4,\r
1841 EfiBaseBoardTypeSystemManagementModule = 5,\r
1842 EfiBaseBoardTypeProcessorModule = 6,\r
1843 EfiBaseBoardTypeIOModule = 7,\r
1844 EfiBaseBoardTypeMemoryModule = 8,\r
1845 EfiBaseBoardTypeDaughterBoard = 9,\r
1846 EfiBaseBoardTypeMotherBoard = 0xA,\r
1847 EfiBaseBoardTypeProcessorMemoryModule = 0xB,\r
1848 EfiBaseBoardTypeProcessorIOModule = 0xC,\r
1849 EfiBaseBoardTypeInterconnectBoard = 0xD\r
1850} EFI_BASE_BOARD_TYPE;\r
1851\r
1852typedef struct {\r
1853 STRING_REF BaseBoardManufacturer;\r
1854 STRING_REF BaseBoardProductName;\r
1855 STRING_REF BaseBoardVersion;\r
1856 STRING_REF BaseBoardSerialNumber;\r
1857 STRING_REF BaseBoardAssetTag;\r
1858 STRING_REF BaseBoardChassisLocation;\r
1859 EFI_BASE_BOARD_FEATURE_FLAGS BaseBoardFeatureFlags;\r
1860 EFI_BASE_BOARD_TYPE BaseBoardType;\r
1861 EFI_INTER_LINK_DATA BaseBoardChassisLink;\r
1862 UINT32 BaseBoardNumberLinks;\r
1863 EFI_INTER_LINK_DATA LinkN;\r
1864} EFI_MISC_BASE_BOARD_MANUFACTURER_DATA;\r
1865\r
1866//\r
1867// Misc. System/Chassis Enclosure - SMBIOS Type 3\r
1868//\r
1869#define EFI_MISC_CHASSIS_MANUFACTURER_RECORD_NUMBER 0x00000005\r
1870\r
1871typedef enum {\r
1872 EfiMiscChassisTypeOther = 0x1,\r
1873 EfiMiscChassisTypeUnknown = 0x2,\r
1874 EfiMiscChassisTypeDeskTop = 0x3,\r
1875 EfiMiscChassisTypeLowProfileDesktop = 0x4,\r
1876 EfiMiscChassisTypePizzaBox = 0x5,\r
1877 EfiMiscChassisTypeMiniTower = 0x6,\r
1878 EfiMiscChassisTypeTower = 0x7,\r
1879 EfiMiscChassisTypePortable = 0x8,\r
1880 EfiMiscChassisTypeLapTop = 0x9,\r
1881 EfiMiscChassisTypeNotebook = 0xA,\r
1882 EfiMiscChassisTypeHandHeld = 0xB,\r
1883 EfiMiscChassisTypeDockingStation = 0xC,\r
1884 EfiMiscChassisTypeAllInOne = 0xD,\r
1885 EfiMiscChassisTypeSubNotebook = 0xE,\r
1886 EfiMiscChassisTypeSpaceSaving = 0xF,\r
1887 EfiMiscChassisTypeLunchBox = 0x10,\r
1888 EfiMiscChassisTypeMainServerChassis = 0x11,\r
1889 EfiMiscChassisTypeExpansionChassis = 0x12,\r
1890 EfiMiscChassisTypeSubChassis = 0x13,\r
1891 EfiMiscChassisTypeBusExpansionChassis = 0x14,\r
1892 EfiMiscChassisTypePeripheralChassis = 0x15,\r
1893 EfiMiscChassisTypeRaidChassis = 0x16,\r
1894 EfiMiscChassisTypeRackMountChassis = 0x17,\r
1895 EfiMiscChassisTypeSealedCasePc = 0x18,\r
1896 EfiMiscChassisMultiSystemChassis = 0x19\r
1897} EFI_MISC_CHASSIS_TYPE;\r
1898\r
1899typedef struct {\r
1900 ///\r
1c2f052d 1901 /// Inconsistent with specification here:\r
f22f941e 1902 /// In MiscSubclass 0.9 specification, it has the incorrect field name "EFI_MISC_CHASSIS_TYPE".\r
87d63447 1903 /// Change it to "ChassisType" to pass build.\r
1904 ///\r
1905 UINT32 ChassisType :16;\r
1906 UINT32 ChassisLockPresent:1;\r
1907 UINT32 Reserved :15;\r
1908} EFI_MISC_CHASSIS_STATUS;\r
1909\r
1910typedef enum {\r
1911 EfiChassisStateOther = 0x01,\r
1912 EfiChassisStateUnknown = 0x02,\r
1913 EfiChassisStateSafe = 0x03,\r
1914 EfiChassisStateWarning = 0x04,\r
1915 EfiChassisStateCritical = 0x05,\r
1916 EfiChassisStateNonRecoverable = 0x06\r
1917} EFI_MISC_CHASSIS_STATE;\r
1918\r
1919typedef enum {\r
1920 EfiChassisSecurityStatusOther = 0x01,\r
1921 EfiChassisSecurityStatusUnknown = 0x02,\r
1922 EfiChassisSecurityStatusNone = 0x03,\r
1923 EfiChassisSecurityStatusExternalInterfaceLockedOut = 0x04,\r
1924 EfiChassisSecurityStatusExternalInterfaceLockedEnabled = 0x05\r
1925} EFI_MISC_CHASSIS_SECURITY_STATE;\r
1926\r
1927typedef struct {\r
1928 UINT32 RecordType :1;\r
1929 UINT32 Type :7;\r
1930 UINT32 Reserved :24;\r
1931} EFI_MISC_ELEMENT_TYPE;\r
1932\r
1933typedef struct {\r
1934 EFI_MISC_ELEMENT_TYPE ChassisElementType;\r
1935 EFI_INTER_LINK_DATA ChassisElementStructure;\r
1936 EFI_BASE_BOARD_TYPE ChassisBaseBoard;\r
1937 UINT32 ChassisElementMinimum;\r
1938 UINT32 ChassisElementMaximum;\r
1939} EFI_MISC_ELEMENTS;\r
1940\r
1941typedef struct {\r
1942 STRING_REF ChassisManufacturer;\r
1943 STRING_REF ChassisVersion;\r
1944 STRING_REF ChassisSerialNumber;\r
1945 STRING_REF ChassisAssetTag;\r
1946 EFI_MISC_CHASSIS_STATUS ChassisType;\r
1947 EFI_MISC_CHASSIS_STATE ChassisBootupState;\r
1948 EFI_MISC_CHASSIS_STATE ChassisPowerSupplyState;\r
1949 EFI_MISC_CHASSIS_STATE ChassisThermalState;\r
1950 EFI_MISC_CHASSIS_SECURITY_STATE ChassisSecurityState;\r
1951 UINT32 ChassisOemDefined;\r
1952 UINT32 ChassisHeight;\r
1953 UINT32 ChassisNumberPowerCords;\r
1954 UINT32 ChassisElementCount;\r
1955 UINT32 ChassisElementRecordLength;\r
1956 EFI_MISC_ELEMENTS ChassisElements;\r
1957} EFI_MISC_CHASSIS_MANUFACTURER_DATA;\r
1958\r
1959//\r
1960// Misc. Port Connector Information - SMBIOS Type 8\r
1961//\r
1962#define EFI_MISC_PORT_INTERNAL_CONNECTOR_DESIGNATOR_RECORD_NUMBER 0x00000006\r
1963\r
1964typedef enum {\r
1965 EfiPortConnectorTypeNone = 0x00,\r
1966 EfiPortConnectorTypeCentronics = 0x01,\r
1967 EfiPortConnectorTypeMiniCentronics = 0x02,\r
1968 EfiPortConnectorTypeProprietary = 0x03,\r
1969 EfiPortConnectorTypeDB25Male = 0x04,\r
1970 EfiPortConnectorTypeDB25Female = 0x05,\r
1971 EfiPortConnectorTypeDB15Male = 0x06,\r
1972 EfiPortConnectorTypeDB15Female = 0x07,\r
1973 EfiPortConnectorTypeDB9Male = 0x08,\r
1974 EfiPortConnectorTypeDB9Female = 0x09,\r
1975 EfiPortConnectorTypeRJ11 = 0x0A,\r
1976 EfiPortConnectorTypeRJ45 = 0x0B,\r
1977 EfiPortConnectorType50PinMiniScsi = 0x0C,\r
1978 EfiPortConnectorTypeMiniDin = 0x0D,\r
1979 EfiPortConnectorTypeMicriDin = 0x0E,\r
1980 EfiPortConnectorTypePS2 = 0x0F,\r
1981 EfiPortConnectorTypeInfrared = 0x10,\r
1982 EfiPortConnectorTypeHpHil = 0x11,\r
1983 EfiPortConnectorTypeUsb = 0x12,\r
1984 EfiPortConnectorTypeSsaScsi = 0x13,\r
1985 EfiPortConnectorTypeCircularDin8Male = 0x14,\r
1986 EfiPortConnectorTypeCircularDin8Female = 0x15,\r
1987 EfiPortConnectorTypeOnboardIde = 0x16,\r
1988 EfiPortConnectorTypeOnboardFloppy = 0x17,\r
1989 EfiPortConnectorType9PinDualInline = 0x18,\r
1990 EfiPortConnectorType25PinDualInline = 0x19,\r
1991 EfiPortConnectorType50PinDualInline = 0x1A,\r
1992 EfiPortConnectorType68PinDualInline = 0x1B,\r
1993 EfiPortConnectorTypeOnboardSoundInput = 0x1C,\r
1994 EfiPortConnectorTypeMiniCentronicsType14 = 0x1D,\r
1995 EfiPortConnectorTypeMiniCentronicsType26 = 0x1E,\r
1996 EfiPortConnectorTypeHeadPhoneMiniJack = 0x1F,\r
1997 EfiPortConnectorTypeBNC = 0x20,\r
1998 EfiPortConnectorType1394 = 0x21,\r
1999 EfiPortConnectorTypePC98 = 0xA0,\r
2000 EfiPortConnectorTypePC98Hireso = 0xA1,\r
2001 EfiPortConnectorTypePCH98 = 0xA2,\r
2002 EfiPortConnectorTypePC98Note = 0xA3,\r
2003 EfiPortConnectorTypePC98Full = 0xA4,\r
2004 EfiPortConnectorTypeOther = 0xFF\r
2005} EFI_MISC_PORT_CONNECTOR_TYPE;\r
2006\r
2007typedef enum {\r
2008 EfiPortTypeNone = 0x00,\r
2009 EfiPortTypeParallelXtAtCompatible = 0x01,\r
2010 EfiPortTypeParallelPortPs2 = 0x02,\r
2011 EfiPortTypeParallelPortEcp = 0x03,\r
2012 EfiPortTypeParallelPortEpp = 0x04,\r
2013 EfiPortTypeParallelPortEcpEpp = 0x05,\r
2014 EfiPortTypeSerialXtAtCompatible = 0x06,\r
2015 EfiPortTypeSerial16450Compatible = 0x07,\r
2016 EfiPortTypeSerial16550Compatible = 0x08,\r
2017 EfiPortTypeSerial16550ACompatible = 0x09,\r
2018 EfiPortTypeScsi = 0x0A,\r
2019 EfiPortTypeMidi = 0x0B,\r
2020 EfiPortTypeJoyStick = 0x0C,\r
2021 EfiPortTypeKeyboard = 0x0D,\r
2022 EfiPortTypeMouse = 0x0E,\r
2023 EfiPortTypeSsaScsi = 0x0F,\r
2024 EfiPortTypeUsb = 0x10,\r
2025 EfiPortTypeFireWire = 0x11,\r
2026 EfiPortTypePcmciaTypeI = 0x12,\r
2027 EfiPortTypePcmciaTypeII = 0x13,\r
2028 EfiPortTypePcmciaTypeIII = 0x14,\r
2029 EfiPortTypeCardBus = 0x15,\r
2030 EfiPortTypeAccessBusPort = 0x16,\r
2031 EfiPortTypeScsiII = 0x17,\r
2032 EfiPortTypeScsiWide = 0x18,\r
2033 EfiPortTypePC98 = 0x19,\r
2034 EfiPortTypePC98Hireso = 0x1A,\r
2035 EfiPortTypePCH98 = 0x1B,\r
2036 EfiPortTypeVideoPort = 0x1C,\r
2037 EfiPortTypeAudioPort = 0x1D,\r
2038 EfiPortTypeModemPort = 0x1E,\r
2039 EfiPortTypeNetworkPort = 0x1F,\r
2040 EfiPortType8251Compatible = 0xA0,\r
2041 EfiPortType8251FifoCompatible = 0xA1,\r
2042 EfiPortTypeOther = 0xFF\r
2043} EFI_MISC_PORT_TYPE;\r
2044\r
2045typedef struct {\r
2046 STRING_REF PortInternalConnectorDesignator;\r
2047 STRING_REF PortExternalConnectorDesignator;\r
2048 EFI_MISC_PORT_CONNECTOR_TYPE PortInternalConnectorType;\r
2049 EFI_MISC_PORT_CONNECTOR_TYPE PortExternalConnectorType;\r
2050 EFI_MISC_PORT_TYPE PortType;\r
ef73b4a8 2051 ///\r
1c2f052d 2052 /// Inconsistent with specification here:\r
f22f941e 2053 /// In MiscSubclass specification 0.9, this type of field is defined as EFI_DEVICE_PATH_PROTOCOL,\r
1c2f052d 2054 /// which causes the implementation some complexity. Keep it unchanged for backward\r
ef73b4a8 2055 /// compatibility.\r
2056 ///\r
87d63447 2057 EFI_MISC_PORT_DEVICE_PATH PortPath;\r
2058} EFI_MISC_PORT_INTERNAL_CONNECTOR_DESIGNATOR_DATA;\r
2059\r
2060//\r
2061// Misc. System Slots - SMBIOS Type 9\r
2062//\r
2063#define EFI_MISC_SYSTEM_SLOT_DESIGNATION_RECORD_NUMBER 0x00000007\r
2064\r
2065typedef enum {\r
2066 EfiSlotTypeOther = 0x01,\r
2067 EfiSlotTypeUnknown = 0x02,\r
2068 EfiSlotTypeIsa = 0x03,\r
2069 EfiSlotTypeMca = 0x04,\r
2070 EfiSlotTypeEisa = 0x05,\r
2071 EfiSlotTypePci = 0x06,\r
2072 EfiSlotTypePcmcia = 0x07,\r
2073 EfiSlotTypeVlVesa = 0x08,\r
2074 EfiSlotTypeProprietary = 0x09,\r
2075 EfiSlotTypeProcessorCardSlot = 0x0A,\r
2076 EfiSlotTypeProprietaryMemoryCardSlot = 0x0B,\r
2077 EfiSlotTypeIORiserCardSlot = 0x0C,\r
2078 EfiSlotTypeNuBus = 0x0D,\r
2079 EfiSlotTypePci66MhzCapable = 0x0E,\r
2080 EfiSlotTypeAgp = 0x0F,\r
2081 ///\r
1c2f052d 2082 /// Inconsistent with specification here:\r
f22f941e 2083 /// In MiscSubclass specification 0.9, its naming should be EfiSlotTypeAgp2X\r
87d63447 2084 /// rather than EfiSlotTypeApg2X.\r
2085 ///\r
2086 EfiSlotTypeAgp2X = 0x10,\r
2087 EfiSlotTypeAgp4X = 0x11,\r
2088 EfiSlotTypePciX = 0x12,\r
2089 EfiSlotTypeAgp8x = 0x13,\r
2090 EfiSlotTypePC98C20 = 0xA0,\r
2091 EfiSlotTypePC98C24 = 0xA1,\r
2092 EfiSlotTypePC98E = 0xA2,\r
2093 EfiSlotTypePC98LocalBus = 0xA3,\r
2094 EfiSlotTypePC98Card = 0xA4,\r
2095 ///\r
1c2f052d 2096 /// Inconsistent with specification here:\r
33d9d834
SZ		 2097 /// In MiscSubclass specification 0.9, these fields aren't defined.\r
2098 /// They're introduced for SmBios 2.6 specification type 9.\r
2099 ///\r
2100 EfiSlotTypePciExpress = 0xA5,\r
2101 EfiSlotTypePciExpressX1 = 0xA6,\r
2102 EfiSlotTypePciExpressX2 = 0xA7,\r
2103 EfiSlotTypePciExpressX4 = 0xA8,\r
2104 EfiSlotTypePciExpressX8 = 0xA9,\r
2105 EfiSlotTypePciExpressX16 = 0xAA\r
87d63447 2106} EFI_MISC_SLOT_TYPE;\r
2107\r
2108typedef enum {\r
2109 EfiSlotDataBusWidthOther = 0x01,\r
2110 EfiSlotDataBusWidthUnknown = 0x02,\r
2111 EfiSlotDataBusWidth8Bit = 0x03,\r
2112 EfiSlotDataBusWidth16Bit = 0x04,\r
2113 EfiSlotDataBusWidth32Bit = 0x05,\r
2114 EfiSlotDataBusWidth64Bit = 0x06,\r
33d9d834
SZ		 2115 EfiSlotDataBusWidth128Bit = 0x07,\r
2116 ///\r
1c2f052d 2117 /// Inconsistent with specification here:\r
33d9d834
SZ		 2118 /// In MiscSubclass specification 0.9, these fields aren't defined.\r
2119 /// They're introduced for SmBios 2.6 specification type 9.\r
2120 ///\r
2121 EfiSlotDataBusWidth1xOrx1 = 0x8,\r
2122 EfiSlotDataBusWidth2xOrx2 = 0x9,\r
2123 EfiSlotDataBusWidth4xOrx4 = 0xA,\r
2124 EfiSlotDataBusWidth8xOrx8 = 0xB,\r
2125 EfiSlotDataBusWidth12xOrx12 = 0xC,\r
2126 EfiSlotDataBusWidth16xOrx16 = 0xD,\r
2127 EfiSlotDataBusWidth32xOrx32 = 0xE\r
87d63447 2128} EFI_MISC_SLOT_DATA_BUS_WIDTH;\r
2129\r
2130typedef enum {\r
2131 EfiSlotUsageOther = 1,\r
2132 EfiSlotUsageUnknown = 2,\r
2133 EfiSlotUsageAvailable = 3,\r
2134 EfiSlotUsageInUse = 4\r
2135} EFI_MISC_SLOT_USAGE;\r
2136\r
2137typedef enum {\r
2138 EfiSlotLengthOther = 1,\r
2139 EfiSlotLengthUnknown = 2,\r
2140 EfiSlotLengthShort = 3,\r
2141 EfiSlotLengthLong = 4\r
2142} EFI_MISC_SLOT_LENGTH;\r
2143\r
2144typedef struct {\r
2145 UINT32 CharacteristicsUnknown :1;\r
2146 UINT32 Provides50Volts :1;\r
2147 UINT32 Provides33Volts :1;\r
2148 UINT32 SharedSlot :1;\r
2149 UINT32 PcCard16Supported :1;\r
2150 UINT32 CardBusSupported :1;\r
2151 UINT32 ZoomVideoSupported :1;\r
2152 UINT32 ModemRingResumeSupported:1;\r
2153 UINT32 PmeSignalSupported :1;\r
2154 UINT32 HotPlugDevicesSupported :1;\r
2155 UINT32 SmbusSignalSupported :1;\r
2156 UINT32 Reserved :21;\r
2157} EFI_MISC_SLOT_CHARACTERISTICS;\r
2158\r
2159typedef struct {\r
2160 STRING_REF SlotDesignation;\r
2161 EFI_MISC_SLOT_TYPE SlotType;\r
2162 EFI_MISC_SLOT_DATA_BUS_WIDTH SlotDataBusWidth;\r
2163 EFI_MISC_SLOT_USAGE SlotUsage;\r
2164 EFI_MISC_SLOT_LENGTH SlotLength;\r
2165 UINT16 SlotId;\r
2166 EFI_MISC_SLOT_CHARACTERISTICS SlotCharacteristics;\r
2167 EFI_DEVICE_PATH_PROTOCOL SlotDevicePath;\r
2168} EFI_MISC_SYSTEM_SLOT_DESIGNATION_DATA;\r
2169\r
2170//\r
2171// Misc. Onboard Device - SMBIOS Type 10\r
2172//\r
2173#define EFI_MISC_ONBOARD_DEVICE_RECORD_NUMBER 0x00000008\r
2174\r
2175typedef enum {\r
2176 EfiOnBoardDeviceTypeOther = 1,\r
2177 EfiOnBoardDeviceTypeUnknown = 2,\r
2178 EfiOnBoardDeviceTypeVideo = 3,\r
2179 EfiOnBoardDeviceTypeScsiController = 4,\r
2180 EfiOnBoardDeviceTypeEthernet = 5,\r
2181 EfiOnBoardDeviceTypeTokenRing = 6,\r
2182 EfiOnBoardDeviceTypeSound = 7\r
2183} EFI_MISC_ONBOARD_DEVICE_TYPE;\r
2184\r
2185typedef struct {\r
2186 UINT32 DeviceType :16;\r
2187 UINT32 DeviceEnabled :1;\r
2188 UINT32 Reserved :15;\r
2189} EFI_MISC_ONBOARD_DEVICE_STATUS;\r
2190\r
2191typedef struct {\r
2192 STRING_REF OnBoardDeviceDescription;\r
2193 ///\r
1c2f052d 2194 /// Inconsistent with specification here:\r
f22f941e 2195 /// In MiscSubclass specification 0.9, the name is OnBoardDeviceType.\r
87d63447 2196 /// Keep it unchanged for backward compatibilty.\r
2197 ///\r
2198 EFI_MISC_ONBOARD_DEVICE_STATUS OnBoardDeviceStatus;\r
2199 EFI_DEVICE_PATH_PROTOCOL OnBoardDevicePath;\r
2200} EFI_MISC_ONBOARD_DEVICE_DATA;\r
2201\r
2202//\r
2203// Misc. BIOS Language Information - SMBIOS Type 11\r
2204//\r
2205#define EFI_MISC_OEM_STRING_RECORD_NUMBER 0x00000009\r
2206\r
2207typedef struct {\r
2208 STRING_REF OemStringRef[1];\r
2209} EFI_MISC_OEM_STRING_DATA;\r
2210\r
2211//\r
2212// Misc. System Options - SMBIOS Type 12\r
2213//\r
2214typedef struct {\r
2215 STRING_REF SystemOptionStringRef[1];\r
2216} EFI_MISC_SYSTEM_OPTION_STRING_DATA;\r
2217\r
2218#define EFI_MISC_SYSTEM_OPTION_STRING_RECORD_NUMBER 0x0000000A\r
2219\r
2220//\r
2221// Misc. Number of Installable Languages - SMBIOS Type 13\r
2222//\r
2223#define EFI_MISC_NUMBER_OF_INSTALLABLE_LANGUAGES_RECORD_NUMBER 0x0000000B\r
2224\r
2225typedef struct {\r
2226 UINT32 AbbreviatedLanguageFormat :1;\r
2227 UINT32 Reserved :31;\r
2228} EFI_MISC_LANGUAGE_FLAGS;\r
2229\r
2230typedef struct {\r
2231 UINT16 NumberOfInstallableLanguages;\r
2232 EFI_MISC_LANGUAGE_FLAGS LanguageFlags;\r
2233 UINT16 CurrentLanguageNumber;\r
2234} EFI_MISC_NUMBER_OF_INSTALLABLE_LANGUAGES_DATA;\r
2235\r
2236//\r
2237// Misc. System Language String\r
2238//\r
2239#define EFI_MISC_SYSTEM_LANGUAGE_STRING_RECORD_NUMBER 0x0000000C\r
2240\r
2241typedef struct {\r
2242 UINT16 LanguageId;\r
2243 STRING_REF SystemLanguageString;\r
2244} EFI_MISC_SYSTEM_LANGUAGE_STRING_DATA;\r
2245\r
2246//\r
2247// Group Associations - SMBIOS Type 14\r
2248//\r
2249#define EFI_MISC_GROUP_NAME_RECORD_NUMBER 0x0000000D\r
2250\r
2251typedef struct {\r
2252 STRING_REF GroupName;\r
2253 UINT16 NumberGroupItems;\r
2254 UINT16 GroupId;\r
2255} EFI_MISC_GROUP_NAME_DATA;\r
2256\r
2257//\r
2258// Group Item Set Element\r
2259//\r
2260#define EFI_MISC_GROUP_ITEM_SET_RECORD_NUMBER 0x0000000E\r
2261\r
2262typedef struct {\r
2263 EFI_GUID SubClass;\r
2264 EFI_INTER_LINK_DATA GroupLink;\r
2265 UINT16 GroupId;\r
2266 UINT16 GroupElementId;\r
2267} EFI_MISC_GROUP_ITEM_SET_DATA;\r
2268\r
2269//\r
2270// Misc. Pointing Device Type - SMBIOS Type 21\r
2271//\r
2272#define EFI_MISC_POINTING_DEVICE_TYPE_RECORD_NUMBER 0x0000000F\r
2273\r
2274typedef enum {\r
2275 EfiPointingDeviceTypeOther = 0x01,\r
2276 EfiPointingDeviceTypeUnknown = 0x02,\r
2277 EfiPointingDeviceTypeMouse = 0x03,\r
2278 EfiPointingDeviceTypeTrackBall = 0x04,\r
2279 EfiPointingDeviceTypeTrackPoint = 0x05,\r
2280 EfiPointingDeviceTypeGlidePoint = 0x06,\r
2281 EfiPointingDeviceTouchPad = 0x07,\r
2282 EfiPointingDeviceTouchScreen = 0x08,\r
2283 EfiPointingDeviceOpticalSensor = 0x09\r
2284} EFI_MISC_POINTING_DEVICE_TYPE;\r
2285\r
2286typedef enum {\r
2287 EfiPointingDeviceInterfaceOther = 0x01,\r
2288 EfiPointingDeviceInterfaceUnknown = 0x02,\r
2289 EfiPointingDeviceInterfaceSerial = 0x03,\r
2290 EfiPointingDeviceInterfacePs2 = 0x04,\r
2291 EfiPointingDeviceInterfaceInfrared = 0x05,\r
2292 EfiPointingDeviceInterfaceHpHil = 0x06,\r
2293 EfiPointingDeviceInterfaceBusMouse = 0x07,\r
2294 EfiPointingDeviceInterfaceADB = 0x08,\r
2295 EfiPointingDeviceInterfaceBusMouseDB9 = 0xA0,\r
2296 EfiPointingDeviceInterfaceBusMouseMicroDin = 0xA1,\r
2297 EfiPointingDeviceInterfaceUsb = 0xA2\r
2298} EFI_MISC_POINTING_DEVICE_INTERFACE;\r
2299\r
2300typedef struct {\r
2301 EFI_MISC_POINTING_DEVICE_TYPE PointingDeviceType;\r
2302 EFI_MISC_POINTING_DEVICE_INTERFACE PointingDeviceInterface;\r
2303 UINT16 NumberPointingDeviceButtons;\r
2304 EFI_DEVICE_PATH_PROTOCOL PointingDevicePath;\r
2305} EFI_MISC_POINTING_DEVICE_TYPE_DATA;\r
2306\r
2307//\r
2308// Portable Battery - SMBIOS Type 22\r
2309//\r
2310///\r
1c2f052d 2311/// Inconsistent with specification here:\r
f22f941e 2312/// In MiscSubclass specification 0.9, the name is EFI_MISC_BATTERY_LOCATION_RECORD_NUMBER.\r
87d63447 2313/// Keep it unchanged for backward compatibilty.\r
2314///\r
2315#define EFI_MISC_PORTABLE_BATTERY_RECORD_NUMBER 0x00000010\r
2316\r
2317///\r
1c2f052d 2318/// Inconsistent with specification here:\r
f22f941e 2319/// In MiscSubclass specification 0.9, the structure name is EFI_MISC_BATTERY_DEVICE_CHEMISTRY.\r
2320/// And all field namings are also different with specification.\r
87d63447 2321/// Keep it unchanged for backward compatibilty.\r
2322///\r
1c2f052d 2323typedef enum {\r
87d63447 2324 EfiPortableBatteryDeviceChemistryOther = 1,\r
2325 EfiPortableBatteryDeviceChemistryUnknown = 2,\r
2326 EfiPortableBatteryDeviceChemistryLeadAcid = 3,\r
2327 EfiPortableBatteryDeviceChemistryNickelCadmium = 4,\r
2328 EfiPortableBatteryDeviceChemistryNickelMetalHydride = 5,\r
2329 EfiPortableBatteryDeviceChemistryLithiumIon = 6,\r
2330 EfiPortableBatteryDeviceChemistryZincAir = 7,\r
2331 EfiPortableBatteryDeviceChemistryLithiumPolymer = 8\r
2332} EFI_MISC_PORTABLE_BATTERY_DEVICE_CHEMISTRY;\r
2333\r
2334///\r
1c2f052d 2335/// Inconsistent with specification here:\r
f22f941e 2336/// In MiscSubclass specification 0.9, the structure name is EFI_MISC_BATTERY_LOCATION_DATA.\r
2337/// Also, the name and the order of the fields vary with specifications.\r
87d63447 2338/// Keep it unchanged for backward compatibilty.\r
2339///\r
2340typedef struct {\r
2341 STRING_REF Location;\r
2342 STRING_REF Manufacturer;\r
2343 STRING_REF ManufactureDate;\r
2344 STRING_REF SerialNumber;\r
2345 STRING_REF DeviceName;\r
1c2f052d 2346 EFI_MISC_PORTABLE_BATTERY_DEVICE_CHEMISTRY\r
87d63447 2347 DeviceChemistry;\r
2348 UINT16 DesignCapacity;\r
2349 UINT16 DesignVoltage;\r
2350 STRING_REF SBDSVersionNumber;\r
2351 UINT8 MaximumError;\r
2352 UINT16 SBDSSerialNumber;\r
2353 UINT16 SBDSManufactureDate;\r
2354 STRING_REF SBDSDeviceChemistry;\r
2355 UINT8 DesignCapacityMultiplier;\r
1c2f052d
LG		 2356 UINT32 OEMSpecific;\r
2357 UINT8 BatteryNumber; // Temporary\r
87d63447 2358 BOOLEAN Valid; // Is entry valid - Temporary\r
2359} EFI_MISC_PORTABLE_BATTERY;\r
2360\r
2361\r
2362//\r
2363// Misc. Reset Capabilities - SMBIOS Type 23\r
2364//\r
2365#define EFI_MISC_RESET_CAPABILITIES_RECORD_NUMBER 0x00000011\r
2366\r
2367typedef struct {\r
2368 UINT32 Status :1;\r
2369 UINT32 BootOption :2;\r
2370 UINT32 BootOptionOnLimit :2;\r
2371 UINT32 WatchdogTimerPresent:1;\r
2372 UINT32 Reserved :26;\r
2373} EFI_MISC_RESET_CAPABILITIES_TYPE;\r
2374\r
2375typedef struct {\r
2376 EFI_MISC_RESET_CAPABILITIES_TYPE ResetCapabilities;\r
2377 UINT16 ResetCount;\r
2378 UINT16 ResetLimit;\r
2379 UINT16 ResetTimerInterval;\r
2380 UINT16 ResetTimeout;\r
2381} EFI_MISC_RESET_CAPABILITIES;\r
2382\r
2383typedef struct {\r
2384 EFI_MISC_RESET_CAPABILITIES ResetCapabilities;\r
2385 UINT16 ResetCount;\r
2386 UINT16 ResetLimit;\r
2387 UINT16 ResetTimerInterval;\r
2388 UINT16 ResetTimeout;\r
2389} EFI_MISC_RESET_CAPABILITIES_DATA;\r
2390\r
2391//\r
2392// Misc. Hardware Security - SMBIOS Type 24\r
2393//\r
2394#define EFI_MISC_HARDWARE_SECURITY_SETTINGS_DATA_RECORD_NUMBER 0x00000012\r
2395\r
2396///\r
1c2f052d 2397/// Inconsistent with specification here:\r
f22f941e 2398/// The MiscSubclass specification 0.9 only mentions the possible value of each field in\r
1c2f052d 2399/// EFI_MISC_HARDWARE_SECURITY_SETTINGS.\r
f22f941e 2400/// It's implementation-specific in order to to simplify the code logic.\r
87d63447 2401///\r
2402typedef enum {\r
2403 EfiHardwareSecurityStatusDisabled = 0,\r
2404 EfiHardwareSecurityStatusEnabled = 1,\r
2405 EfiHardwareSecurityStatusNotImplemented = 2,\r
2406 EfiHardwareSecurityStatusUnknown = 3\r
2407} EFI_MISC_HARDWARE_SECURITY_STATUS;\r
2408\r
2409typedef struct {\r
2410 UINT32 FrontPanelResetStatus :2;\r
2411 UINT32 AdministratorPasswordStatus :2;\r
2412 UINT32 KeyboardPasswordStatus :2;\r
2413 UINT32 PowerOnPasswordStatus :2;\r
2414 UINT32 Reserved :24;\r
2415} EFI_MISC_HARDWARE_SECURITY_SETTINGS;\r
2416\r
2417typedef struct {\r
2418 EFI_MISC_HARDWARE_SECURITY_SETTINGS HardwareSecuritySettings;\r
2419} EFI_MISC_HARDWARE_SECURITY_SETTINGS_DATA;\r
2420\r
2421//\r
2422// System Power Controls - SMBIOS Type 25\r
2423//\r
2424#define EFI_MISC_SCHEDULED_POWER_ON_MONTH_RECORD_NUMBER 0x00000013\r
2425\r
2426typedef struct {\r
2427 UINT16 ScheduledPoweronMonth;\r
2428 UINT16 ScheduledPoweronDayOfMonth;\r
2429 UINT16 ScheduledPoweronHour;\r
2430 UINT16 ScheduledPoweronMinute;\r
2431 UINT16 ScheduledPoweronSecond;\r
2432} EFI_MISC_SCHEDULED_POWER_ON_MONTH_DATA;\r
2433\r
2434//\r
2435// Voltage Probe - SMBIOS Type 26\r
2436//\r
2437#define EFI_MISC_VOLTAGE_PROBE_DESCRIPTION_RECORD_NUMBER 0x00000014\r
2438\r
2439typedef struct {\r
2440 UINT32 VoltageProbeSite :5;\r
2441 UINT32 VoltageProbeStatus :3;\r
2442 UINT32 Reserved :24;\r
2443} EFI_MISC_VOLTAGE_PROBE_LOCATION;\r
2444\r
2445typedef struct {\r
2446 STRING_REF VoltageProbeDescription;\r
2447 EFI_MISC_VOLTAGE_PROBE_LOCATION VoltageProbeLocation;\r
2448 EFI_EXP_BASE10_DATA VoltageProbeMaximumValue;\r
2449 EFI_EXP_BASE10_DATA VoltageProbeMinimumValue;\r
2450 EFI_EXP_BASE10_DATA VoltageProbeResolution;\r
2451 EFI_EXP_BASE10_DATA VoltageProbeTolerance;\r
2452 EFI_EXP_BASE10_DATA VoltageProbeAccuracy;\r
2453 EFI_EXP_BASE10_DATA VoltageProbeNominalValue;\r
2454 EFI_EXP_BASE10_DATA MDLowerNoncriticalThreshold;\r
2455 EFI_EXP_BASE10_DATA MDUpperNoncriticalThreshold;\r
2456 EFI_EXP_BASE10_DATA MDLowerCriticalThreshold;\r
2457 EFI_EXP_BASE10_DATA MDUpperCriticalThreshold;\r
2458 EFI_EXP_BASE10_DATA MDLowerNonrecoverableThreshold;\r
2459 EFI_EXP_BASE10_DATA MDUpperNonrecoverableThreshold;\r
2460 UINT32 VoltageProbeOemDefined;\r
2461} EFI_MISC_VOLTAGE_PROBE_DESCRIPTION_DATA;\r
2462\r
2463//\r
2464// Cooling Device - SMBIOS Type 27\r
2465//\r
2466#define EFI_MISC_COOLING_DEVICE_TEMP_LINK_RECORD_NUMBER 0x00000015\r
2467\r
2468typedef struct {\r
2469 UINT32 CoolingDevice :5;\r
2470 UINT32 CoolingDeviceStatus :3;\r
2471 UINT32 Reserved :24;\r
2472} EFI_MISC_COOLING_DEVICE_TYPE;\r
2473\r
2474typedef struct {\r
2475 EFI_MISC_COOLING_DEVICE_TYPE CoolingDeviceType;\r
2476 EFI_INTER_LINK_DATA CoolingDeviceTemperatureLink;\r
4eb56285 2477 UINT8 CoolingDeviceUnitGroup;\r
2478 UINT16 CoolingDeviceNominalSpeed;\r
87d63447 2479 UINT32 CoolingDeviceOemDefined;\r
2480} EFI_MISC_COOLING_DEVICE_TEMP_LINK_DATA;\r
2481\r
2482//\r
2483// Temperature Probe - SMBIOS Type 28\r
2484//\r
2485#define EFI_MISC_TEMPERATURE_PROBE_DESCRIPTION_RECORD_NUMBER 0x00000016\r
2486\r
2487typedef struct {\r
2488 UINT32 TemperatureProbeSite :5;\r
2489 UINT32 TemperatureProbeStatus :3;\r
2490 UINT32 Reserved :24;\r
2491} EFI_MISC_TEMPERATURE_PROBE_LOCATION;\r
2492\r
2493typedef struct {\r
2494 STRING_REF TemperatureProbeDescription;\r
2495 EFI_MISC_TEMPERATURE_PROBE_LOCATION\r
2496 TemperatureProbeLocation;\r
33d9d834 2497 ///\r
1c2f052d 2498 /// Inconsistent with specification here:\r
33d9d834
SZ		 2499 /// MiscSubclass 0.9 specification defines the fields type as EFI_EXP_BASE10_DATA.\r
2500 /// In fact, they should be UINT16 type because they refer to 16bit width data.\r
2501 /// Keeping this inconsistency for backward compatibility.\r
2502 ///\r
2503 UINT16 TemperatureProbeMaximumValue;\r
2504 UINT16 TemperatureProbeMinimumValue;\r
2505 UINT16 TemperatureProbeResolution;\r
2506 UINT16 TemperatureProbeTolerance;\r
2507 UINT16 TemperatureProbeAccuracy;\r
2508 UINT16 TemperatureProbeNominalValue;\r
2509 UINT16 MDLowerNoncriticalThreshold;\r
2510 UINT16 MDUpperNoncriticalThreshold;\r
2511 UINT16 MDLowerCriticalThreshold;\r
2512 UINT16 MDUpperCriticalThreshold;\r
2513 UINT16 MDLowerNonrecoverableThreshold;\r
2514 UINT16 MDUpperNonrecoverableThreshold;\r
87d63447 2515 UINT32 TemperatureProbeOemDefined;\r
2516} EFI_MISC_TEMPERATURE_PROBE_DESCRIPTION_DATA;\r
2517\r
2518//\r
2519// Electrical Current Probe - SMBIOS Type 29\r
2520//\r
2521\r
2522#define EFI_MISC_ELECTRICAL_CURRENT_PROBE_DESCRIPTION_RECORD_NUMBER 0x00000017\r
2523\r
2524typedef struct {\r
2525 UINT32 ElectricalCurrentProbeSite :5;\r
2526 UINT32 ElectricalCurrentProbeStatus :3;\r
2527 UINT32 Reserved :24;\r
2528} EFI_MISC_ELECTRICAL_CURRENT_PROBE_LOCATION;\r
2529\r
2530typedef struct {\r
2531 STRING_REF ElectricalCurrentProbeDescription;\r
2532 EFI_MISC_ELECTRICAL_CURRENT_PROBE_LOCATION\r
2533 ElectricalCurrentProbeLocation;\r
2534 EFI_EXP_BASE10_DATA ElectricalCurrentProbeMaximumValue;\r
2535 EFI_EXP_BASE10_DATA ElectricalCurrentProbeMinimumValue;\r
2536 EFI_EXP_BASE10_DATA ElectricalCurrentProbeResolution;\r
2537 EFI_EXP_BASE10_DATA ElectricalCurrentProbeTolerance;\r
2538 EFI_EXP_BASE10_DATA ElectricalCurrentProbeAccuracy;\r
2539 EFI_EXP_BASE10_DATA ElectricalCurrentProbeNominalValue;\r
2540 EFI_EXP_BASE10_DATA MDLowerNoncriticalThreshold;\r
2541 EFI_EXP_BASE10_DATA MDUpperNoncriticalThreshold;\r
2542 EFI_EXP_BASE10_DATA MDLowerCriticalThreshold;\r
2543 EFI_EXP_BASE10_DATA MDUpperCriticalThreshold;\r
2544 EFI_EXP_BASE10_DATA MDLowerNonrecoverableThreshold;\r
2545 EFI_EXP_BASE10_DATA MDUpperNonrecoverableThreshold;\r
2546 UINT32 ElectricalCurrentProbeOemDefined;\r
2547} EFI_MISC_ELECTRICAL_CURRENT_PROBE_DESCRIPTION_DATA;\r
2548\r
2549//\r
2550// Out-of-Band Remote Access - SMBIOS Type 30\r
2551//\r
2552\r
2553#define EFI_MISC_REMOTE_ACCESS_MANUFACTURER_DESCRIPTION_RECORD_NUMBER 0x00000018\r
2554\r
2555typedef struct {\r
2556 UINT32 InboundConnectionEnabled :1;\r
2557 UINT32 OutboundConnectionEnabled :1;\r
2558 UINT32 Reserved :30;\r
2559} EFI_MISC_REMOTE_ACCESS_CONNECTIONS;\r
2560\r
2561typedef struct {\r
2562 STRING_REF RemoteAccessManufacturerNameDescription;\r
2563 EFI_MISC_REMOTE_ACCESS_CONNECTIONS RemoteAccessConnections;\r
2564} EFI_MISC_REMOTE_ACCESS_MANUFACTURER_DESCRIPTION_DATA;\r
2565\r
2566//\r
2567// Misc. BIS Entry Point - SMBIOS Type 31\r
2568//\r
2569#define EFI_MISC_BIS_ENTRY_POINT_RECORD_NUMBER 0x00000019\r
2570\r
2571typedef struct {\r
2572 EFI_PHYSICAL_ADDRESS BisEntryPoint;\r
2573} EFI_MISC_BIS_ENTRY_POINT_DATA;\r
2574\r
2575//\r
2576// Misc. Boot Information - SMBIOS Type 32\r
2577//\r
2578#define EFI_MISC_BOOT_INFORMATION_STATUS_RECORD_NUMBER 0x0000001A\r
2579\r
2580///\r
1c2f052d 2581/// Inconsistent with specification here:\r
f22f941e 2582/// In MiscSubclass specification 0.9, the structure name is EFI_MISC_BOOT_INFORMATION_STATUS_TYPE.\r
87d63447 2583/// Keep it unchanged for backward compatibilty.\r
2584///\r
2585typedef enum {\r
2586 EfiBootInformationStatusNoError = 0x00,\r
2587 EfiBootInformationStatusNoBootableMedia = 0x01,\r
2588 EfiBootInformationStatusNormalOSFailedLoading = 0x02,\r
2589 EfiBootInformationStatusFirmwareDetectedFailure = 0x03,\r
2590 EfiBootInformationStatusOSDetectedFailure = 0x04,\r
2591 EfiBootInformationStatusUserRequestedBoot = 0x05,\r
2592 EfiBootInformationStatusSystemSecurityViolation = 0x06,\r
2593 EfiBootInformationStatusPreviousRequestedImage = 0x07,\r
2594 EfiBootInformationStatusWatchdogTimerExpired = 0x08,\r
2595 EfiBootInformationStatusStartReserved = 0x09,\r
2596 EfiBootInformationStatusStartOemSpecific = 0x80,\r
2597 EfiBootInformationStatusStartProductSpecific = 0xC0\r
2598} EFI_MISC_BOOT_INFORMATION_STATUS_DATA_TYPE;\r
2599\r
2600typedef struct {\r
2601 ///\r
1c2f052d 2602 /// Inconsistent with specification here:\r
f22f941e 2603 /// In MiscSubclass specification 0.9, the field name is EFI_MISC_BOOT_INFORMATION_STATUS_TYPE.\r
87d63447 2604 /// Keep it unchanged for backward compatibilty.\r
2605 ///\r
2606 EFI_MISC_BOOT_INFORMATION_STATUS_DATA_TYPE BootInformationStatus;\r
2607 UINT8 BootInformationData[9];\r
2608} EFI_MISC_BOOT_INFORMATION_STATUS_DATA;\r
2609\r
2610//\r
2611// Management Device - SMBIOS Type 34\r
2612//\r
2613#define EFI_MISC_MANAGEMENT_DEVICE_DESCRIPTION_RECORD_NUMBER 0x0000001B\r
2614\r
2615typedef enum {\r
2616 EfiManagementDeviceTypeOther = 0x01,\r
2617 EfiManagementDeviceTypeUnknown = 0x02,\r
2618 EfiManagementDeviceTypeLm75 = 0x03,\r
2619 EfiManagementDeviceTypeLm78 = 0x04,\r
2620 EfiManagementDeviceTypeLm79 = 0x05,\r
2621 EfiManagementDeviceTypeLm80 = 0x06,\r
2622 EfiManagementDeviceTypeLm81 = 0x07,\r
2623 EfiManagementDeviceTypeAdm9240 = 0x08,\r
2624 EfiManagementDeviceTypeDs1780 = 0x09,\r
2625 EfiManagementDeviceTypeMaxim1617 = 0x0A,\r
2626 EfiManagementDeviceTypeGl518Sm = 0x0B,\r
2627 EfiManagementDeviceTypeW83781D = 0x0C,\r
2628 EfiManagementDeviceTypeHt82H791 = 0x0D\r
2629} EFI_MISC_MANAGEMENT_DEVICE_TYPE;\r
2630\r
2631typedef enum {\r
2632 EfiManagementDeviceAddressTypeOther = 1,\r
2633 EfiManagementDeviceAddressTypeUnknown = 2,\r
2634 EfiManagementDeviceAddressTypeIOPort = 3,\r
2635 EfiManagementDeviceAddressTypeMemory = 4,\r
2636 EfiManagementDeviceAddressTypeSmbus = 5\r
2637} EFI_MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE;\r
2638\r
2639typedef struct {\r
2640 STRING_REF ManagementDeviceDescription;\r
2641 EFI_MISC_MANAGEMENT_DEVICE_TYPE ManagementDeviceType;\r
2642 UINTN ManagementDeviceAddress;\r
2643 EFI_MISC_MANAGEMENT_DEVICE_ADDRESS_TYPE\r
2644 ManagementDeviceAddressType;\r
2645} EFI_MISC_MANAGEMENT_DEVICE_DESCRIPTION_DATA;\r
2646\r
2647//\r
2648// Management Device Component - SMBIOS Type 35\r
2649//\r
2650\r
2651#define EFI_MISC_MANAGEMENT_DEVICE_COMPONENT_DESCRIPTION_RECORD_NUMBER 0x0000001C\r
2652\r
2653typedef struct {\r
2654 STRING_REF ManagementDeviceComponentDescription;\r
2655 EFI_INTER_LINK_DATA ManagementDeviceLink;\r
2656 EFI_INTER_LINK_DATA ManagementDeviceComponentLink;\r
2657 ///\r
1c2f052d 2658 /// Inconsistent with specification here:\r
f22f941e 2659 /// In MiscSubclass specification 0.9, this field is NOT defined.\r
2660 /// It's introduced for SmBios 2.6 specification type 35.\r
87d63447 2661 ///\r
2662 EFI_INTER_LINK_DATA ManagementDeviceThresholdLink;\r
33d9d834 2663 ///\r
1c2f052d 2664 /// Inconsistent with specification here:\r
33d9d834
SZ		 2665 /// In MiscSubclass specification 0.9, this field is NOT defined.\r
2666 /// It's implementation-specific to simplify the code logic.\r
2667 ///\r
2668 UINT8 ComponentType;\r
87d63447 2669} EFI_MISC_MANAGEMENT_DEVICE_COMPONENT_DESCRIPTION_DATA;\r
2670\r
2671//\r
2672// IPMI Data Record - SMBIOS Type 38\r
2673//\r
2674typedef enum {\r
2675 EfiIpmiOther = 0,\r
2676 EfiIpmiKcs = 1,\r
2677 EfiIpmiSmic = 2,\r
2678 EfiIpmiBt = 3\r
2679} EFI_MISC_IPMI_INTERFACE_TYPE;\r
2680\r
2681typedef struct {\r
2682 UINT16 IpmiSpecLeastSignificantDigit:4;\r
2683 UINT16 IpmiSpecMostSignificantDigit: 4;\r
2684 UINT16 Reserved: 8;\r
2685} EFI_MISC_IPMI_SPECIFICATION_REVISION;\r
2686\r
2687typedef struct {\r
2688 EFI_MISC_IPMI_INTERFACE_TYPE IpmiInterfaceType;\r
1c2f052d 2689 EFI_MISC_IPMI_SPECIFICATION_REVISION\r
87d63447 2690 IpmiSpecificationRevision;\r
2691 UINT16 IpmiI2CSlaveAddress;\r
2692 UINT16 IpmiNvDeviceAddress;\r
2693 UINT64 IpmiBaseAddress;\r
2694 EFI_DEVICE_PATH_PROTOCOL IpmiDevicePath;\r
2695} EFI_MISC_IPMI_INTERFACE_TYPE_DATA;\r
2696\r
2697#define EFI_MISC_IPMI_INTERFACE_TYPE_RECORD_NUMBER 0x0000001D\r
33d9d834
SZ		 2698///\r
2699/// The definition above is *NOT* defined in MiscSubclass specifications 0.9.\r
2700/// It's defined for backward compatibility.\r
2701///\r
2702#define EFI_MISC_IPMI_INTERFACE_TYPE_DATA_RECORD_NUMBER EFI_MISC_IPMI_INTERFACE_TYPE_RECORD_NUMBER\r
87d63447 2703\r
2704///\r
2705/// System Power supply Record - SMBIOS Type 39\r
2706///\r
1c2f052d 2707/// Inconsistent with specification here:\r
f22f941e 2708/// In MiscSubclass specification 0.9, the type of all fields are UINT32.\r
87d63447 2709/// Keep it unchanged for backward compatibilty.\r
2710///\r
2711typedef struct {\r
2712 UINT16 PowerSupplyHotReplaceable:1;\r
2713 UINT16 PowerSupplyPresent :1;\r
2714 UINT16 PowerSupplyUnplugged :1;\r
2715 UINT16 InputVoltageRangeSwitch :4;\r
2716 UINT16 PowerSupplyStatus :3;\r
2717 UINT16 PowerSupplyType :4;\r
2718 UINT16 Reserved :2;\r
2719} EFI_MISC_POWER_SUPPLY_CHARACTERISTICS;\r
2720\r
2721///\r
1c2f052d 2722/// Inconsistent with specification here:\r
f22f941e 2723/// In MiscSubclass specification 0.9, the structure name is EFI_MISC_POWER_SUPPLY_UNIT_GROUP_DATA.\r
87d63447 2724/// Keep it unchanged for backward compatibilty.\r
2725///\r
2726typedef struct {\r
2727 UINT16 PowerUnitGroup;\r
2728 STRING_REF PowerSupplyLocation;\r
2729 STRING_REF PowerSupplyDeviceName;\r
2730 STRING_REF PowerSupplyManufacturer;\r
2731 STRING_REF PowerSupplySerialNumber;\r
2732 STRING_REF PowerSupplyAssetTagNumber;\r
2733 STRING_REF PowerSupplyModelPartNumber;\r
2734 STRING_REF PowerSupplyRevisionLevel;\r
2735 UINT16 PowerSupplyMaxPowerCapacity;\r
2736 EFI_MISC_POWER_SUPPLY_CHARACTERISTICS PowerSupplyCharacteristics;\r
2737 EFI_INTER_LINK_DATA PowerSupplyInputVoltageProbeLink;\r
2738 EFI_INTER_LINK_DATA PowerSupplyCoolingDeviceLink;\r
2739 EFI_INTER_LINK_DATA PowerSupplyInputCurrentProbeLink;\r
2740} EFI_MISC_SYSTEM_POWER_SUPPLY_DATA;\r
2741\r
2742#define EFI_MISC_SYSTEM_POWER_SUPPLY_RECORD_NUMBER 0x0000001E\r
2743\r
2744///\r
2745/// OEM Data Record - SMBIOS Type 0x80-0xFF\r
2746///\r
1c2f052d 2747/// Inconsistent with specification here:\r
f22f941e 2748/// In MiscSubclass specification 0.9, the structure name is EFI_SMBIOS_STRUCTURE_HDR.\r
2749/// Due to this, the structure is commonly used by vendors to construct SmBios type 0x80~0xFF table,\r
87d63447 2750/// Keep it unchanged for backward compatibilty.\r
2751///\r
2752typedef struct {\r
2753 UINT8 Type;\r
2754 UINT8 Length;\r
2755 UINT16 Handle;\r
2756} SMBIOS_STRUCTURE_HDR;\r
2757\r
2758typedef struct {\r
2759 ///\r
1c2f052d 2760 /// Inconsistent with specification here:\r
f22f941e 2761 /// In MiscSubclass specification 0.9, the field name is EFI_SMBIOS_STRUCTURE_HDR.\r
87d63447 2762 /// Keep it unchanged for backward compatibilty.\r
2763 ///\r
2764 SMBIOS_STRUCTURE_HDR Header;\r
2765 UINT8 RawData[1];\r
2766} EFI_MISC_SMBIOS_STRUCT_ENCAPSULATION_DATA;\r
2767\r
2768#define EFI_MISC_SMBIOS_STRUCT_ENCAP_RECORD_NUMBER 0x0000001F\r
2769\r
2770///\r
2771/// Misc. System Event Log - SMBIOS Type 15\r
2772///\r
1c2f052d 2773/// Inconsistent with specification here:\r
f22f941e 2774/// In MiscSubclass specification 0.9, the following data structures are NOT defined.\r
2775/// It's introduced for SmBios 2.6 specification type 15.\r
87d63447 2776///\r
2777#define EFI_MISC_SYSTEM_EVENT_LOG_RECORD_NUMBER 0x00000020\r
2778\r
2779///\r
1c2f052d 2780/// Inconsistent with specification here:\r
f22f941e 2781/// In MiscSubclass specification 0.9, the following data structures are NOT defined.\r
2782/// It's introduced for SmBios 2.6 specification type 15.\r
87d63447 2783///\r
2784typedef struct {\r
2785 UINT16 LogAreaLength;\r
2786 UINT16 LogHeaderStartOffset;\r
2787 UINT16 LogDataStartOffset;\r
2788 UINT8 AccessMethod;\r
2789 UINT8 LogStatus;\r
2790 UINT32 LogChangeToken;\r
2791 UINT32 AccessMethodAddress;\r
2792 UINT8 LogHeaderFormat;\r
2793 UINT8 NumberOfSupportedLogType;\r
2794 UINT8 LengthOfLogDescriptor;\r
2795} EFI_MISC_SYSTEM_EVENT_LOG_DATA;\r
2796\r
2797//\r
2798// Access Method.\r
2799// 0x00~0x04: as following definition\r
2800// 0x05~0x7f: Available for future assignment.\r
2801// 0x80~0xff: BIOS Vendor/OEM-specific.\r
1c2f052d 2802//\r
87d63447 2803#define ACCESS_INDEXIO_1INDEX8BIT_DATA8BIT 0x00\r
2804#define ACCESS_INDEXIO_2INDEX8BIT_DATA8BIT 0X01\r
2805#define ACCESS_INDEXIO_1INDEX16BIT_DATA8BIT 0X02\r
2806#define ACCESS_MEMORY_MAPPED 0x03\r
2807#define ACCESS_GPNV 0x04\r
2808\r
2809///\r
2810/// Management Device Threshold Data Record - SMBIOS Type 36\r
2811///\r
1c2f052d 2812/// Inconsistent with specification here:\r
f22f941e 2813/// In MiscSubclass specification 0.9, the following data structures are NOT defined.\r
2814/// It's introduced for SmBios 2.6 specification type 36.\r
87d63447 2815///\r
2816#define EFI_MISC_MANAGEMENT_DEVICE_THRESHOLD_RECORD_NUMBER 0x00000021\r
2817///\r
1c2f052d 2818/// Inconsistent with specification here:\r
f22f941e 2819/// In MiscSubclass specification 0.9, the following data structures are NOT defined.\r
2820/// It's introduced for SmBios 2.6 specification type 36.\r
87d63447 2821///\r
2822typedef struct {\r
2823 UINT16 LowerThresNonCritical;\r
2824 UINT16 UpperThresNonCritical;\r
2825 UINT16 LowerThresCritical;\r
2826 UINT16 UpperThresCritical;\r
2827 UINT16 LowerThresNonRecover;\r
2828 UINT16 UpperThresNonRecover;\r
2829} EFI_MISC_MANAGEMENT_DEVICE_THRESHOLD;\r
2830\r
2831//\r
2832// Declare the following strutures alias to use them more conviniently.\r
2833//\r
2834typedef EFI_MISC_LAST_PCI_BUS_DATA EFI_MISC_LAST_PCI_BUS;\r
2835typedef EFI_MISC_BIOS_VENDOR_DATA EFI_MISC_BIOS_VENDOR;\r
2836typedef EFI_MISC_SYSTEM_MANUFACTURER_DATA EFI_MISC_SYSTEM_MANUFACTURER;\r
2837typedef EFI_MISC_BASE_BOARD_MANUFACTURER_DATA EFI_MISC_BASE_BOARD_MANUFACTURER;\r
2838typedef EFI_MISC_CHASSIS_MANUFACTURER_DATA EFI_MISC_CHASSIS_MANUFACTURER;\r
2839typedef EFI_MISC_PORT_INTERNAL_CONNECTOR_DESIGNATOR_DATA EFI_MISC_PORT_INTERNAL_CONNECTOR_DESIGNATOR;\r
2840typedef EFI_MISC_SYSTEM_SLOT_DESIGNATION_DATA EFI_MISC_SYSTEM_SLOT_DESIGNATION;\r
2841typedef EFI_MISC_ONBOARD_DEVICE_DATA EFI_MISC_ONBOARD_DEVICE;\r
2842typedef EFI_MISC_POINTING_DEVICE_TYPE_DATA EFI_MISC_ONBOARD_DEVICE_TYPE_DATA;\r
2843typedef EFI_MISC_OEM_STRING_DATA EFI_MISC_OEM_STRING;\r
2844typedef EFI_MISC_SYSTEM_OPTION_STRING_DATA EFI_MISC_SYSTEM_OPTION_STRING;\r
2845typedef EFI_MISC_NUMBER_OF_INSTALLABLE_LANGUAGES_DATA EFI_MISC_NUMBER_OF_INSTALLABLE_LANGUAGES;\r
2846typedef EFI_MISC_SYSTEM_LANGUAGE_STRING_DATA EFI_MISC_SYSTEM_LANGUAGE_STRING;\r
2847typedef EFI_MISC_SYSTEM_EVENT_LOG_DATA EFI_MISC_SYSTEM_EVENT_LOG;\r
2848typedef EFI_MISC_BIS_ENTRY_POINT_DATA EFI_MISC_BIS_ENTRY_POINT;\r
2849typedef EFI_MISC_BOOT_INFORMATION_STATUS_DATA EFI_MISC_BOOT_INFORMATION_STATUS;\r
2850typedef EFI_MISC_SYSTEM_POWER_SUPPLY_DATA EFI_MISC_SYSTEM_POWER_SUPPLY;\r
2851typedef EFI_MISC_SMBIOS_STRUCT_ENCAPSULATION_DATA EFI_MISC_SMBIOS_STRUCT_ENCAPSULATION;\r
2852typedef EFI_MISC_SCHEDULED_POWER_ON_MONTH_DATA EFI_MISC_SCHEDULED_POWER_ON_MONTH;\r
2853typedef EFI_MISC_VOLTAGE_PROBE_DESCRIPTION_DATA EFI_MISC_VOLTAGE_PROBE_DESCRIPTION;\r
2854typedef EFI_MISC_COOLING_DEVICE_TEMP_LINK_DATA EFI_MISC_COOLING_DEVICE_TEMP_LINK;\r
2855typedef EFI_MISC_TEMPERATURE_PROBE_DESCRIPTION_DATA EFI_MISC_TEMPERATURE_PROBE_DESCRIPTION;\r
1c2f052d 2856typedef EFI_MISC_REMOTE_ACCESS_MANUFACTURER_DESCRIPTION_DATA\r
87d63447 2857 EFI_MISC_REMOTE_ACCESS_MANUFACTURER_DESCRIPTION;\r
2858typedef EFI_MISC_MANAGEMENT_DEVICE_DESCRIPTION_DATA EFI_MISC_MANAGEMENT_DEVICE_DESCRIPTION;\r
2859typedef EFI_MISC_ELECTRICAL_CURRENT_PROBE_DESCRIPTION_DATA EFI_MISC_ELECTRICAL_CURRENT_PROBE_DESCRIPTION;\r
33d9d834
SZ		 2860typedef EFI_MISC_MANAGEMENT_DEVICE_COMPONENT_DESCRIPTION_DATA\r
2861 EFI_MISC_MANAGEMENT_DEVICE_COMPONENT_DESCRIPTION;\r
87d63447 2862\r
2863///\r
1c2f052d 2864/// Inconsistent with specification here:\r
f22f941e 2865/// In MemSubclass specification 0.9, the following data structures are NOT defined.\r
87d63447 2866/// It is implementation-specific to simplify the code logic.\r
2867///\r
2868typedef union {\r
2869 EFI_MISC_LAST_PCI_BUS_DATA LastPciBus;\r
2870 EFI_MISC_BIOS_VENDOR_DATA MiscBiosVendor;\r
2871 EFI_MISC_SYSTEM_MANUFACTURER_DATA MiscSystemManufacturer;\r
2872 EFI_MISC_BASE_BOARD_MANUFACTURER_DATA MiscBaseBoardManufacturer;\r
2873 EFI_MISC_CHASSIS_MANUFACTURER_DATA MiscChassisManufacturer;\r
2874 EFI_MISC_PORT_INTERNAL_CONNECTOR_DESIGNATOR_DATA MiscPortInternalConnectorDesignator;\r
2875 EFI_MISC_SYSTEM_SLOT_DESIGNATION_DATA MiscSystemSlotDesignation;\r
2876 EFI_MISC_ONBOARD_DEVICE_DATA MiscOnboardDevice;\r
2877 EFI_MISC_OEM_STRING_DATA MiscOemString;\r
2878 EFI_MISC_SYSTEM_OPTION_STRING_DATA MiscOptionString;\r
2879 EFI_MISC_NUMBER_OF_INSTALLABLE_LANGUAGES_DATA NumberOfInstallableLanguages;\r
2880 EFI_MISC_SYSTEM_LANGUAGE_STRING_DATA MiscSystemLanguageString;\r
2881 EFI_MISC_SYSTEM_EVENT_LOG_DATA MiscSystemEventLog;\r
2882 EFI_MISC_GROUP_NAME_DATA MiscGroupNameData;\r
2883 EFI_MISC_GROUP_ITEM_SET_DATA MiscGroupItemSetData;\r
2884 EFI_MISC_POINTING_DEVICE_TYPE_DATA MiscPointingDeviceTypeData;\r
2885 EFI_MISC_RESET_CAPABILITIES_DATA MiscResetCapablilitiesData;\r
2886 EFI_MISC_HARDWARE_SECURITY_SETTINGS_DATA MiscHardwareSecuritySettingsData;\r
2887 EFI_MISC_SCHEDULED_POWER_ON_MONTH_DATA MiscScheduledPowerOnMonthData;\r
2888 EFI_MISC_VOLTAGE_PROBE_DESCRIPTION_DATA MiscVoltagePorbeDescriptionData;\r
2889 EFI_MISC_COOLING_DEVICE_TEMP_LINK_DATA MiscCoolingDeviceTempLinkData;\r
2890 EFI_MISC_TEMPERATURE_PROBE_DESCRIPTION_DATA MiscTemperatureProbeDescriptionData;\r
2891 EFI_MISC_ELECTRICAL_CURRENT_PROBE_DESCRIPTION_DATA MiscElectricalCurrentProbeDescriptionData;\r
2892 EFI_MISC_REMOTE_ACCESS_MANUFACTURER_DESCRIPTION_DATA\r
2893 MiscRemoteAccessManufacturerDescriptionData;\r
2894 EFI_MISC_BIS_ENTRY_POINT_DATA MiscBisEntryPoint;\r
2895 EFI_MISC_BOOT_INFORMATION_STATUS_DATA MiscBootInformationStatus;\r
2896 EFI_MISC_MANAGEMENT_DEVICE_DESCRIPTION_DATA MiscMangementDeviceDescriptionData;\r
2897 EFI_MISC_MANAGEMENT_DEVICE_COMPONENT_DESCRIPTION_DATA\r
2898 MiscmangementDeviceComponentDescriptionData;\r
2899 EFI_MISC_IPMI_INTERFACE_TYPE_DATA MiscIpmiInterfaceTypeData;\r
2900 EFI_MISC_SYSTEM_POWER_SUPPLY_DATA MiscPowerSupplyInfo;\r
2901 EFI_MISC_SMBIOS_STRUCT_ENCAPSULATION_DATA MiscSmbiosStructEncapsulation;\r
2902 EFI_MISC_MANAGEMENT_DEVICE_THRESHOLD MiscManagementDeviceThreshold;\r
2903} EFI_MISC_SUBCLASS_RECORDS;\r
2904\r
2905///\r
1c2f052d 2906/// Inconsistent with specification here:\r
f22f941e 2907/// In MemSubclass specification 0.9, the following data structures are NOT defined.\r
87d63447 2908/// It is implementation-specific to simplify the code logic.\r
2909///\r
2910typedef struct {\r
2911 EFI_SUBCLASS_TYPE1_HEADER Header;\r
2912 EFI_MISC_SUBCLASS_RECORDS Record;\r
2913} EFI_MISC_SUBCLASS_DRIVER_DATA;\r
2914#pragma pack()\r
2915\r
2916///\r
1c2f052d 2917/// Inconsistent with specification here:\r
f22f941e 2918/// In DataHubSubclass specification 0.9 page 16, the following symbol is NOT defined.\r
87d63447 2919/// But value is meaningful, 0 means Reserved.\r
2920///\r
2921#define EFI_SUBCLASS_INSTANCE_RESERVED 0\r
2922///\r
1c2f052d 2923/// Inconsistent with specification here:\r
f22f941e 2924/// In DataHubSubclass specification 0.9 page 16, the following symbol is NOT defined.\r
87d63447 2925/// But value is meaningful, -1 means Not Applicable.\r
2926///\r
2927#define EFI_SUBCLASS_INSTANCE_NON_APPLICABLE 0xFFFF\r
2928\r
79964ac8 2929#endif\r
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