[mirror_edk2.git] / IntelFrameworkPkg / Include / Protocol / Legacy8259.h

/** @file\r
  This protocol abstracts the 8259 interrupt controller. This includes\r
  PCI IRQ routing needed to program the PCI Interrupt Line register.\r
\r
Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>\r
SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
  @par Revision Reference:\r
  This protocol is defined in Framework for EFI Compatibility Support Module spec\r
  Version 0.97.\r
\r
**/\r
\r
#ifndef _EFI_LEGACY_8259_H_\r
#define _EFI_LEGACY_8259_H_\r
\r
\r
#define EFI_LEGACY_8259_PROTOCOL_GUID \\r
  { \\r
    0x38321dba, 0x4fe0, 0x4e17, {0x8a, 0xec, 0x41, 0x30, 0x55, 0xea, 0xed, 0xc1 } \\r
  }\r
\r
typedef struct _EFI_LEGACY_8259_PROTOCOL EFI_LEGACY_8259_PROTOCOL;\r
\r
typedef enum {\r
  Efi8259Irq0,\r
  Efi8259Irq1,\r
  Efi8259Irq2,\r
  Efi8259Irq3,\r
  Efi8259Irq4,\r
  Efi8259Irq5,\r
  Efi8259Irq6,\r
  Efi8259Irq7,\r
  Efi8259Irq8,\r
  Efi8259Irq9,\r
  Efi8259Irq10,\r
  Efi8259Irq11,\r
  Efi8259Irq12,\r
  Efi8259Irq13,\r
  Efi8259Irq14,\r
  Efi8259Irq15,\r
  Efi8259IrqMax\r
} EFI_8259_IRQ;\r
\r
typedef enum {\r
  Efi8259LegacyMode,\r
  Efi8259ProtectedMode,\r
  Efi8259MaxMode\r
} EFI_8259_MODE;\r
\r
/**\r
  Get the 8259 interrupt masks for Irq0 - Irq15. A different mask exists for\r
  the legacy mode mask and the protected mode mask. The base address for the 8259\r
  is different for legacy and protected mode, so two masks are required.\r
\r
  @param  This                  The protocol instance pointer.\r
  @param  MasterBase            The base vector for the Master PIC in the 8259 controller.\r
  @param  SlaveBase             The base vector for the Slave PIC in the 8259 controller.\r
\r
  @retval EFI_SUCCESS           The new bases were programmed.\r
  @retval EFI_DEVICE_ERROR      A device error occured programming the vector bases.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_LEGACY_8259_SET_VECTOR_BASE)(\r
  IN EFI_LEGACY_8259_PROTOCOL           *This,\r
  IN  UINT8                             MasterBase,\r
  IN  UINT8                             SlaveBase\r
  );\r
\r
/**\r
  Get the 8259 interrupt masks for Irq0 - Irq15. A different mask exists for\r
  the legacy mode mask and the protected mode mask. The base address for the 8259\r
  is different for legacy and protected mode, so two masks are required.\r
\r
  @param  This                  The protocol instance pointer.\r
  @param  LegacyMask            Bit 0 is Irq0 - Bit 15 is Irq15.\r
  @param  LegacyEdgeLevel       Bit 0 is Irq0 - Bit 15 is Irq15.\r
  @param  ProtectedMask         Bit 0 is Irq0 - Bit 15 is Irq15.\r
  @param  ProtectedEdgeLevel    Bit 0 is Irq0 - Bit 15 is Irq15.\r
\r
  @retval EFI_SUCCESS           8259 status returned.\r
  @retval EFI_DEVICE_ERROR      Error reading 8259.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_LEGACY_8259_GET_MASK)(\r
  IN EFI_LEGACY_8259_PROTOCOL           *This,\r
  OUT UINT16                            *LegacyMask, OPTIONAL\r
  OUT UINT16                            *LegacyEdgeLevel, OPTIONAL\r
  OUT UINT16                            *ProtectedMask, OPTIONAL\r
  OUT UINT16                            *ProtectedEdgeLevel OPTIONAL\r
  );\r
\r
/**\r
  Set the 8259 interrupt masks for Irq0 - Irq15. A different mask exists for\r
  the legacy mode mask and the protected mode mask. The base address for the 8259\r
  is different for legacy and protected mode, so two masks are required.\r
  Also set the edge/level masks.\r
\r
  @param  This                  The protocol instance pointer.\r
  @param  LegacyMask            Bit 0 is Irq0 - Bit 15 is Irq15.\r
  @param  LegacyEdgeLevel       Bit 0 is Irq0 - Bit 15 is Irq15.\r
  @param  ProtectedMask         Bit 0 is Irq0 - Bit 15 is Irq15.\r
  @param  ProtectedEdgeLevel    Bit 0 is Irq0 - Bit 15 is Irq15.\r
\r
  @retval EFI_SUCCESS           8259 status returned.\r
  @retval EFI_DEVICE_ERROR      Error writing 8259.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_LEGACY_8259_SET_MASK)(\r
  IN EFI_LEGACY_8259_PROTOCOL           *This,\r
  IN  UINT16                            *LegacyMask, OPTIONAL\r
  IN  UINT16                            *LegacyEdgeLevel, OPTIONAL\r
  IN  UINT16                            *ProtectedMask, OPTIONAL\r
  IN  UINT16                            *ProtectedEdgeLevel OPTIONAL\r
  );\r
\r
/**\r
  Set the 8259 mode of operation. The base address for the 8259 is different for\r
  legacy and protected mode. The legacy mode requires the master 8259 to have a\r
  master base of 0x08 and the slave base of 0x70. The protected mode base locations\r
  are not defined. Interrupts must be masked by the caller before this function\r
  is called. The interrupt mask from the current mode is saved. The interrupt\r
  mask for the new mode is Mask, or if Mask does not exist the previously saved\r
  mask is used.\r
\r
  @param  This                  The protocol instance pointer.\r
  @param  Mode                  The mode of operation. i.e. the real mode or protected mode.\r
  @param  Mask                  Optional interupt mask for the new mode.\r
  @param  EdgeLevel             Optional trigger mask for the new mode.\r
\r
  @retval EFI_SUCCESS           8259 programmed.\r
  @retval EFI_DEVICE_ERROR      Error writing to 8259.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_LEGACY_8259_SET_MODE)(\r
  IN EFI_LEGACY_8259_PROTOCOL         *This,\r
  IN  EFI_8259_MODE                   Mode,\r
  IN  UINT16                          *Mask, OPTIONAL\r
  IN  UINT16                          *EdgeLevel OPTIONAL\r
  );\r
\r
/**\r
  Convert from IRQ to processor interrupt vector number.\r
\r
  @param  This                  The protocol instance pointer.\r
  @param  Irq                   8259 IRQ0 - IRQ15.\r
  @param  Vector                The processor vector number that matches an Irq.\r
\r
  @retval EFI_SUCCESS           The Vector matching Irq is returned.\r
  @retval EFI_INVALID_PARAMETER The Irq not valid.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_LEGACY_8259_GET_VECTOR)(\r
  IN EFI_LEGACY_8259_PROTOCOL           *This,\r
  IN  EFI_8259_IRQ                      Irq,\r
  OUT UINT8                             *Vector\r
  );\r
\r
/**\r
  Enable Irq by unmasking interrupt in 8259\r
\r
  @param  This                  The protocol instance pointer.\r
  @param  Irq                   8259 IRQ0 - IRQ15.\r
  @param  LevelTriggered        TRUE if level triggered. FALSE if edge triggered.\r
\r
  @retval EFI_SUCCESS           The Irq was enabled on 8259.\r
  @retval EFI_INVALID_PARAMETER The Irq is not valid.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_LEGACY_8259_ENABLE_IRQ)(\r
  IN EFI_LEGACY_8259_PROTOCOL           *This,\r
  IN  EFI_8259_IRQ                      Irq,\r
  IN  BOOLEAN                           LevelTriggered\r
  );\r
\r
/**\r
  Disable Irq by masking interrupt in 8259\r
\r
  @param  This                  The protocol instance pointer.\r
  @param  Irq                   8259 IRQ0 - IRQ15.\r
\r
  @retval EFI_SUCCESS           The Irq was disabled on 8259.\r
  @retval EFI_INVALID_PARAMETER The Irq is not valid.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_LEGACY_8259_DISABLE_IRQ)(\r
  IN EFI_LEGACY_8259_PROTOCOL           *This,\r
  IN  EFI_8259_IRQ                      Irq\r
  );\r
\r
/**\r
  PciHandle represents a PCI config space of a PCI function. Vector\r
  represents Interrupt Pin (from PCI config space) and it is the data\r
  that is programmed into the Interrupt Line (from the PCI config space)\r
  register.\r
\r
  @param  This                  The protocol instance pointer.\r
  @param  PciHandle             The PCI function to return the vector for.\r
  @param  Vector                The vector for the function it matches.\r
\r
  @retval EFI_SUCCESS           A valid Vector was returned.\r
  @retval EFI_INVALID_PARAMETER PciHandle not valid.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_LEGACY_8259_GET_INTERRUPT_LINE)(\r
  IN EFI_LEGACY_8259_PROTOCOL           *This,\r
  IN  EFI_HANDLE                        PciHandle,\r
  OUT UINT8                             *Vector\r
  );\r
\r
/**\r
  Send an EOI to 8259\r
\r
  @param  This                  The protocol instance pointer.\r
  @param  Irq                   8259 IRQ0 - IRQ15.\r
\r
  @retval EFI_SUCCESS           EOI was successfully sent to 8259.\r
  @retval EFI_INVALID_PARAMETER The Irq isnot valid.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EFI_LEGACY_8259_END_OF_INTERRUPT)(\r
  IN EFI_LEGACY_8259_PROTOCOL           *This,\r
  IN  EFI_8259_IRQ                      Irq\r
  );\r
\r
/**\r
  @par Protocol Description:\r
  Abstracts the 8259 and APIC hardware control between EFI usage and\r
  Compatibility16 usage.\r
\r
  @param SetVectorBase\r
  Sets the vector bases for master and slave PICs.\r
\r
  @param GetMask\r
  Gets IRQ and edge/level masks for 16-bit real mode and 32-bit protected mode.\r
\r
  @param SetMask\r
  Sets the IRQ and edge\level masks for 16-bit real mode and 32-bit protected mode.\r
\r
  @param SetMode\r
  Sets PIC mode to 16-bit real mode or 32-bit protected mode.\r
\r
  @param GetVector\r
  Gets the base vector assigned to an IRQ.\r
\r
  @param EnableIrq\r
  Enables an IRQ.\r
\r
  @param DisableIrq\r
  Disables an IRQ.\r
\r
  @param GetInterruptLine\r
  Gets an IRQ that is assigned to a PCI device.\r
\r
  @param EndOfInterrupt\r
  Issues the end of interrupt command.\r
\r
**/\r
struct _EFI_LEGACY_8259_PROTOCOL {\r
  EFI_LEGACY_8259_SET_VECTOR_BASE     SetVectorBase;\r
  EFI_LEGACY_8259_GET_MASK            GetMask;\r
  EFI_LEGACY_8259_SET_MASK            SetMask;\r
  EFI_LEGACY_8259_SET_MODE            SetMode;\r
  EFI_LEGACY_8259_GET_VECTOR          GetVector;\r
  EFI_LEGACY_8259_ENABLE_IRQ          EnableIrq;\r
  EFI_LEGACY_8259_DISABLE_IRQ         DisableIrq;\r
  EFI_LEGACY_8259_GET_INTERRUPT_LINE  GetInterruptLine;\r
  EFI_LEGACY_8259_END_OF_INTERRUPT    EndOfInterrupt;\r
};\r
\r
extern EFI_GUID gEfiLegacy8259ProtocolGuid;\r
\r
#endif\r
Commit	Line	Data
79964ac8	1	/** @file\r
79964ac8	2	This protocol abstracts the 8259 interrupt controller. This includes\r
5259c97d	3	PCI IRQ routing needed to program the PCI Interrupt Line register.\r
79964ac8	4	\r
1c2f052d	5	Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>\r
22a69a5e	6	SPDX-License-Identifier: BSD-2-Clause-Patent\r
79964ac8	7	\r
79964ac8	8	@par Revision Reference:\r
79964ac8	9	This protocol is defined in Framework for EFI Compatibility Support Module spec\r
0f899407	10	Version 0.97.\r
79964ac8	11	\r
	12	**/\r
	13	\r
	14	#ifndef _EFI_LEGACY_8259_H_\r
	15	#define _EFI_LEGACY_8259_H_\r
	16	\r
b80fbe85	17	\r
79964ac8	18	#define EFI_LEGACY_8259_PROTOCOL_GUID \\r
	19	{ \\r
	20	0x38321dba, 0x4fe0, 0x4e17, {0x8a, 0xec, 0x41, 0x30, 0x55, 0xea, 0xed, 0xc1 } \\r
	21	}\r
	22	\r
	23	typedef struct _EFI_LEGACY_8259_PROTOCOL EFI_LEGACY_8259_PROTOCOL;\r
	24	\r
	25	typedef enum {\r
	26	Efi8259Irq0,\r
	27	Efi8259Irq1,\r
	28	Efi8259Irq2,\r
	29	Efi8259Irq3,\r
	30	Efi8259Irq4,\r
	31	Efi8259Irq5,\r
	32	Efi8259Irq6,\r
	33	Efi8259Irq7,\r
	34	Efi8259Irq8,\r
	35	Efi8259Irq9,\r
	36	Efi8259Irq10,\r
	37	Efi8259Irq11,\r
	38	Efi8259Irq12,\r
	39	Efi8259Irq13,\r
	40	Efi8259Irq14,\r
	41	Efi8259Irq15,\r
	42	Efi8259IrqMax\r
	43	} EFI_8259_IRQ;\r
	44	\r
	45	typedef enum {\r
	46	Efi8259LegacyMode,\r
	47	Efi8259ProtectedMode,\r
	48	Efi8259MaxMode\r
	49	} EFI_8259_MODE;\r
	50	\r
	51	/**\r
	52	Get the 8259 interrupt masks for Irq0 - Irq15. A different mask exists for\r
	53	the legacy mode mask and the protected mode mask. The base address for the 8259\r
	54	is different for legacy and protected mode, so two masks are required.\r
	55	\r
f22f941e	56	@param This The protocol instance pointer.\r
	57	@param MasterBase The base vector for the Master PIC in the 8259 controller.\r
	58	@param SlaveBase The base vector for the Slave PIC in the 8259 controller.\r
79964ac8	59	\r
f22f941e	60	@retval EFI_SUCCESS The new bases were programmed.\r
f22f941e	61	@retval EFI_DEVICE_ERROR A device error occured programming the vector bases.\r
79964ac8	62	\r
	63	**/\r
	64	typedef\r
	65	EFI_STATUS\r
69686d56	66	(EFIAPI *EFI_LEGACY_8259_SET_VECTOR_BASE)(\r
79964ac8	67	IN EFI_LEGACY_8259_PROTOCOL *This,\r
	68	IN UINT8 MasterBase,\r
	69	IN UINT8 SlaveBase\r
	70	);\r
	71	\r
	72	/**\r
	73	Get the 8259 interrupt masks for Irq0 - Irq15. A different mask exists for\r
	74	the legacy mode mask and the protected mode mask. The base address for the 8259\r
	75	is different for legacy and protected mode, so two masks are required.\r
	76	\r
f22f941e	77	@param This The protocol instance pointer.\r
	78	@param LegacyMask Bit 0 is Irq0 - Bit 15 is Irq15.\r
	79	@param LegacyEdgeLevel Bit 0 is Irq0 - Bit 15 is Irq15.\r
	80	@param ProtectedMask Bit 0 is Irq0 - Bit 15 is Irq15.\r
	81	@param ProtectedEdgeLevel Bit 0 is Irq0 - Bit 15 is Irq15.\r
79964ac8	82	\r
f22f941e	83	@retval EFI_SUCCESS 8259 status returned.\r
f22f941e	84	@retval EFI_DEVICE_ERROR Error reading 8259.\r
79964ac8	85	\r
	86	**/\r
	87	typedef\r
	88	EFI_STATUS\r
69686d56	89	(EFIAPI *EFI_LEGACY_8259_GET_MASK)(\r
79964ac8	90	IN EFI_LEGACY_8259_PROTOCOL *This,\r
	91	OUT UINT16 *LegacyMask, OPTIONAL\r
	92	OUT UINT16 *LegacyEdgeLevel, OPTIONAL\r
	93	OUT UINT16 *ProtectedMask, OPTIONAL\r
	94	OUT UINT16 *ProtectedEdgeLevel OPTIONAL\r
	95	);\r
	96	\r
	97	/**\r
	98	Set the 8259 interrupt masks for Irq0 - Irq15. A different mask exists for\r
	99	the legacy mode mask and the protected mode mask. The base address for the 8259\r
	100	is different for legacy and protected mode, so two masks are required.\r
	101	Also set the edge/level masks.\r
	102	\r
f22f941e	103	@param This The protocol instance pointer.\r
	104	@param LegacyMask Bit 0 is Irq0 - Bit 15 is Irq15.\r
	105	@param LegacyEdgeLevel Bit 0 is Irq0 - Bit 15 is Irq15.\r
	106	@param ProtectedMask Bit 0 is Irq0 - Bit 15 is Irq15.\r
	107	@param ProtectedEdgeLevel Bit 0 is Irq0 - Bit 15 is Irq15.\r
79964ac8	108	\r
f22f941e	109	@retval EFI_SUCCESS 8259 status returned.\r
f22f941e	110	@retval EFI_DEVICE_ERROR Error writing 8259.\r
79964ac8	111	\r
	112	**/\r
	113	typedef\r
	114	EFI_STATUS\r
69686d56	115	(EFIAPI *EFI_LEGACY_8259_SET_MASK)(\r
79964ac8	116	IN EFI_LEGACY_8259_PROTOCOL *This,\r
	117	IN UINT16 *LegacyMask, OPTIONAL\r
	118	IN UINT16 *LegacyEdgeLevel, OPTIONAL\r
	119	IN UINT16 *ProtectedMask, OPTIONAL\r
	120	IN UINT16 *ProtectedEdgeLevel OPTIONAL\r
	121	);\r
	122	\r
	123	/**\r
	124	Set the 8259 mode of operation. The base address for the 8259 is different for\r
	125	legacy and protected mode. The legacy mode requires the master 8259 to have a\r
	126	master base of 0x08 and the slave base of 0x70. The protected mode base locations\r
	127	are not defined. Interrupts must be masked by the caller before this function\r
	128	is called. The interrupt mask from the current mode is saved. The interrupt\r
	129	mask for the new mode is Mask, or if Mask does not exist the previously saved\r
	130	mask is used.\r
	131	\r
f22f941e	132	@param This The protocol instance pointer.\r
f22f941e	133	@param Mode The mode of operation. i.e. the real mode or protected mode.\r
79964ac8	134	@param Mask Optional interupt mask for the new mode.\r
	135	@param EdgeLevel Optional trigger mask for the new mode.\r
	136	\r
f22f941e	137	@retval EFI_SUCCESS 8259 programmed.\r
f22f941e	138	@retval EFI_DEVICE_ERROR Error writing to 8259.\r
79964ac8	139	\r
	140	**/\r
	141	typedef\r
	142	EFI_STATUS\r
69686d56	143	(EFIAPI *EFI_LEGACY_8259_SET_MODE)(\r
79964ac8	144	IN EFI_LEGACY_8259_PROTOCOL *This,\r
	145	IN EFI_8259_MODE Mode,\r
	146	IN UINT16 *Mask, OPTIONAL\r
	147	IN UINT16 *EdgeLevel OPTIONAL\r
	148	);\r
	149	\r
	150	/**\r
	151	Convert from IRQ to processor interrupt vector number.\r
	152	\r
f22f941e	153	@param This The protocol instance pointer.\r
	154	@param Irq 8259 IRQ0 - IRQ15.\r
	155	@param Vector The processor vector number that matches an Irq.\r
79964ac8	156	\r
f22f941e	157	@retval EFI_SUCCESS The Vector matching Irq is returned.\r
f22f941e	158	@retval EFI_INVALID_PARAMETER The Irq not valid.\r
79964ac8	159	\r
	160	**/\r
	161	typedef\r
	162	EFI_STATUS\r
69686d56	163	(EFIAPI *EFI_LEGACY_8259_GET_VECTOR)(\r
79964ac8	164	IN EFI_LEGACY_8259_PROTOCOL *This,\r
	165	IN EFI_8259_IRQ Irq,\r
	166	OUT UINT8 *Vector\r
	167	);\r
	168	\r
	169	/**\r
	170	Enable Irq by unmasking interrupt in 8259\r
	171	\r
f22f941e	172	@param This The protocol instance pointer.\r
f22f941e	173	@param Irq 8259 IRQ0 - IRQ15.\r
79964ac8	174	@param LevelTriggered TRUE if level triggered. FALSE if edge triggered.\r
79964ac8	175	\r
f22f941e	176	@retval EFI_SUCCESS The Irq was enabled on 8259.\r
f22f941e	177	@retval EFI_INVALID_PARAMETER The Irq is not valid.\r
79964ac8	178	\r
	179	**/\r
	180	typedef\r
	181	EFI_STATUS\r
69686d56	182	(EFIAPI *EFI_LEGACY_8259_ENABLE_IRQ)(\r
79964ac8	183	IN EFI_LEGACY_8259_PROTOCOL *This,\r
	184	IN EFI_8259_IRQ Irq,\r
	185	IN BOOLEAN LevelTriggered\r
	186	);\r
	187	\r
	188	/**\r
	189	Disable Irq by masking interrupt in 8259\r
	190	\r
f22f941e	191	@param This The protocol instance pointer.\r
f22f941e	192	@param Irq 8259 IRQ0 - IRQ15.\r
79964ac8	193	\r
f22f941e	194	@retval EFI_SUCCESS The Irq was disabled on 8259.\r
f22f941e	195	@retval EFI_INVALID_PARAMETER The Irq is not valid.\r
79964ac8	196	\r
	197	**/\r
	198	typedef\r
	199	EFI_STATUS\r
69686d56	200	(EFIAPI *EFI_LEGACY_8259_DISABLE_IRQ)(\r
79964ac8	201	IN EFI_LEGACY_8259_PROTOCOL *This,\r
	202	IN EFI_8259_IRQ Irq\r
	203	);\r
	204	\r
	205	/**\r
	206	PciHandle represents a PCI config space of a PCI function. Vector\r
	207	represents Interrupt Pin (from PCI config space) and it is the data\r
	208	that is programmed into the Interrupt Line (from the PCI config space)\r
	209	register.\r
	210	\r
f22f941e	211	@param This The protocol instance pointer.\r
	212	@param PciHandle The PCI function to return the vector for.\r
	213	@param Vector The vector for the function it matches.\r
79964ac8	214	\r
f22f941e	215	@retval EFI_SUCCESS A valid Vector was returned.\r
f22f941e	216	@retval EFI_INVALID_PARAMETER PciHandle not valid.\r
79964ac8	217	\r
	218	**/\r
	219	typedef\r
	220	EFI_STATUS\r
69686d56	221	(EFIAPI *EFI_LEGACY_8259_GET_INTERRUPT_LINE)(\r
79964ac8	222	IN EFI_LEGACY_8259_PROTOCOL *This,\r
	223	IN EFI_HANDLE PciHandle,\r
	224	OUT UINT8 *Vector\r
	225	);\r
	226	\r
	227	/**\r
	228	Send an EOI to 8259\r
	229	\r
f22f941e	230	@param This The protocol instance pointer.\r
f22f941e	231	@param Irq 8259 IRQ0 - IRQ15.\r
79964ac8	232	\r
f22f941e	233	@retval EFI_SUCCESS EOI was successfully sent to 8259.\r
f22f941e	234	@retval EFI_INVALID_PARAMETER The Irq isnot valid.\r
79964ac8	235	\r
	236	**/\r
	237	typedef\r
	238	EFI_STATUS\r
69686d56	239	(EFIAPI *EFI_LEGACY_8259_END_OF_INTERRUPT)(\r
79964ac8	240	IN EFI_LEGACY_8259_PROTOCOL *This,\r
	241	IN EFI_8259_IRQ Irq\r
	242	);\r
	243	\r
	244	/**\r
	245	@par Protocol Description:\r
	246	Abstracts the 8259 and APIC hardware control between EFI usage and\r
	247	Compatibility16 usage.\r
	248	\r
	249	@param SetVectorBase\r
	250	Sets the vector bases for master and slave PICs.\r
	251	\r
	252	@param GetMask\r
	253	Gets IRQ and edge/level masks for 16-bit real mode and 32-bit protected mode.\r
	254	\r
	255	@param SetMask\r
	256	Sets the IRQ and edge\level masks for 16-bit real mode and 32-bit protected mode.\r
	257	\r
	258	@param SetMode\r
	259	Sets PIC mode to 16-bit real mode or 32-bit protected mode.\r
	260	\r
	261	@param GetVector\r
	262	Gets the base vector assigned to an IRQ.\r
	263	\r
	264	@param EnableIrq\r
	265	Enables an IRQ.\r
	266	\r
	267	@param DisableIrq\r
	268	Disables an IRQ.\r
	269	\r
	270	@param GetInterruptLine\r
	271	Gets an IRQ that is assigned to a PCI device.\r
	272	\r
	273	@param EndOfInterrupt\r
	274	Issues the end of interrupt command.\r
	275	\r
	276	**/\r
	277	struct _EFI_LEGACY_8259_PROTOCOL {\r
	278	EFI_LEGACY_8259_SET_VECTOR_BASE SetVectorBase;\r
	279	EFI_LEGACY_8259_GET_MASK GetMask;\r
	280	EFI_LEGACY_8259_SET_MASK SetMask;\r
	281	EFI_LEGACY_8259_SET_MODE SetMode;\r
	282	EFI_LEGACY_8259_GET_VECTOR GetVector;\r
	283	EFI_LEGACY_8259_ENABLE_IRQ EnableIrq;\r
	284	EFI_LEGACY_8259_DISABLE_IRQ DisableIrq;\r
	285	EFI_LEGACY_8259_GET_INTERRUPT_LINE GetInterruptLine;\r
	286	EFI_LEGACY_8259_END_OF_INTERRUPT EndOfInterrupt;\r
	287	};\r
	288	\r
	289	extern EFI_GUID gEfiLegacy8259ProtocolGuid;\r
	290	\r
	291	#endif\r