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79964ac8 1/** @file\r
8411f1c0 2 This file declares Pci Host Bridge Resource Allocation Protocol which \r
9ca1b12e 3 Provides the basic interfaces to abstract a PCI host bridge resource allocation. \r
4 This protocol is mandatory if the system includes PCI devices.\r
8411f1c0 5 \r
2bbaeb0d 6 Copyright (c) 2007 - 2009, Intel Corporation\r
79964ac8 7 All rights reserved. This program and the accompanying materials\r
8 are licensed and made available under the terms and conditions of the BSD License\r
9 which accompanies this distribution. The full text of the license may be found at\r
10 http://opensource.org/licenses/bsd-license.php\r
11\r
12 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
13 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
14\r
79964ac8 15 @par Revision Reference:\r
16 This protocol is defined in Framework of EFI Pci Host Bridge Resource Allocation Protocol Spec\r
17 Version 0.9\r
18\r
19**/\r
20\r
21#ifndef _PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_H_\r
22#define _PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_H_\r
23\r
226b35a9 24#include <Protocol/PciRootBridgeIo.h>\r
25\r
79964ac8 26#define EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_GUID \\r
27 { 0xCF8034BE, 0x6768, 0x4d8b, {0xB7,0x39,0x7C,0xCE,0x68,0x3A,0x9F,0xBE }}\r
28\r
29\r
30typedef struct _EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL;\r
31\r
32\r
33//\r
34// EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_ATTRIBUTES\r
35//\r
36\r
2bbaeb0d 37/// If this bit is set, then the PCI Root Bridge does not\r
38/// support separate windows for Non-prefetchable and Prefetchable\r
39/// memory. A PCI bus driver needs to include requests for Prefetchable\r
40/// memory in the Non-prefetchable memory pool.\r
41///\r
79964ac8 42#define EFI_PCI_HOST_BRIDGE_COMBINE_MEM_PMEM 1\r
43\r
2bbaeb0d 44///\r
45/// If this bit is set, then the PCI Root Bridge supports\r
46/// 64 bit memory windows. If this bit is not set,\r
47/// the PCI bus driver needs to include requests for 64 bit\r
48/// memory address in the corresponding 32 bit memory pool.\r
49///\r
79964ac8 50#define EFI_PCI_HOST_BRIDGE_MEM64_DECODE 2\r
51\r
d71479ca
LG
52typedef UINT64 EFI_RESOURCE_ALLOCATION_STATUS;\r
53\r
9ca1b12e 54///\r
d71479ca 55/// The request of this resource type could be fulfilled.\r
9ca1b12e 56///\r
d71479ca
LG
57#define EFI_RESOURCE_SATISFIED 0x0000000000000000ULL\r
58\r
9ca1b12e 59///\r
d71479ca
LG
60/// The request of this resource type could not be fulfilled for its\r
61/// absence in the host bridge resource pool.\r
9ca1b12e 62///\r
d71479ca 63#define EFI_RESOURCE_NOT_SATISFIED 0xFFFFFFFFFFFFFFFFULL\r
79964ac8 64\r
65//\r
66// EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE\r
67//\r
68typedef enum {\r
2bbaeb0d 69 ///\r
70 /// Reset the host bridge PCI apertures and internal data structures.\r
71 /// PCI enumerator should issue this notification before starting fresh\r
72 /// enumeration process. Enumeration cannot be restarted after sending\r
73 /// any other notification such as EfiPciHostBridgeBeginBusAllocation.\r
74 ///\r
79964ac8 75 EfiPciHostBridgeBeginEnumeration,\r
2bbaeb0d 76\r
77 ///\r
78 /// The bus allocation phase is about to begin. No specific action\r
79 /// is required here. This notification can be used to perform any\r
80 /// chipset specific programming. \r
81 ///\r
79964ac8 82 EfiPciHostBridgeBeginBusAllocation,\r
2bbaeb0d 83\r
84 ///\r
85 /// The bus allocation and bus programming phase is complete. No specific\r
86 /// action is required here. This notification can be used to perform any\r
87 /// chipset specific programming. \r
88 ///\r
79964ac8 89 EfiPciHostBridgeEndBusAllocation,\r
2bbaeb0d 90 \r
91 ///\r
92 /// The resource allocation phase is about to begin.No specific action is\r
93 /// required here. This notification can be used to perform any chipset specific programming. \r
94 ///\r
79964ac8 95 EfiPciHostBridgeBeginResourceAllocation,\r
2bbaeb0d 96 \r
97 ///\r
98 /// Allocate resources per previously submitted requests for all the PCI Root\r
99 /// Bridges. These resource settings are returned on the next call to\r
100 /// GetProposedResources(). \r
101 ///\r
79964ac8 102 EfiPciHostBridgeAllocateResources,\r
2bbaeb0d 103 \r
104 ///\r
105 /// Program the Host Bridge hardware to decode previously allocated resources\r
106 /// (proposed resources) for all the PCI Root Bridges.\r
107 ///\r
79964ac8 108 EfiPciHostBridgeSetResources,\r
2bbaeb0d 109 \r
110 ///\r
111 /// De-allocate previously allocated resources previously for all the PCI\r
112 /// Root Bridges and reset the I/O and memory apertures to initial state. \r
113 ///\r
79964ac8 114 EfiPciHostBridgeFreeResources,\r
2bbaeb0d 115 \r
116 ///\r
117 /// The resource allocation phase is completed. No specific action is required\r
118 /// here. This notification can be used to perform any chipset specific programming. \r
119 ///\r
79964ac8 120 EfiPciHostBridgeEndResourceAllocation\r
121} EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE;\r
122\r
2bbaeb0d 123///\r
9ca1b12e 124/// Definitions of 2 notification points.\r
2bbaeb0d 125///\r
79964ac8 126typedef enum {\r
2bbaeb0d 127 ///\r
128 /// This notification is only applicable to PCI-PCI bridges and\r
129 /// indicates that the PCI enumerator is about to begin enumerating\r
130 /// the bus behind the PCI-PCI Bridge. This notification is sent after\r
131 /// the primary bus number, the secondary bus number and the subordinate\r
132 /// bus number registers in the PCI-PCI Bridge are programmed to valid\r
133 /// (not necessary final) values\r
134 ///\r
79964ac8 135 EfiPciBeforeChildBusEnumeration,\r
2bbaeb0d 136\r
137 ///\r
138 /// This notification is sent before the PCI enumerator probes BAR registers\r
139 /// for every valid PCI function. \r
140 ///\r
79964ac8 141 EfiPciBeforeResourceCollection\r
142} EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE;\r
143\r
79964ac8 144/**\r
9ca1b12e 145 These are the notifications from the PCI bus driver that it is about to enter a certain phase of the PCI \r
146 enumeration process.\r
79964ac8 147\r
9ca1b12e 148 @param This Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL \r
149 instance.\r
79964ac8 150 @param Phase The phase during enumeration\r
151\r
9ca1b12e 152 @retval EFI_SUCCESS The notification was accepted without any errors.\r
153 @retval EFI_INVALID_PARAMETER The Phase is invalid.\r
154 @retval EFI_NOT_READY This phase cannot be entered at this time. For example, this error \r
155 is valid for a Phase of EfiPciHostBridgeAllocateResources if \r
156 SubmitResources() has not been called for one or more \r
157 PCI root bridges before this call.\r
158 @retval EFI_DEVICE_ERROR Programming failed due to a hardware error. This error is valid for \r
159 a Phase of EfiPciHostBridgeSetResources.\r
160 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources. \r
161 This error is valid for a Phase of EfiPciHostBridgeAllocateResources\r
162 if the previously submitted resource requests cannot be fulfilled or were only \r
163 partially fulfilled\r
79964ac8 164\r
165**/\r
166typedef\r
167EFI_STATUS\r
69686d56 168(EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_NOTIFY_PHASE)(\r
79964ac8 169 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r
170 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE Phase\r
171 );\r
172\r
173\r
174/**\r
9ca1b12e 175 Returns the device handle of the next PCI root bridge that is associated with this host bridge.\r
79964ac8 176\r
9ca1b12e 177 @param This Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL \r
178 instance.\r
179 @param RootBridgeHandle Returns the device handle of the next PCI root bridge. On input, it holds the \r
180 RootBridgeHandle that was returned by the most recent call to \r
181 GetNextRootBridge(). If RootBridgeHandle is NULL on input, the handle \r
182 for the first PCI root bridge is returned.\r
79964ac8 183\r
9ca1b12e 184 @retval EFI_SUCCESS The requested attribute information was returned.\r
185 @retval EFI_INVALID_PARAMETER RootBridgeHandle is not an EFI_HANDLE that was returned \r
186 on a previous call to GetNextRootBridge().\r
187 @retval EFI_NOT_FOUND There are no more PCI root bridge device handles.\r
79964ac8 188\r
189**/\r
190typedef\r
191EFI_STATUS\r
69686d56 192(EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_GET_NEXT_ROOT_BRIDGE)(\r
79964ac8 193 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r
194 IN OUT EFI_HANDLE *RootBridgeHandle\r
195 );\r
196\r
197\r
198/**\r
9ca1b12e 199 Returns the allocation attributes of a PCI root bridge.\r
79964ac8 200\r
9ca1b12e 201 @param This Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL \r
202 instance.\r
203 @param RootBridgeHandle The device handle of the PCI root bridge in which the caller is interested.\r
204 @param Attribute The pointer to attributes of the PCI root bridge.\r
79964ac8 205\r
9ca1b12e 206 @retval EFI_SUCCESS The requested attribute information was returned.\r
207 @retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.\r
208 @retval EFI_INVALID_PARAMETER Attributes is NULL.\r
79964ac8 209\r
210**/\r
211typedef\r
212EFI_STATUS\r
69686d56 213(EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_GET_ATTRIBUTES)(\r
79964ac8 214 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r
215 IN EFI_HANDLE RootBridgeHandle,\r
216 OUT UINT64 *Attributes\r
217 );\r
218\r
219\r
220/**\r
9ca1b12e 221 Sets up the specified PCI root bridge for the bus enumeration process.\r
79964ac8 222\r
9ca1b12e 223 @param This Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL \r
224 instance.\r
225 @param RootBridgeHandle The PCI root bridge to be set up.\r
226 @param Configuration Pointer to the pointer to the PCI bus resource descriptor.\r
79964ac8 227\r
9ca1b12e 228 @retval EFI_SUCCESS The PCI root bridge was set up and the bus range was returned in \r
229 Configuration.\r
230 @retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.\r
231 @retval EFI_DEVICE_ERROR Programming failed due to a hardware error.\r
232 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r
79964ac8 233\r
234**/\r
235typedef\r
236EFI_STATUS\r
69686d56 237(EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_START_BUS_ENUMERATION)(\r
79964ac8 238 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r
239 IN EFI_HANDLE RootBridgeHandle,\r
240 OUT VOID **Configuration\r
241 );\r
242\r
243\r
244/**\r
9ca1b12e 245 Programs the PCI root bridge hardware so that it decodes the specified PCI bus range.\r
79964ac8 246\r
9ca1b12e 247 @param This Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL\r
248 instance. \r
249 @param RootBridgeHandle The PCI root bridge whose bus range is to be programmed.\r
250 @param Configuration The pointer to the PCI bus resource descriptor..\r
79964ac8 251\r
9ca1b12e 252 @retval EFI_SUCCESS The bus range for the PCI root bridge was programmed.\r
253 @retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.\r
79964ac8 254 @retval EFI_INVALID_PARAMETER Configuration is NULL\r
9ca1b12e 255 @retval EFI_INVALID_PARAMETER Configuration does not point to a valid ACPI (2.0 & 3.0) \r
256 resource descriptor.\r
257 @retval EFI_INVALID_PARAMETER Configuration does not include a valid ACPI 2.0 bus resource\r
258 descriptor.\r
259 @retval EFI_INVALID_PARAMETER Configuration includes valid ACPI (2.0 & 3.0) resource \r
260 descriptors other than bus descriptors.\r
261 @retval EFI_INVALID_PARAMETER Configuration contains one or more invalid ACPI resource \r
262 descriptors.\r
263 @retval EFI_INVALID_PARAMETER "Address Range Minimum" is invalid for this root bridge.\r
264 @retval EFI_INVALID_PARAMETER "Address Range Length" is invalid for this root bridge.\r
265 @retval EFI_DEVICE_ERROR Programming failed due to a hardware error.\r
79964ac8 266\r
267**/\r
268typedef\r
269EFI_STATUS\r
69686d56 270(EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_SET_BUS_NUMBERS)(\r
79964ac8 271 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r
272 IN EFI_HANDLE RootBridgeHandle,\r
273 IN VOID *Configuration\r
274 );\r
275\r
276\r
277/**\r
9ca1b12e 278 Submits the I/O and memory resource requirements for the specified PCI root bridge.\r
279\r
280 @param This Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL \r
281 instance.\r
282 @param RootBridgeHandle The PCI root bridge whose I/O and memory resource requirements are being \r
283 submitted.\r
284 @param Configuration The pointer to the PCI I/O and PCI memory resource descriptor.\r
285\r
286 @retval EFI_SUCCESS The I/O and memory resource requests for a PCI root bridge were \r
287 accepted.\r
288 @retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.\r
289 @retval EFI_INVALID_PARAMETER Configuration is NULL.\r
290 @retval EFI_INVALID_PARAMETER Configuration does not point to a valid ACPI (2.0 & 3.0) \r
291 resource descriptor.\r
292 @retval EFI_INVALID_PARAMETER Configuration includes requests for one or more resource \r
293 types that are not supported by this PCI root bridge. This error will \r
294 happen if the caller did not combine resources according to \r
295 Attributes that were returned by GetAllocAttributes().\r
296 @retval EFI_INVALID_PARAMETER "Address Range Maximum" is invalid.\r
297 @retval EFI_INVALID_PARAMETER "Address Range Length" is invalid for this PCI root bridge.\r
298 @retval EFI_INVALID_PARAMETER "Address Space Granularity" is invalid for this PCI root bridge.\r
534b8251 299 \r
79964ac8 300**/\r
301typedef\r
302EFI_STATUS\r
69686d56 303(EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_SUBMIT_RESOURCES)(\r
79964ac8 304 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r
305 IN EFI_HANDLE RootBridgeHandle,\r
306 IN VOID *Configuration\r
307 );\r
308\r
309\r
310/**\r
9ca1b12e 311 Returns the proposed resource settings for the specified PCI root bridge.\r
79964ac8 312\r
9ca1b12e 313 @param This Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL \r
314 instance.\r
315 @param RootBridgeHandle The PCI root bridge handle.\r
316 @param Configuration The pointer to the pointer to the PCI I/O and memory resource descriptor.\r
79964ac8 317\r
9ca1b12e 318 @retval EFI_SUCCESS The requested parameters were returned.\r
319 @retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.\r
320 @retval EFI_DEVICE_ERROR Programming failed due to a hardware error.\r
321 @retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r
79964ac8 322\r
323**/\r
324typedef\r
325EFI_STATUS\r
69686d56 326(EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_GET_PROPOSED_RESOURCES)(\r
79964ac8 327 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r
328 IN EFI_HANDLE RootBridgeHandle,\r
329 OUT VOID **Configuration\r
330 );\r
331\r
332\r
333\r
334/**\r
9ca1b12e 335 Provides the hooks from the PCI bus driver to every PCI controller (device/function) at various \r
336 stages of the PCI enumeration process that allow the host bridge driver to preinitialize individual \r
337 PCI controllers before enumeration.\r
338\r
339 @param This Pointer to the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL instance.\r
340 @param RootBridgeHandle The associated PCI root bridge handle.\r
341 @param PciAddress The address of the PCI device on the PCI bus.\r
342 @param Phase The phase of the PCI device enumeration.\r
343\r
344 @retval EFI_SUCCESS The requested parameters were returned.\r
345 @retval EFI_INVALID_PARAMETER RootBridgeHandle is not a valid root bridge handle.\r
346 @retval EFI_INVALID_PARAMETER Phase is not a valid phase that is defined in \r
347 EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE.\r
348 @retval EFI_DEVICE_ERROR Programming failed due to a hardware error. The PCI enumerator \r
349 should not enumerate this device, including its child devices if it is \r
350 a PCI-to-PCI bridge.\r
79964ac8 351\r
352**/\r
353typedef\r
354EFI_STATUS\r
69686d56 355(EFIAPI *EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_PREPROCESS_CONTROLLER)(\r
79964ac8 356 IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL *This,\r
357 IN EFI_HANDLE RootBridgeHandle,\r
358 IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS PciAddress,\r
359 IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase\r
360 );\r
361\r
9ca1b12e 362///\r
363/// Provides the basic interfaces to abstract a PCI host bridge resource allocation.\r
364///\r
79964ac8 365struct _EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL {\r
2bbaeb0d 366 ///\r
367 /// The notification from the PCI bus enumerator that it is about to enter\r
368 /// a certain phase during the enumeration process.\r
369 ///\r
79964ac8 370 EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_NOTIFY_PHASE NotifyPhase;\r
2bbaeb0d 371 \r
372 ///\r
373 /// Retrieves the device handle for the next PCI root bridge that is produced by the\r
374 /// host bridge to which this instance of the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL is attached. \r
375 ///\r
79964ac8 376 EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_GET_NEXT_ROOT_BRIDGE GetNextRootBridge;\r
2bbaeb0d 377 \r
378 ///\r
379 /// Retrieves the allocation-related attributes of a PCI root bridge.\r
380 ///\r
79964ac8 381 EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_GET_ATTRIBUTES GetAllocAttributes;\r
2bbaeb0d 382 \r
383 ///\r
384 /// Sets up a PCI root bridge for bus enumeration.\r
385 ///\r
79964ac8 386 EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_START_BUS_ENUMERATION StartBusEnumeration;\r
2bbaeb0d 387 \r
388 ///\r
389 /// Sets up the PCI root bridge so that it decodes a specific range of bus numbers.\r
390 ///\r
79964ac8 391 EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_SET_BUS_NUMBERS SetBusNumbers;\r
2bbaeb0d 392 \r
393 ///\r
394 /// Submits the resource requirements for the specified PCI root bridge.\r
395 ///\r
79964ac8 396 EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_SUBMIT_RESOURCES SubmitResources;\r
2bbaeb0d 397 \r
398 ///\r
399 /// Returns the proposed resource assignment for the specified PCI root bridges.\r
400 ///\r
79964ac8 401 EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_GET_PROPOSED_RESOURCES GetProposedResources;\r
2bbaeb0d 402 \r
403 ///\r
404 /// Provides hooks from the PCI bus driver to every PCI controller\r
405 /// (device/function) at various stages of the PCI enumeration process that\r
406 /// allow the host bridge driver to preinitialize individual PCI controllers\r
407 /// before enumeration. \r
408 ///\r
79964ac8 409 EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL_PREPROCESS_CONTROLLER PreprocessController;\r
410};\r
411\r
412extern EFI_GUID gEfiPciHostBridgeResourceAllocationProtocolGuid;\r
413\r
414#endif\r