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79964ac8 | 1 | /** @file\r |
8411f1c0 | 2 | This file declares PlatfromOpRom protocols which provides the interface between \r |
3 | the PCI bus driver/PCI Host Bridge Resource Allocation driver and a platform-specific \r | |
4 | driver to describe the unique features of a platform. This\r | |
5 | protocol is optional.\r | |
6 | \r | |
7698f336 | 7 | Copyright (c) 2007 - 2009, Intel Corporation\r |
79964ac8 | 8 | All rights reserved. This program and the accompanying materials\r |
9 | are licensed and made available under the terms and conditions of the BSD License\r | |
10 | which accompanies this distribution. The full text of the license may be found at\r | |
11 | http://opensource.org/licenses/bsd-license.php\r | |
12 | \r | |
13 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
14 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
15 | \r | |
79964ac8 | 16 | @par Revision Reference:\r |
17 | This protocol is defined in PCI Platform Support Specification\r | |
18 | Version 0.9\r | |
19 | \r | |
20 | **/\r | |
21 | \r | |
22 | #ifndef _PCI_PLATFORM_H_\r | |
23 | #define _PCI_PLATFORM_H_\r | |
24 | \r | |
b80fbe85 | 25 | #include <PiDxe.h>\r |
26 | #include <Protocol/PciHostBridgeResourceAllocation.h>\r | |
27 | \r | |
79964ac8 | 28 | //\r |
29 | // Protocol for GUID.\r | |
30 | //\r | |
31 | \r | |
32 | #define EFI_PCI_PLATFORM_PROTOCOL_GUID \\r | |
33 | { 0x7d75280, 0x27d4, 0x4d69, {0x90, 0xd0, 0x56, 0x43, 0xe2, 0x38, 0xb3, 0x41} }\r | |
34 | \r | |
35 | typedef struct _EFI_PCI_PLATFORM_PROTOCOL EFI_PCI_PLATFORM_PROTOCOL;\r | |
36 | \r | |
37 | typedef UINT32 EFI_PCI_PLATFORM_POLICY;\r | |
38 | \r | |
7698f336 | 39 | //\r |
40 | // There are 4 legal combinations of following bit values:\r | |
41 | // EFI_RESERVE_NONE_IO_ALIAS,\r | |
42 | // EFI_RESERVE_ISA_IO_ALIAS | EFI_RESERVE_VGA_IO_ALIAS,\r | |
43 | // EFI_RESERVE_ISA_IO_NO_ALIAS | EFI_RESERVE_VGA_IO_ALIAS,\r | |
44 | // EFI_RESERVE_ISA_IO_NO_ALIAS | EFI_RESERVE_VGA_IO_NO_ALIAS\r | |
45 | //\r | |
79964ac8 | 46 | #define EFI_RESERVE_NONE_IO_ALIAS 0x0000\r |
47 | #define EFI_RESERVE_ISA_IO_ALIAS 0x0001\r | |
48 | #define EFI_RESERVE_ISA_IO_NO_ALIAS 0x0002\r | |
49 | #define EFI_RESERVE_VGA_IO_ALIAS 0x0004\r | |
50 | #define EFI_RESERVE_VGA_IO_NO_ALIAS 0x0008\r | |
51 | \r | |
7698f336 | 52 | ///\r |
53 | /// EFI_PCI_CHIPSET_EXECUTION_PHASE is used to call a platform protocol and execute\r | |
54 | /// platform-specific code.\r | |
55 | ///\r | |
79964ac8 | 56 | typedef enum {\r |
7698f336 | 57 | ///\r |
58 | /// The phase that indicates the entry point to the PCI Bus Notify phase. This\r | |
59 | /// platform hook is called before the PCI bus driver calls the\r | |
60 | /// EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL driver.\r | |
61 | ///\r | |
79964ac8 | 62 | ChipsetEntry,\r |
7698f336 | 63 | ///\r |
64 | /// The phase that indicates the exit point to the Chipset Notify phase before\r | |
65 | /// returning to the PCI Bus Driver Notify phase. This platform hook is called after\r | |
66 | /// the PCI bus driver calls the EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PROTOCOL\r | |
67 | /// driver.\r | |
68 | ///\r | |
79964ac8 | 69 | ChipsetExit,\r |
70 | MaximumChipsetPhase\r | |
71 | } EFI_PCI_CHIPSET_EXECUTION_PHASE;\r | |
72 | \r | |
73 | \r | |
74 | /**\r | |
7698f336 | 75 | The notification from the PCI bus enumerator to the platform that it is\r |
76 | about to enter a certain phase during the enumeration process.\r | |
77 | \r | |
79964ac8 | 78 | The PlatformNotify() function can be used to notify the platform driver so that\r |
79 | it can perform platform-specific actions. No specific actions are required.\r | |
80 | Eight notification points are defined at this time. More synchronization points\r | |
81 | may be added as required in the future. The PCI bus driver calls the platform driver\r | |
82 | twice for every Phase-once before the PCI Host Bridge Resource Allocation Protocol\r | |
83 | driver is notified, and once after the PCI Host Bridge Resource Allocation Protocol\r | |
84 | driver has been notified.\r | |
85 | This member function may not perform any error checking on the input parameters. It\r | |
86 | also does not return any error codes. If this member function detects any error condition,\r | |
87 | it needs to handle those errors on its own because there is no way to surface any\r | |
88 | errors to the caller.\r | |
89 | \r | |
90 | @param This Pointer to the EFI_PCI_PLATFORM_PROTOCOL instance.\r | |
91 | @param HostBridge The handle of the host bridge controller.\r | |
92 | @param Phase The phase of the PCI bus enumeration.\r | |
93 | @param ChipsetPhase Defines the execution phase of the PCI chipset driver.\r | |
94 | \r | |
95 | @retval EFI_SUCCESS The function completed successfully.\r | |
96 | \r | |
97 | **/\r | |
98 | typedef\r | |
99 | EFI_STATUS\r | |
69686d56 | 100 | (EFIAPI *EFI_PCI_PLATFORM_PHASE_NOTIFY)(\r |
79964ac8 | 101 | IN EFI_PCI_PLATFORM_PROTOCOL *This,\r |
102 | IN EFI_HANDLE HostBridge,\r | |
103 | IN EFI_PCI_HOST_BRIDGE_RESOURCE_ALLOCATION_PHASE Phase,\r | |
104 | IN EFI_PCI_CHIPSET_EXECUTION_PHASE ChipsetPhase\r | |
ed66e1bc | 105 | );\r |
79964ac8 | 106 | \r |
107 | \r | |
108 | /**\r | |
7698f336 | 109 | The notification from the PCI bus enumerator to the platform for each PCI\r |
110 | controller at several predefined points during PCI controller initialization.\r | |
111 | \r | |
79964ac8 | 112 | The PlatformPrepController() function can be used to notify the platform driver so that\r |
113 | it can perform platform-specific actions. No specific actions are required.\r | |
114 | Several notification points are defined at this time. More synchronization points may be\r | |
115 | added as required in the future. The PCI bus driver calls the platform driver twice for\r | |
116 | every PCI controller-once before the PCI Host Bridge Resource Allocation Protocol driver\r | |
117 | is notified, and once after the PCI Host Bridge Resource Allocation Protocol driver has\r | |
118 | been notified.\r | |
119 | This member function may not perform any error checking on the input parameters. It also\r | |
120 | does not return any error codes. If this member function detects any error condition, it\r | |
121 | needs to handle those errors on its own because there is no way to surface any errors to\r | |
122 | the caller.\r | |
123 | \r | |
124 | @param This Pointer to the EFI_PCI_PLATFORM_PROTOCOL instance.\r | |
125 | @param HostBridge The associated PCI host bridge handle.\r | |
126 | @param RootBridge The associated PCI root bridge handle.\r | |
127 | @param PciAddress The address of the PCI device on the PCI bus.\r | |
128 | @param Phase The phase of the PCI controller enumeration.\r | |
129 | @param ChipsetPhase Defines the execution phase of the PCI chipset driver.\r | |
130 | \r | |
131 | @retval EFI_SUCCESS The function completed successfully.\r | |
132 | \r | |
133 | **/\r | |
134 | typedef\r | |
135 | EFI_STATUS\r | |
69686d56 | 136 | (EFIAPI *EFI_PCI_PLATFORM_PREPROCESS_CONTROLLER)(\r |
79964ac8 | 137 | IN EFI_PCI_PLATFORM_PROTOCOL *This,\r |
138 | IN EFI_HANDLE HostBridge,\r | |
139 | IN EFI_HANDLE RootBridge,\r | |
140 | IN EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL_PCI_ADDRESS PciAddress,\r | |
141 | IN EFI_PCI_CONTROLLER_RESOURCE_ALLOCATION_PHASE Phase,\r | |
142 | IN EFI_PCI_CHIPSET_EXECUTION_PHASE ChipsetPhase\r | |
ed66e1bc | 143 | );\r |
79964ac8 | 144 | \r |
145 | \r | |
146 | /**\r | |
7698f336 | 147 | Retrieves the platform policy regarding enumeration.\r |
148 | \r | |
79964ac8 | 149 | The GetPlatformPolicy() function retrieves the platform policy regarding PCI\r |
150 | enumeration. The PCI bus driver and the PCI Host Bridge Resource Allocation Protocol\r | |
151 | driver can call this member function to retrieve the policy.\r | |
152 | \r | |
153 | @param This Pointer to the EFI_PCI_PLATFORM_PROTOCOL instance.\r | |
154 | @param PciPolicy The platform policy with respect to VGA and ISA aliasing.\r | |
155 | \r | |
156 | @retval EFI_SUCCESS The function completed successfully.\r | |
157 | @retval EFI_INVALID_PARAMETER PciPolicy is NULL.\r | |
158 | \r | |
159 | **/\r | |
160 | typedef\r | |
161 | EFI_STATUS\r | |
69686d56 | 162 | (EFIAPI *EFI_PCI_PLATFORM_GET_PLATFORM_POLICY)(\r |
79964ac8 | 163 | IN EFI_PCI_PLATFORM_PROTOCOL *This,\r |
164 | OUT EFI_PCI_PLATFORM_POLICY *PciPolicy\r | |
ed66e1bc | 165 | );\r |
79964ac8 | 166 | \r |
167 | \r | |
168 | /**\r | |
7698f336 | 169 | Gets the PCI device's option ROM from a platform-specific location.\r |
170 | \r | |
79964ac8 | 171 | The GetPciRom() function gets the PCI device's option ROM from a platform-specific location.\r |
172 | The option ROM will be loaded into memory. This member function is used to return an image\r | |
173 | that is packaged as a PCI 2.2 option ROM. The image may contain both legacy and EFI option\r | |
8a7d75b0 | 174 | ROMs. See the UEFI 2.0 Specification for details. This member function can be used to return\r |
79964ac8 | 175 | option ROM images for embedded controllers. Option ROMs for embedded controllers are typically\r |
176 | stored in platform-specific storage, and this member function can retrieve it from that storage\r | |
177 | and return it to the PCI bus driver. The PCI bus driver will call this member function before\r | |
178 | scanning the ROM that is attached to any controller, which allows a platform to specify a ROM\r | |
179 | image that is different from the ROM image on a PCI card.\r | |
180 | \r | |
181 | @param This Pointer to the EFI_PCI_PLATFORM_PROTOCOL instance.\r | |
182 | @param PciHandle The handle of the PCI device.\r | |
183 | @param RomImage If the call succeeds, the pointer to the pointer to the option ROM image.\r | |
184 | Otherwise, this field is undefined. The memory for RomImage is allocated\r | |
185 | by EFI_PCI_PLATFORM_PROTOCOL.GetPciRom() using the EFI Boot Service AllocatePool().\r | |
186 | It is the caller's responsibility to free the memory using the EFI Boot Service\r | |
187 | FreePool(), when the caller is done with the option ROM.\r | |
188 | @param RomSize If the call succeeds, a pointer to the size of the option ROM size. Otherwise,\r | |
189 | this field is undefined.\r | |
190 | \r | |
191 | @retval EFI_SUCCESS The option ROM was available for this device and loaded into memory.\r | |
192 | @retval EFI_NOT_FOUND No option ROM was available for this device.\r | |
193 | @retval EFI_OUT_OF_RESOURCES No memory was available to load the option ROM.\r | |
194 | @retval EFI_DEVICE_ERROR An error occurred in getting the option ROM.\r | |
195 | \r | |
196 | **/\r | |
197 | typedef\r | |
198 | EFI_STATUS\r | |
69686d56 | 199 | (EFIAPI *EFI_PCI_PLATFORM_GET_PCI_ROM)(\r |
79964ac8 | 200 | IN EFI_PCI_PLATFORM_PROTOCOL *This,\r |
201 | IN EFI_HANDLE PciHandle,\r | |
202 | OUT VOID **RomImage,\r | |
203 | OUT UINTN *RomSize\r | |
ed66e1bc | 204 | );\r |
79964ac8 | 205 | \r |
7698f336 | 206 | ///\r |
207 | /// This protocol provides the interface between the PCI bus driver/PCI Host\r | |
208 | /// Bridge Resource Allocation driver and a platform-specific driver to describe\r | |
209 | /// the unique features of a platform.\r | |
210 | ///\r | |
79964ac8 | 211 | struct _EFI_PCI_PLATFORM_PROTOCOL {\r |
7698f336 | 212 | EFI_PCI_PLATFORM_PHASE_NOTIFY PlatformNotify;\r |
79964ac8 | 213 | EFI_PCI_PLATFORM_PREPROCESS_CONTROLLER PlatformPrepController;\r |
214 | EFI_PCI_PLATFORM_GET_PLATFORM_POLICY GetPlatformPolicy;\r | |
215 | EFI_PCI_PLATFORM_GET_PCI_ROM GetPciRom;\r | |
216 | };\r | |
217 | \r | |
218 | extern EFI_GUID gEfiPciPlatformProtocolGuid;\r | |
219 | \r | |
220 | #endif\r |