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79964ac8 1/** @file\r
2 This file declares SMM Control abstraction protocol.\r
8411f1c0 3 This protocol is used initiate SMI/PMI activations. This protocol could be published by either of\r
4 the following:\r
5 - A processor driver to abstract the SMI/PMI IPI\r
6 - The driver that abstracts the ASIC that is supporting the APM port, such as the ICH in an\r
0b34b869 7 Intel chipset\r
8411f1c0 8 Because of the possibility of performing SMI or PMI IPI transactions, the ability to generate this\r
0b34b869 9 event from a platform chipset agent is an optional capability for both IA-32 and Itanium based\r
8411f1c0 10 systems.\r
79964ac8 11\r
053d9774 12 Copyright (c) 2007,2009 Intel Corporation\r
79964ac8 13 All rights reserved. This program and the accompanying materials\r
14 are licensed and made available under the terms and conditions of the BSD License\r
15 which accompanies this distribution. The full text of the license may be found at\r
16 http://opensource.org/licenses/bsd-license.php\r
17\r
18 THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
19 WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
20\r
21 Module Name: SmmControl.h\r
22\r
23 @par Revision Reference:\r
24 This Protocol is defined in Framework of EFI SMM Core Interface Spec\r
25 Version 0.9.\r
26\r
27**/\r
28\r
29#ifndef _SMM_CONTROL_H_\r
30#define _SMM_CONTROL_H_\r
31\r
b80fbe85 32\r
79964ac8 33typedef struct _EFI_SMM_CONTROL_PROTOCOL EFI_SMM_CONTROL_PROTOCOL;\r
34\r
35#define EFI_SMM_CONTROL_PROTOCOL_GUID \\r
36 { \\r
37 0x8d12e231, 0xc667, 0x4fd1, {0x98, 0xf2, 0x24, 0x49, 0xa7, 0xe7, 0xb2, 0xe5 } \\r
38 }\r
700a7869 39//\r
79964ac8 40// SMM Access specification Data Structures\r
41//\r
42typedef struct {\r
412fb9ef 43 /// \r
44 /// Describes the I/O location of the particular port that engendered the synchronous\r
45 /// SMI. For example, this location can include but is not limited to the traditional \r
46 /// PCAT* APM port of 0B2h.\r
47 ///\r
79964ac8 48 UINT8 SmiTriggerRegister;\r
412fb9ef 49 ///\r
50 /// Describes the value that was written to the respective activation port.\r
51 ///\r
79964ac8 52 UINT8 SmiDataRegister;\r
53} EFI_SMM_CONTROL_REGISTER;\r
54\r
55//\r
56// SMM Control specification member function\r
57//\r
58/**\r
59 Invokes SMI activation from either the preboot or runtime environment.\r
60\r
61 @param This The EFI_SMM_CONTROL_PROTOCOL instance.\r
62 @param ArgumentBuffer Optional sized data to pass into the protocol activation.\r
63 @param ArgumentBufferSize Optional size of the data.\r
64 @param Periodic Optional mechanism to engender a periodic stream.\r
65 @param ActivationInterval Optional parameter to repeat at this period one\r
66 time or, if the Periodic Boolean is set, periodically.\r
67\r
68 @retval EFI_SUCCESS The SMI/PMI has been engendered.\r
69 @retval EFI_DEVICE_ERROR The timing is unsupported.\r
70 @retval EFI_INVALID_PARAMETER The activation period is unsupported.\r
71 @retval EFI_NOT_STARTED The SMM base service has not been initialized.\r
72\r
73**/\r
74typedef\r
75EFI_STATUS\r
69686d56 76(EFIAPI *EFI_SMM_ACTIVATE)(\r
79964ac8 77 IN EFI_SMM_CONTROL_PROTOCOL *This,\r
78 IN OUT INT8 *ArgumentBuffer OPTIONAL,\r
79 IN OUT UINTN *ArgumentBufferSize OPTIONAL,\r
80 IN BOOLEAN Periodic OPTIONAL,\r
81 IN UINTN ActivationInterval OPTIONAL\r
82 );\r
83\r
84/**\r
85 Clears any system state that was created in response to the Active call.\r
86\r
87 @param This The EFI_SMM_CONTROL_PROTOCOL instance.\r
700a7869 88 @param Periodic Optional parameter to repeat at this period one \r
89 time or, if the Periodic Boolean is set, periodically.\r
79964ac8 90\r
91 @retval EFI_SUCCESS The SMI/PMI has been engendered.\r
92 @retval EFI_DEVICE_ERROR The source could not be cleared.\r
93 @retval EFI_INVALID_PARAMETER The service did not support the Periodic input argument.\r
94\r
95**/\r
96typedef\r
97EFI_STATUS\r
69686d56 98(EFIAPI *EFI_SMM_DEACTIVATE)(\r
79964ac8 99 IN EFI_SMM_CONTROL_PROTOCOL *This,\r
100 IN BOOLEAN Periodic OPTIONAL\r
101 );\r
102\r
103/**\r
104 Provides information on the source register used to generate the SMI.\r
105\r
106 @param This The EFI_SMM_CONTROL_PROTOCOL instance.\r
107 @param SmiRegister Pointer to the SMI register description structure\r
108\r
109 @retval EFI_SUCCESS The register structure has been returned.\r
412fb9ef 110 @retval EFI_DEVICE_ERROR The source could not be cleared.\r
111 @retval EFI_INVALID_PARAMETER The service did not support the Periodic input argument.\r
79964ac8 112\r
113**/\r
114typedef\r
115EFI_STATUS\r
69686d56 116(EFIAPI *EFI_SMM_GET_REGISTER_INFO)(\r
79964ac8 117 IN EFI_SMM_CONTROL_PROTOCOL *This,\r
118 IN OUT EFI_SMM_CONTROL_REGISTER *SmiRegister\r
119 );\r
120\r
121/**\r
122 @par Protocol Description:\r
123 This protocol is used initiate SMI/PMI activations.\r
124\r
125 @param Trigger\r
126 Initiates the SMI/PMI activation.\r
127\r
128 @param Clear\r
129 Quiesces the SMI/PMI activation.\r
130\r
131 @param GetRegisterInfo\r
132 Provides data on the register used as the source of the SMI.\r
133\r
134 @param MinimumTriggerPeriod\r
135 Minimum interval at which the platform can set the period.\r
136\r
412fb9ef 137 @retval EFI_SUCCESS The register structure has been returned.\r
79964ac8 138**/\r
139\r
053d9774 140//\r
141// SMM Control Protocol\r
142//\r
143/**\r
412fb9ef 144 This protocol is used initiate SMI/PMI activations. \r
145 This protocol could be published by either of the following:\r
146 - A processor driver to abstract the SMI/PMI IPI\r
c41da1c6 147 - The driver that abstracts the ASIC that is supporting the APM port, such as the ICH in an Intel chipset\r
412fb9ef 148 Because of the possibility of performing SMI or PMI IPI transactions, the ability to generate this\r
053d9774 149 \r
412fb9ef 150 The EFI_SMM_CONTROL_PROTOCOL is used by the platform chipset or processor driver. This\r
053d9774 151 protocol is useable both in boot services and runtime. The runtime aspect is so that an\r
152 implementation of EFI_SMM_BASE_PROTOCOL.Communicate() can layer upon this service\r
153 and provide an SMI callback from a general EFI runtime driver.\r
154 The purpose of this protocol is to provide an abstraction to the platform hardware that generates an\r
155 SMI or PMI. There are often I/O ports that, when accessed, will engender the\r
156**/\r
79964ac8 157struct _EFI_SMM_CONTROL_PROTOCOL {\r
412fb9ef 158 ///\r
159 /// Initiates the SMI/PMI activation.\r
160 ///\r
79964ac8 161 EFI_SMM_ACTIVATE Trigger;\r
412fb9ef 162 ///\r
163 /// Quiesces the SMI/PMI activation.\r
164 ///\r
79964ac8 165 EFI_SMM_DEACTIVATE Clear;\r
412fb9ef 166 ///\r
167 /// Provides data on the register used as the source of the SMI.\r
168 ///\r
79964ac8 169 EFI_SMM_GET_REGISTER_INFO GetRegisterInfo;\r
412fb9ef 170 ///\r
171 /// Minimum interval at which the platform can set the period. A maximum is not\r
172 /// specified in that the SMM infrastructure code can emulate a maximum interval that is\r
173 /// greater than the hardware capabilities by using software emulation in the SMM\r
174 /// infrastructure code.\r
175 ///\r
79964ac8 176 UINTN MinimumTriggerPeriod;\r
177};\r
178\r
179extern EFI_GUID gEfiSmmControlProtocolGuid;\r
180\r
181#endif\r