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79964ac8 1/** @file\r
5259c97d 2 This file declares the SMM Control abstraction protocol.\r
3 This protocol is used to initiate SMI/PMI activations. This protocol could be published by either:\r
8411f1c0 4 - A processor driver to abstract the SMI/PMI IPI\r
5 - The driver that abstracts the ASIC that is supporting the APM port, such as the ICH in an\r
0b34b869 6 Intel chipset\r
8411f1c0 7 Because of the possibility of performing SMI or PMI IPI transactions, the ability to generate this\r
5259c97d 8 event from a platform chipset agent is an optional capability for both IA-32 and Itanium-based\r
8411f1c0 9 systems.\r
79964ac8 10\r
1c2f052d 11Copyright (c) 2007 - 2018, Intel Corporation. All rights reserved.<BR>\r
22a69a5e 12SPDX-License-Identifier: BSD-2-Clause-Patent\r
79964ac8 13\r
79964ac8 14 @par Revision Reference:\r
15 This Protocol is defined in Framework of EFI SMM Core Interface Spec\r
16 Version 0.9.\r
17\r
18**/\r
19\r
20#ifndef _SMM_CONTROL_H_\r
21#define _SMM_CONTROL_H_\r
22\r
b80fbe85 23\r
79964ac8 24typedef struct _EFI_SMM_CONTROL_PROTOCOL EFI_SMM_CONTROL_PROTOCOL;\r
25\r
26#define EFI_SMM_CONTROL_PROTOCOL_GUID \\r
27 { \\r
28 0x8d12e231, 0xc667, 0x4fd1, {0x98, 0xf2, 0x24, 0x49, 0xa7, 0xe7, 0xb2, 0xe5 } \\r
29 }\r
700a7869 30//\r
79964ac8 31// SMM Access specification Data Structures\r
32//\r
33typedef struct {\r
1c2f052d 34 ///\r
412fb9ef 35 /// Describes the I/O location of the particular port that engendered the synchronous\r
1c2f052d 36 /// SMI. For example, this location can include but is not limited to the traditional\r
412fb9ef 37 /// PCAT* APM port of 0B2h.\r
38 ///\r
79964ac8 39 UINT8 SmiTriggerRegister;\r
412fb9ef 40 ///\r
41 /// Describes the value that was written to the respective activation port.\r
42 ///\r
79964ac8 43 UINT8 SmiDataRegister;\r
44} EFI_SMM_CONTROL_REGISTER;\r
45\r
46//\r
47// SMM Control specification member function\r
48//\r
49/**\r
50 Invokes SMI activation from either the preboot or runtime environment.\r
51\r
52 @param This The EFI_SMM_CONTROL_PROTOCOL instance.\r
f22f941e 53 @param ArgumentBuffer The optional sized data to pass into the protocol activation.\r
54 @param ArgumentBufferSize The optional size of the data.\r
55 @param Periodic An optional mechanism to periodically repeat activation.\r
56 @param ActivationInterval An optional parameter to repeat at this period one\r
79964ac8 57 time or, if the Periodic Boolean is set, periodically.\r
58\r
59 @retval EFI_SUCCESS The SMI/PMI has been engendered.\r
60 @retval EFI_DEVICE_ERROR The timing is unsupported.\r
61 @retval EFI_INVALID_PARAMETER The activation period is unsupported.\r
62 @retval EFI_NOT_STARTED The SMM base service has not been initialized.\r
63\r
64**/\r
65typedef\r
66EFI_STATUS\r
69686d56 67(EFIAPI *EFI_SMM_ACTIVATE)(\r
79964ac8 68 IN EFI_SMM_CONTROL_PROTOCOL *This,\r
69 IN OUT INT8 *ArgumentBuffer OPTIONAL,\r
70 IN OUT UINTN *ArgumentBufferSize OPTIONAL,\r
71 IN BOOLEAN Periodic OPTIONAL,\r
72 IN UINTN ActivationInterval OPTIONAL\r
73 );\r
74\r
75/**\r
76 Clears any system state that was created in response to the Active call.\r
77\r
78 @param This The EFI_SMM_CONTROL_PROTOCOL instance.\r
1c2f052d 79 @param Periodic Optional parameter to repeat at this period one\r
700a7869 80 time or, if the Periodic Boolean is set, periodically.\r
79964ac8 81\r
82 @retval EFI_SUCCESS The SMI/PMI has been engendered.\r
83 @retval EFI_DEVICE_ERROR The source could not be cleared.\r
84 @retval EFI_INVALID_PARAMETER The service did not support the Periodic input argument.\r
85\r
86**/\r
87typedef\r
88EFI_STATUS\r
69686d56 89(EFIAPI *EFI_SMM_DEACTIVATE)(\r
79964ac8 90 IN EFI_SMM_CONTROL_PROTOCOL *This,\r
91 IN BOOLEAN Periodic OPTIONAL\r
92 );\r
93\r
94/**\r
95 Provides information on the source register used to generate the SMI.\r
96\r
97 @param This The EFI_SMM_CONTROL_PROTOCOL instance.\r
f22f941e 98 @param SmiRegister A pointer to the SMI register description structure.\r
79964ac8 99\r
100 @retval EFI_SUCCESS The register structure has been returned.\r
412fb9ef 101 @retval EFI_DEVICE_ERROR The source could not be cleared.\r
102 @retval EFI_INVALID_PARAMETER The service did not support the Periodic input argument.\r
79964ac8 103\r
104**/\r
105typedef\r
106EFI_STATUS\r
69686d56 107(EFIAPI *EFI_SMM_GET_REGISTER_INFO)(\r
79964ac8 108 IN EFI_SMM_CONTROL_PROTOCOL *This,\r
109 IN OUT EFI_SMM_CONTROL_REGISTER *SmiRegister\r
110 );\r
111\r
112/**\r
113 @par Protocol Description:\r
5259c97d 114 This protocol is used to initiate SMI/PMI activations.\r
79964ac8 115\r
116 @param Trigger\r
117 Initiates the SMI/PMI activation.\r
118\r
119 @param Clear\r
120 Quiesces the SMI/PMI activation.\r
121\r
122 @param GetRegisterInfo\r
123 Provides data on the register used as the source of the SMI.\r
124\r
125 @param MinimumTriggerPeriod\r
126 Minimum interval at which the platform can set the period.\r
127\r
412fb9ef 128 @retval EFI_SUCCESS The register structure has been returned.\r
79964ac8 129**/\r
130\r
053d9774 131//\r
132// SMM Control Protocol\r
133//\r
134/**\r
1c2f052d 135 This protocol is used to initiate SMI/PMI activations.\r
5259c97d 136 This protocol could be published by either:\r
f22f941e 137 - A processor driver to abstract the SMI/PMI IPI.\r
138 - The driver that abstracts the ASIC that is supporting the APM port, such as the ICH in an Intel chipset.\r
139 Because of the possibility of performing SMI or PMI IPI transactions, the ability to generate this.\r
1c2f052d 140\r
412fb9ef 141 The EFI_SMM_CONTROL_PROTOCOL is used by the platform chipset or processor driver. This\r
5259c97d 142 protocol is usable both in boot services and at runtime. The runtime aspect enables an\r
143 implementation of EFI_SMM_BASE_PROTOCOL.Communicate() to layer upon this service\r
053d9774 144 and provide an SMI callback from a general EFI runtime driver.\r
5259c97d 145 This protocol provides an abstraction to the platform hardware that generates an\r
54f8d22a 146 SMI or PMI. There are often I/O ports that, when accessed, will engender the SMI or PMI.\r
147 Also, this hardware optionally supports the periodic genearation of these signals.\r
148\r
053d9774 149**/\r
79964ac8 150struct _EFI_SMM_CONTROL_PROTOCOL {\r
412fb9ef 151 ///\r
152 /// Initiates the SMI/PMI activation.\r
153 ///\r
79964ac8 154 EFI_SMM_ACTIVATE Trigger;\r
412fb9ef 155 ///\r
156 /// Quiesces the SMI/PMI activation.\r
157 ///\r
79964ac8 158 EFI_SMM_DEACTIVATE Clear;\r
412fb9ef 159 ///\r
160 /// Provides data on the register used as the source of the SMI.\r
161 ///\r
79964ac8 162 EFI_SMM_GET_REGISTER_INFO GetRegisterInfo;\r
412fb9ef 163 ///\r
164 /// Minimum interval at which the platform can set the period. A maximum is not\r
165 /// specified in that the SMM infrastructure code can emulate a maximum interval that is\r
166 /// greater than the hardware capabilities by using software emulation in the SMM\r
167 /// infrastructure code.\r
168 ///\r
79964ac8 169 UINTN MinimumTriggerPeriod;\r
170};\r
171\r
172extern EFI_GUID gEfiSmmControlProtocolGuid;\r
173\r
174#endif\r