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b295fbba
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1;; @file\r
2; This is the code that goes from real-mode to protected mode.\r
3; It consumes the reset vector, configures the stack.\r
4;\r
e37bb20c 5; Copyright (c) 2015 - 2018, Intel Corporation. All rights reserved.<BR>\r
b295fbba
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6; This program and the accompanying materials\r
7; are licensed and made available under the terms and conditions of the BSD License\r
8; which accompanies this distribution. The full text of the license may be found at\r
9; http://opensource.org/licenses/bsd-license.php.\r
10;\r
11; THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
12; WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
13;;\r
14\r
15;\r
16; Define assembler characteristics\r
17;\r
18\r
19extern ASM_PFX(TempRamInitApi)\r
20\r
21SECTION .text\r
22\r
23%macro RET_ESI 0\r
24\r
25 movd esi, mm7 ; restore ESP from MM7\r
26 jmp esi\r
27\r
28%endmacro\r
29\r
30;\r
31; Perform early platform initialization\r
32;\r
33global ASM_PFX(SecPlatformInit)\r
34ASM_PFX(SecPlatformInit):\r
35\r
36 RET_ESI\r
37\r
38;\r
39; Protected mode portion initializes stack, configures cache, and calls C entry point\r
40;\r
41\r
42;----------------------------------------------------------------------------\r
43;\r
44; Procedure: ProtectedModeEntryPoint\r
45;\r
46; Input: Executing in 32 Bit Protected (flat) mode\r
47; cs: 0-4GB\r
48; ds: 0-4GB\r
49; es: 0-4GB\r
50; fs: 0-4GB\r
51; gs: 0-4GB\r
52; ss: 0-4GB\r
53;\r
54; Output: This function never returns\r
55;\r
56; Destroys:\r
57; ecx\r
58; edi\r
59; esi\r
60; esp\r
61;\r
62; Description:\r
63; Perform any essential early platform initilaisation\r
64; Setup a stack\r
65;\r
66;----------------------------------------------------------------------------\r
67global ASM_PFX(ProtectedModeEntryPoint)\r
68ASM_PFX(ProtectedModeEntryPoint):\r
69 ;\r
70 ; Dummy function. Consume 2 API to make sure they can be linked.\r
71 ;\r
72 mov eax, ASM_PFX(TempRamInitApi)\r
73\r
74 ; Should never return\r
75 jmp $\r
76\r
77;\r
78; ROM-based Global-Descriptor Table for the PEI Phase\r
79;\r
80align 16\r
81global ASM_PFX(BootGdtTable)\r
82\r
83;\r
84; GDT[0]: 0x00: Null entry, never used.\r
85;\r
86NULL_SEL equ $ - GDT_BASE ; Selector [0]\r
87GDT_BASE:\r
88ASM_PFX(BootGdtTable): DD 0\r
89 DD 0\r
90;\r
91; Linear code segment descriptor\r
92;\r
93LINEAR_CODE_SEL equ $ - GDT_BASE ; Selector [0x8]\r
94 DW 0FFFFh ; limit 0xFFFF\r
95 DW 0 ; base 0\r
96 DB 0\r
97 DB 09Bh ; present, ring 0, data, expand-up, not-writable\r
98 DB 0CFh ; page-granular, 32-bit\r
99 DB 0\r
100;\r
101; System data segment descriptor\r
102;\r
103SYS_DATA_SEL equ $ - GDT_BASE ; Selector [0x10]\r
104 DW 0FFFFh ; limit 0xFFFF\r
105 DW 0 ; base 0\r
106 DB 0\r
107 DB 093h ; present, ring 0, data, expand-up, not-writable\r
108 DB 0CFh ; page-granular, 32-bit\r
109 DB 0\r
110\r
111GDT_SIZE EQU $ - GDT_BASE ; Size, in bytes\r
112\r
113;\r
114; GDT Descriptor\r
115;\r
116GdtDesc: ; GDT descriptor\r
117 DW GDT_SIZE - 1 ; GDT limit\r
118 DD GDT_BASE ; GDT base address\r
119\r
120global ASM_PFX(ProtectedModeEntryLinearAddress)\r
121global ASM_PFX(ProtectedModeEntryLinearOffset)\r
122\r
123ASM_PFX(ProtectedModeEntryLinearAddress):\r
124ASM_PFX(ProtectedModeEntryLinearOffset):\r
125 DD ASM_PFX(ProtectedModeEntryPoint) ; Offset of our 32 bit code\r
126 DW LINEAR_CODE_SEL\r
e37bb20c 127\r