]> git.proxmox.com Git - mirror_edk2.git/blame - IntelFsp2Pkg/Tools/Tests/QemuFspPkg.dsc
projects / mirror_edk2.git / blame
? search:
summary | shortlog | log | commit | commitdiff | tree
blob | blame (incremental) | history | HEAD
IntelFsp2Pkg: Consume MdeLibs.dsc.inc for RegisterFilterLib
[mirror_edk2.git] / IntelFsp2Pkg / Tools / Tests / QemuFspPkg.dsc
CommitLineData
27326112
LTL		 1## @file\r
2# FSP DSC build file for QEMU platform\r
3#\r
4# Copyright (c) 2017 - 2021, Intel Corporation. All rights reserved.<BR>\r
5#\r
6# This program and the accompanying materials\r
7# are licensed and made available under the terms and conditions of the BSD License\r
8# which accompanies this distribution. The full text of the license may be found at\r
9# http://opensource.org/licenses/bsd-license.php\r
10#\r
11# THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
12# WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
13#\r
14##\r
15\r
16################################################################################\r
17#\r
18# Defines Section - statements that will be processed to create a Makefile.\r
19#\r
20################################################################################\r
21[Defines]\r
22 PLATFORM_NAME = QemuFspPkg\r
23 PLATFORM_GUID = 1BEDB57A-7904-406e-8486-C89FC7FB39EE\r
24 PLATFORM_VERSION = 0.1\r
25 DSC_SPECIFICATION = 0x00010005\r
26 OUTPUT_DIRECTORY = Build/QemuFspPkg\r
27 SUPPORTED_ARCHITECTURES = IA32|X64\r
28 BUILD_TARGETS = DEBUG|RELEASE\r
29 SKUID_IDENTIFIER = DEFAULT\r
30 FLASH_DEFINITION = QemuFspPkg/QemuFspPkg.fdf\r
31\r
32 #\r
33 # UPD tool definition\r
34 #\r
35 FSP_T_UPD_TOOL_GUID = 34686CA3-34F9-4901-B82A-BA630F0714C6\r
36 FSP_V_UPD_TOOL_GUID = 4E2F4725-734A-4399-BAF5-B4E16348EB2F\r
37 FSP_M_UPD_TOOL_GUID = 39A250DB-E465-4DD1-A2AC-E2BD3C0E2385\r
38 FSP_S_UPD_TOOL_GUID = CAE3605B-5B34-4C85-B3D7-27D54273C40F\r
39 FSP_T_UPD_FFS_GUID = 70BCF6A5-FFB1-47D8-B1AE-EFE5508E23EA\r
40 FSP_V_UPD_FFS_GUID = 0197EF5E-2FFC-4089-8E55-F70400B18146\r
41 FSP_M_UPD_FFS_GUID = D5B86AEA-6AF7-40D4-8014-982301BC3D89\r
42 FSP_S_UPD_FFS_GUID = E3CD9B18-998C-4F76-B65E-98B154E5446F\r
43\r
44 #\r
45 # Set platform specific package/folder name, same as passed from PREBUILD script.\r
46 # PLATFORM_PACKAGE would be the same as PLATFORM_NAME as well as package build folder\r
47 # DEFINE only takes effect at R9 DSC and FDF.\r
48 #\r
49 DEFINE FSP_PACKAGE = QemuFspPkg\r
50 DEFINE FSP_IMAGE_ID = 0x245053464D455124 # $QEMFSP$\r
51 DEFINE FSP_IMAGE_REV = 0x00001010\r
52\r
53 DEFINE CAR_BASE_ADDRESS = 0x00000000\r
54 DEFINE CAR_REGION_SIZE = 0x00080000\r
55 DEFINE CAR_BLD_REGION_SIZE = 0x00070000\r
56 DEFINE CAR_FSP_REGION_SIZE = 0x00010000\r
57\r
58 DEFINE FSP_ARCH = X64\r
59\r
60################################################################################\r
61#\r
62# SKU Identification section - list of all SKU IDs supported by this\r
63# Platform.\r
64#\r
65################################################################################\r
66[SkuIds]\r
67 0|DEFAULT # The entry: 0|DEFAULT is reserved and always required.\r
68\r
69################################################################################\r
70#\r
71# Library Class section - list of all Library Classes needed by this Platform.\r
72#\r
73################################################################################\r
74\r
2ee287b9
DB		 75!include MdePkg/MdeLibs.dsc.inc\r
76\r
27326112
LTL		 77[LibraryClasses]\r
78 PeiCoreEntryPoint|MdePkg/Library/PeiCoreEntryPoint/PeiCoreEntryPoint.inf\r
79 PeimEntryPoint|MdePkg/Library/PeimEntryPoint/PeimEntryPoint.inf\r
80 DebugPrintErrorLevelLib|MdePkg/Library/BaseDebugPrintErrorLevelLib/BaseDebugPrintErrorLevelLib.inf\r
81 BaseLib|MdePkg/Library/BaseLib/BaseLib.inf\r
82 IoLib|MdePkg/Library/BaseIoLibIntrinsic/BaseIoLibIntrinsic.inf\r
83 PciLib|MdePkg/Library/BasePciLibPciExpress/BasePciLibPciExpress.inf\r
84 PciCf8Lib|MdePkg/Library/BasePciCf8Lib/BasePciCf8Lib.inf\r
85 PciExpressLib|MdePkg/Library/BasePciExpressLib/BasePciExpressLib.inf\r
86 BaseMemoryLib|MdePkg/Library/BaseMemoryLibRepStr/BaseMemoryLibRepStr.inf\r
87 PrintLib|MdePkg/Library/BasePrintLib/BasePrintLib.inf\r
88 PcdLib|MdePkg/Library/PeiPcdLib/PeiPcdLib.inf\r
89 HobLib|MdePkg/Library/PeiHobLib/PeiHobLib.inf\r
90 PeiServicesTablePointerLib|MdePkg/Library/PeiServicesTablePointerLibIdt/PeiServicesTablePointerLibIdt.inf\r
91 PeiServicesLib|MdePkg/Library/PeiServicesLib/PeiServicesLib.inf\r
92 MemoryAllocationLib|MdePkg/Library/PeiMemoryAllocationLib/PeiMemoryAllocationLib.inf\r
93 PeCoffGetEntryPointLib|MdePkg/Library/BasePeCoffGetEntryPointLib/BasePeCoffGetEntryPointLib.inf\r
94 ReportStatusCodeLib|MdeModulePkg/Library/PeiReportStatusCodeLib/PeiReportStatusCodeLib.inf\r
95 CacheMaintenanceLib|MdePkg/Library/BaseCacheMaintenanceLib/BaseCacheMaintenanceLib.inf\r
96 PeCoffLib|MdePkg/Library/BasePeCoffLib/BasePeCoffLib.inf\r
97 PeCoffExtraActionLib|MdePkg/Library/BasePeCoffExtraActionLibNull/BasePeCoffExtraActionLibNull.inf\r
98 UefiDecompressLib|MdePkg/Library/BaseUefiDecompressLib/BaseUefiDecompressLib.inf\r
99 SynchronizationLib|MdePkg/Library/BaseSynchronizationLib/BaseSynchronizationLib.inf\r
100 CpuLib|MdePkg/Library/BaseCpuLib/BaseCpuLib.inf\r
101 ExtractGuidedSectionLib|MdePkg/Library/PeiExtractGuidedSectionLib/PeiExtractGuidedSectionLib.inf\r
102 CacheLib|IntelFsp2Pkg/Library/BaseCacheLib/BaseCacheLib.inf\r
103 CacheAsRamLib|IntelFsp2Pkg/Library/BaseCacheAsRamLibNull/BaseCacheAsRamLibNull.inf\r
104 FspSwitchStackLib|IntelFsp2Pkg/Library/BaseFspSwitchStackLib/BaseFspSwitchStackLib.inf\r
105 FspCommonLib|IntelFsp2Pkg/Library/BaseFspCommonLib/BaseFspCommonLib.inf\r
106 FspPlatformLib|IntelFsp2Pkg/Library/BaseFspPlatformLib/BaseFspPlatformLib.inf\r
107 PlatformHookLib|MdeModulePkg/Library/BasePlatformHookLibNull/BasePlatformHookLibNull.inf\r
108 PerformanceLib|MdePkg/Library/BasePerformanceLibNull/BasePerformanceLibNull.inf\r
109 OemHookStatusCodeLib|MdeModulePkg/Library/OemHookStatusCodeLibNull/OemHookStatusCodeLibNull.inf\r
110 UefiCpuLib|UefiCpuPkg/Library/BaseUefiCpuLib/BaseUefiCpuLib.inf\r
111!if $(TARGET) == DEBUG\r
112 DebugLib|MdePkg/Library/BaseDebugLibSerialPort/BaseDebugLibSerialPort.inf\r
113 SerialPortLib|MdeModulePkg/Library/BaseSerialPortLib16550/BaseSerialPortLib16550.inf\r
114!else\r
115 DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf\r
116 SerialPortLib|MdePkg/Library/BaseSerialPortLibNull/BaseSerialPortLibNull.inf\r
117!endif\r
118\r
119\r
120################################################################################\r
121#\r
122# Pcd Section - list of all EDK II PCD Entries defined by this Platform\r
123#\r
124################################################################################\r
125[PcdsFixedAtBuild]\r
126 gEfiMdeModulePkgTokenSpaceGuid.PcdShadowPeimOnS3Boot | TRUE\r
127 gQemuFspPkgTokenSpaceGuid.PcdFspHeaderRevision | 0x03\r
128 gQemuFspPkgTokenSpaceGuid.PcdFspImageIdString | $(FSP_IMAGE_ID)\r
129 gQemuFspPkgTokenSpaceGuid.PcdFspImageRevision | $(FSP_IMAGE_REV)\r
130 #\r
131 # FSP CAR Usages (BL RAM | FSP RAM | FSP CODE)\r
132 #\r
133 gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamBase | $(CAR_BASE_ADDRESS)\r
134 gIntelFsp2PkgTokenSpaceGuid.PcdTemporaryRamSize | $(CAR_REGION_SIZE)\r
135 gIntelFsp2PkgTokenSpaceGuid.PcdFspTemporaryRamSize | $(CAR_FSP_REGION_SIZE)\r
136 gIntelFsp2PkgTokenSpaceGuid.PcdFspReservedBufferSize | 0x0100\r
137\r
138 # This defines how much space will be used for heap in FSP temporary memory\r
139 # x % of FSP temporary memory will be used for heap\r
140 # (100 - x) % of FSP temporary memory will be used for stack\r
141 gIntelFsp2PkgTokenSpaceGuid.PcdFspHeapSizePercentage | 65\r
142\r
143 # This is a platform specific global pointer used by FSP\r
144 gIntelFsp2PkgTokenSpaceGuid.PcdGlobalDataPointerAddress | 0xFED00148\r
145 gIntelFsp2PkgTokenSpaceGuid.PcdFspReservedMemoryLength | 0x00100000\r
146\r
147!if $(TARGET) == RELEASE\r
148 gEfiMdePkgTokenSpaceGuid.PcdFixedDebugPrintErrorLevel | 0x00000000\r
149 gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask | 0\r
150!else\r
151 gEfiMdePkgTokenSpaceGuid.PcdFixedDebugPrintErrorLevel | 0x80000047\r
152 gEfiMdePkgTokenSpaceGuid.PcdDebugPropertyMask | 0x27\r
153!endif\r
154\r
155[PcdsPatchableInModule]\r
156 gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress | 0xE0000000\r
157 #\r
158 # This entry will be patched during the build process\r
159 #\r
160 gEfiMdeModulePkgTokenSpaceGuid.PcdVpdBaseAddress | 0x12345678\r
161\r
162!if $(TARGET) == RELEASE\r
163 gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel | 0\r
164!else\r
165 gEfiMdePkgTokenSpaceGuid.PcdDebugPrintErrorLevel | 0x80000047\r
166!endif\r
167\r
168[PcdsDynamicVpd.Upd]\r
169 #\r
170 # This section is not used by the normal build process\r
171 # However, FSP will use dedicated tool to handle it and generate a\r
172 # VPD similar binary block (User Configuration Data). This block will\r
173 # be accessed through a generated data structure directly rather than\r
174 # PCD services. This is for size consideration.\r
175 # Format:\r
176 # gQemuFspPkgTokenSpaceGuid.Updxxxxxxxxxxxxn | OFFSET | LENGTH | VALUE\r
177 # Only simple data type is supported\r
178 #\r
179\r
180 #\r
181 # Comments with !BSF will be used to generate BSF file\r
182 # Comments with !HDR will be used to generate H header file\r
183 #\r
184\r
185 # Global definitions in BSF\r
186 # !BSF PAGES:{TMP:"FSP T", MEM:"FSP MemoryInit Settings", SIL:"FSP SiliconInit Settings"}\r
187 # !BSF BLOCK:{NAME:"QEMU Platform", VER:"0.1"}\r
188\r
189 # !BSF FIND:{QEMUPD_T}\r
190 # !HDR COMMENT:{FSP_UPD_HEADER:FSP UPD Header}\r
191 # !HDR EMBED:{FSP_UPD_HEADER:FspUpdHeader:START}\r
192 # FsptUpdSignature: {QEMUPD_T}\r
193 gQemuFspPkgTokenSpaceGuid.Signature | * | 0x08 | 0x545F4450554D4551\r
194 # !BSF NAME:{FsptUpdRevision}\r
195 gQemuFspPkgTokenSpaceGuid.Revision | * | 0x01 | 0x01\r
196 # !HDR EMBED:{FSP_UPD_HEADER:FspUpdHeader:END}\r
197 gQemuFspPkgTokenSpaceGuid.Reserved | * | 0x17 | {0x00}\r
198\r
199 # !HDR COMMENT:{FSPT_ARCH_UPD:FSPT_ARCH_UPD}\r
200 # !HDR EMBED:{FSPT_ARCH_UPD:FsptArchUpd:START}\r
201 gQemuFspPkgTokenSpaceGuid.Revision | * | 0x01 | 0x01\r
202 gQemuFspPkgTokenSpaceGuid.Reserved | * | 0x03 | {0x00}\r
203 gQemuFspPkgTokenSpaceGuid.Length | * | 0x04 | 0x00000020\r
204 gQemuFspPkgTokenSpaceGuid.FspDebugHandler | * | 0x04 | 0x00000000\r
205 # !HDR EMBED:{FSPT_ARCH_UPD:FsptArchUpd:END}\r
206 gQemuFspPkgTokenSpaceGuid.Reserved1 | * | 0x14 | {0x00}\r
207\r
208 # !HDR COMMENT:{FSPT_COMMON_UPD:Fsp T Common UPD}\r
209 # !HDR EMBED:{FSPT_COMMON_UPD:FsptCommonUpd:START}\r
210 gQemuFspPkgTokenSpaceGuid.Revision | * | 0x01 | 0x01\r
211 gQemuFspPkgTokenSpaceGuid.Reserved | * | 0x03 | {0x00}\r
212\r
213 # Base address of the microcode region.\r
214 gQemuFspPkgTokenSpaceGuid.MicrocodeRegionBase | * | 0x04 | 0x00000000\r
215\r
216 # Length of the microcode region.\r
217 gQemuFspPkgTokenSpaceGuid.MicrocodeRegionLength | * | 0x04 | 0x00000000\r
218\r
219 # Base address of the cacheable flash region.\r
220 gQemuFspPkgTokenSpaceGuid.CodeRegionBase | * | 0x04 | 0x00000000\r
221\r
222 # Length of the cacheable flash region.\r
223 gQemuFspPkgTokenSpaceGuid.CodeRegionLength | * | 0x04 | 0x00000000\r
224\r
225 # !HDR EMBED:{FSPT_COMMON_UPD:FsptCommonUpd:END}\r
226 gQemuFspPkgTokenSpaceGuid.Reserved1 | * | 0x0C | {0x00}\r
227\r
228 # !HDR COMMENT:{FSP_T_CONFIG:Fsp T Configuration}\r
229 # !HDR EMBED:{FSP_T_CONFIG:FsptConfig:START}\r
230 # !BSF PAGE:{TMP}\r
231 # !BSF NAME:{Chicken bytes to test Hex config}\r
232 # !BSF TYPE:{EditNum, HEX, (0x00000000,0xFFFFFFFF)}\r
233 # !BSF HELP:{This option shows how to present option for 4 bytes data}\r
234 gQemuFspPkgTokenSpaceGuid.ChickenBytes | * | 0x04 | 0x00000000\r
235\r
236 # !HDR EMBED:{FSP_T_CONFIG:FsptConfig:END}\r
237 gQemuFspPkgTokenSpaceGuid.ReservedFsptUpd1 | * | 0x1C | {0x00}\r
238\r
239 # Note please keep "UpdTerminator" at the end of each UPD region.\r
240 # The tool will use this field to determine the actual end of the UPD data\r
241 # structure.\r
242 gQemuFspPkgTokenSpaceGuid.UpdTerminator | * | 0x02 | 0x55AA\r
243\r
244 ################################################################################\r
245 #\r
246 # UPDs consumed in FspMemoryInit Api\r
247 #\r
248 ################################################################################\r
249 # !BSF FIND:{QEMUPD_M}\r
250 # !HDR COMMENT:{FSP_UPD_HEADER:FSP UPD Header}\r
251 # !HDR EMBED:{FSP_UPD_HEADER:FspUpdHeader:START}\r
252 # FspmUpdSignature: {QEMUPD_M}\r
253 gQemuFspPkgTokenSpaceGuid.Signature | * | 0x08 | 0x4D5F4450554D4551\r
254 # !BSF NAME:{FspmUpdRevision}\r
255 gQemuFspPkgTokenSpaceGuid.Revision | * | 0x01 | 0x01\r
256 # !HDR EMBED:{FSP_UPD_HEADER:FspUpdHeader:END}\r
257 gQemuFspPkgTokenSpaceGuid.Reserved | * | 0x17 | {0x00}\r
258\r
259 # !HDR COMMENT:{FSPM_ARCH_UPD:Fsp M Architectural UPD}\r
260 # !HDR EMBED:{FSPM_ARCH_UPD:FspmArchUpd:START}\r
261\r
262 gQemuFspPkgTokenSpaceGuid.Revision | * | 0x01 | 0x01\r
263\r
264 gQemuFspPkgTokenSpaceGuid.Reserved | * | 0x03 | {0x00}\r
265\r
266 # !HDR STRUCT:{VOID*}\r
267 gQemuFspPkgTokenSpaceGuid.NvsBufferPtr | * | 0x04 | 0x00000000\r
268\r
269 # !HDR STRUCT:{VOID*}\r
270 # !BSF NAME:{StackBase}\r
271 # !BSF HELP:{Stack base for FSP use. Default: 0xFEF16000}\r
272 gQemuFspPkgTokenSpaceGuid.StackBase | * | 0x04 | $(CAR_BLD_REGION_SIZE)\r
273\r
274 # !BSF NAME:{StackSize}\r
275 # !BSF HELP:{To pass the stack size for FSP use. Bootloader can programmatically get the FSP requested StackSize by using the defaults in the FSP-M component. This is the minimum stack size expected by this revision of FSP. Default: 0x2A000}\r
276 gQemuFspPkgTokenSpaceGuid.StackSize | * | 0x04 | $(CAR_FSP_REGION_SIZE)\r
277\r
278 # !BSF NAME:{BootLoaderTolumSize}\r
279 # !BSF HELP:{To pass Bootloader Tolum size.}\r
280 gQemuFspPkgTokenSpaceGuid.BootLoaderTolumSize | * | 0x04 | 0x00000000\r
281\r
282 # !BSF NAME:{Bootmode}\r
283 # !BSF HELP:{To maintain Bootmode details.}\r
284 gPlatformFspPkgTokenSpaceGuid.Bootmode | * | 0x04 | 0x00000000\r
285\r
286 # !HDR EMBED:{FSPM_ARCH_UPD:FspmArchUpd:END}\r
287 gQemuFspPkgTokenSpaceGuid.Reserved1 | * | 0x08 | {0x00}\r
288\r
289 # !HDR COMMENT:{FSP_M_CONFIG:Fsp M Configuration}\r
290 # !HDR EMBED:{FSP_M_CONFIG:FspmConfig:START}\r
291 # !BSF PAGE:{MEM}\r
292 # !BSF NAME:{Debug Serial Port Base address}\r
293 # !BSF TYPE:{EditNum, HEX, (0x00000000,0xFFFFFFFF)}\r
294 # !BSF HELP:{Debug serial port base address. This option will be used only when the 'Serial Port Debug Device'}\r
295 # !BSF HELP:{+ option is set to 'External Device'. 0x00000000(Default).}\r
296 gQemuFspPkgTokenSpaceGuid.SerialDebugPortAddress | * | 0x04 | 0x00000000\r
297\r
298 # !BSF NAME:{Debug Serial Port Type} TYPE:{Combo}\r
299 # !BSF OPTION:{0:NONE, 1:I/O, 2:MMIO}\r
300 # !BSF HELP:{16550 compatible debug serial port resource type. NONE means no serial port support. 0x02:MMIO(Default).}\r
301 gQemuFspPkgTokenSpaceGuid.SerialDebugPortType | * | 0x01 | 0x02\r
302\r
303 # !BSF NAME:{Serial Port Debug Device} TYPE:{Combo}\r
304 # !BSF OPTION:{0:SOC UART0, 1:SOC UART1, 2:SOC UART2, 3:External Device}\r
305 # !BSF HELP:{Select active serial port device for debug.}\r
306 # !BSF HELP:{+For SOC UART devices,'Debug Serial Port Base' options will be ignored. 0x02:SOC UART2(Default).}\r
307 gQemuFspPkgTokenSpaceGuid.SerialDebugPortDevice | * | 0x01 | 0x02\r
308\r
309 # !BSF NAME:{Debug Serial Port Stride Size} TYPE:{Combo}\r
310 # !BSF OPTION:{0:1, 2:4}\r
311 # !BSF HELP:{Debug serial port register map stride size in bytes. 0x00:1, 0x02:4(Default).}\r
312 gQemuFspPkgTokenSpaceGuid.SerialDebugPortStrideSize | * | 0x01 | 0x02\r
313\r
314\r
315 # !HDR EMBED:{FSP_M_CONFIG:FspmConfig:END}\r
316 gQemuFspPkgTokenSpaceGuid.ReservedFspmUpd | * | 0x04 | {0x00}\r
317\r
318\r
319 # Note please keep "UpdTerminator" at the end of each UPD region.\r
320 # The tool will use this field to determine the actual end of the UPD data\r
321 # structure.\r
322 gQemuFspPkgTokenSpaceGuid.UpdTerminator | * | 0x02 | 0x55AA\r
323\r
324 ################################################################################\r
325 #\r
326 # UPDs consumed in FspSiliconInit Api\r
327 #\r
328 ################################################################################\r
329 # !BSF FIND:{QEMUPD_S}\r
330 # !HDR COMMENT:{FSP_UPD_HEADER:FSP UPD Header}\r
331 # !HDR EMBED:{FSP_UPD_HEADER:FspUpdHeader:START}\r
332 # FspsUpdSignature: {QEMUPD_S}\r
333 gQemuFspPkgTokenSpaceGuid.Signature | * | 0x08 | 0x535F4450554D4551\r
334 # !BSF NAME:{FspsUpdRevision}\r
335 gQemuFspPkgTokenSpaceGuid.Revision | * | 0x01 | 0x01\r
336 # !HDR EMBED:{FSP_UPD_HEADER:FspUpdHeader:END}\r
337 gQemuFspPkgTokenSpaceGuid.Reserved | * | 0x17 | {0x00}\r
338\r
339 # !HDR COMMENT:{FSPS_ARCH_UPD:FSPS_ARCH_UPD}\r
340 # !HDR EMBED:{FSPS_ARCH_UPD:FspsArchUpd:START}\r
341 gQemuFspPkgTokenSpaceGuid.Revision | * | 0x01 | 0x01\r
342 gQemuFspPkgTokenSpaceGuid.Reserved | * | 0x03 | {0x00}\r
343 gQemuFspPkgTokenSpaceGuid.Length | * | 0x04 | 0x00000020\r
344 gQemuFspPkgTokenSpaceGuid.FspEventHandler | * | 0x04 | 0x00000000\r
345 gQemuFspPkgTokenSpaceGuid.EnableMultiPhaseSiliconInit | * | 0x01 | 0x00\r
346 # !HDR EMBED:{FSPS_ARCH_UPD:FspsArchUpd:END}\r
347 gQemuFspPkgTokenSpaceGuid.Reserved1 | * | 0x13 | {0x00}\r
348\r
349 # !HDR COMMENT:{FSP_S_CONFIG:Fsp S Configuration}\r
350 # !HDR EMBED:{FSP_S_CONFIG:FspsConfig:START}\r
351 # !BSF PAGE:{SIL}\r
352\r
353 # !BSF NAME:{BMP Logo Data Size}\r
354 # !BSF TYPE:{Reserved}\r
355 # !BSF HELP:{BMP logo data buffer size. 0x00000000(Default).}\r
356 gQemuFspPkgTokenSpaceGuid.LogoSize | * | 0x04 | 0x00000000\r
357\r
358 # !BSF NAME:{BMP Logo Data Pointer}\r
359 # !BSF TYPE:{Reserved}\r
360 # !BSF HELP:{BMP logo data pointer to a BMP format buffer. 0x00000000(Default).}\r
361 gQemuFspPkgTokenSpaceGuid.LogoPtr | * | 0x04 | 0x00000000\r
362\r
363 # !BSF NAME:{Graphics Configuration Data Pointer}\r
364 # !BSF TYPE:{Reserved}\r
365 # !BSF HELP:{Graphics configuration data used for initialization. 0x00000000(Default).}\r
366 gQemuFspPkgTokenSpaceGuid.GraphicsConfigPtr | * | 0x04 | 0x00000000\r
367\r
368 # !BSF NAME:{PCI GFX Temporary MMIO Base}\r
369 # !BSF TYPE:{EditNum, HEX, (0x80000000,0xDFFFFFFF)}\r
370 # !BSF HELP:{PCI Temporary PCI GFX Base used before full PCI enumeration. 0x80000000(Default).}\r
371 gQemuFspPkgTokenSpaceGuid.PciTempResourceBase | * | 0x04 | 0x80000000\r
372\r
373 # !HDR EMBED:{FSP_S_CONFIG:FspsConfig:END}\r
374 gQemuFspPkgTokenSpaceGuid.ReservedFspsUpd | * | 0x01 | 0x00\r
375\r
376 # Note please keep "UpdTerminator" at the end of each UPD region.\r
377 # The tool will use this field to determine the actual end of the UPD data\r
378 # structure.\r
379 gQemuFspPkgTokenSpaceGuid.UpdTerminator | * | 0x02 | 0x55AA\r
380\r
381###################################################################################################\r
382#\r
383# Components Section - list of the modules and components that will be processed by compilation\r
384# tools and the EDK II tools to generate PE32/PE32+/Coff image files.\r
385#\r
386# Note: The EDK II DSC file is not used to specify how compiled binary images get placed\r
387# into firmware volume images. This section is just a list of modules to compile from\r
388# source into UEFI-compliant binaries.\r
389# It is the FDF file that contains information on combining binary files into firmware\r
390# volume images, whose concept is beyond UEFI and is described in PI specification.\r
391# Binary modules do not need to be listed in this section, as they should be\r
392# specified in the FDF file. For example: Shell binary (Shell_Full.efi), FAT binary (Fat.efi),\r
393# Logo (Logo.bmp), and etc.\r
394# There may also be modules listed in this section that are not required in the FDF file,\r
395# When a module listed here is excluded from FDF file, then UEFI-compliant binary will be\r
396# generated for it, but the binary will not be put into any firmware volume.\r
397#\r
398###################################################################################################\r
399[Components.IA32]\r
400 #\r
401 # FSP Binary Components\r
402 #\r
403 $(FSP_PACKAGE)/FspHeader/FspHeader.inf\r
404\r
405 #\r
406 # SEC\r
407 #\r
408 IntelFsp2Pkg/FspSecCore/FspSecCoreT.inf {\r
409 <LibraryClasses>\r
410 FspSecPlatformLib|$(FSP_PACKAGE)/Library/PlatformSecLib/Vtf0PlatformSecTLib.inf\r
411 }\r
412\r
413[Components.$(FSP_ARCH)]\r
414 IntelFsp2Pkg/FspSecCore/FspSecCoreV.inf {\r
415 <LibraryClasses>\r
416 FspSecPlatformLib|$(FSP_PACKAGE)/Library/PlatformSecLib/Vtf0PlatformSecVLib.inf\r
417 }\r
418\r
419 IntelFsp2Pkg/FspSecCore/FspSecCoreM.inf {\r
420 <LibraryClasses>\r
421 FspSecPlatformLib|$(FSP_PACKAGE)/Library/PlatformSecLib/Vtf0PlatformSecMLib.inf\r
422 }\r
423\r
424 IntelFsp2Pkg/FspSecCore/FspSecCoreS.inf {\r
425 <LibraryClasses>\r
426 FspSecPlatformLib|$(FSP_PACKAGE)/Library/PlatformSecLib/Vtf0PlatformSecSLib.inf\r
427 }\r
428\r
429 #\r
430 # PEI Core\r
431 #\r
432 MdeModulePkg/Core/Pei/PeiMain.inf\r
433\r
434 #\r
435 # PCD\r
436 #\r
437 MdeModulePkg/Universal/PCD/Pei/Pcd.inf {\r
438 <LibraryClasses>\r
439 DebugLib|MdePkg/Library/BaseDebugLibNull/BaseDebugLibNull.inf\r
440 PcdLib|MdePkg/Library/BasePcdLibNull/BasePcdLibNull.inf\r
441 }\r
442\r
443 $(FSP_PACKAGE)/FspvInit/FspvInit.inf\r
444 $(FSP_PACKAGE)/FspmInit/FspmInit.inf\r
445 $(FSP_PACKAGE)/FspsInit/FspsInit.inf\r
446 $(FSP_PACKAGE)/QemuVideo/QemuVideo.inf\r
447 MdeModulePkg/Core/DxeIplPeim/DxeIpl.inf {\r
448 <LibraryClasses>\r
449 DebugAgentLib|MdeModulePkg/Library/DebugAgentLibNull/DebugAgentLibNull.inf\r
450 ResetSystemLib|MdeModulePkg/Library/BaseResetSystemLibNull/BaseResetSystemLibNull.inf\r
451 }\r
452 IntelFsp2Pkg/FspNotifyPhase/FspNotifyPhasePeim.inf\r
453\r
454###################################################################################################\r
455#\r
456# BuildOptions Section - Define the module specific tool chain flags that should be used as\r
457# the default flags for a module. These flags are appended to any\r
458# standard flags that are defined by the build process. They can be\r
459# applied for any modules or only those modules with the specific\r
460# module style (EDK or EDKII) specified in [Components] section.\r
461#\r
462###################################################################################################\r
463[BuildOptions]\r
464# Append build options for EDK and EDKII drivers (= is Append, == is Replace)\r
465 # Enable link-time optimization when building with GCC49\r
466 *_GCC49_IA32_CC_FLAGS = -flto\r
467 *_GCC49_IA32_DLINK_FLAGS = -flto\r
468 *_GCC5_IA32_CC_FLAGS = -fno-pic\r
469 *_GCC5_IA32_DLINK_FLAGS = -no-pie\r
470 *_GCC5_IA32_ASLCC_FLAGS = -fno-pic\r
471 *_GCC5_IA32_ASLDLINK_FLAGS = -no-pie\r
EFI Development Kit II mirror for PVE