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cf1d4549 JY |
1 | /** @file\r |
2 | Sample to provide TempRamInitParams data.\r | |
3 | \r | |
4 | Copyright (c) 2014 - 2016, Intel Corporation. All rights reserved.<BR>\r | |
512e23a3 | 5 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
cf1d4549 JY |
6 | \r |
7 | **/\r | |
8 | \r | |
9 | #include <Library/PcdLib.h>\r | |
10 | #include <FspEas.h>\r | |
11 | \r | |
12 | typedef struct {\r | |
13 | UINT32 MicrocodeRegionBase;\r | |
14 | UINT32 MicrocodeRegionSize;\r | |
15 | UINT32 CodeRegionBase;\r | |
16 | UINT32 CodeRegionSize;\r | |
17 | } FSPT_CORE_UPD;\r | |
18 | \r | |
19 | typedef struct {\r | |
20 | FSP_UPD_HEADER FspUpdHeader;\r | |
21 | FSPT_CORE_UPD FsptCoreUpd;\r | |
22 | } FSPT_UPD_CORE_DATA;\r | |
23 | \r | |
24 | GLOBAL_REMOVE_IF_UNREFERENCED CONST FSPT_UPD_CORE_DATA FsptUpdDataPtr = {\r | |
25 | {\r | |
26 | 0x4450555F54505346,\r | |
27 | 0x00,\r | |
28 | { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r | |
29 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00\r | |
30 | }\r | |
31 | },\r | |
32 | {\r | |
33 | ((UINT32)FixedPcdGet64 (PcdCpuMicrocodePatchAddress) + FixedPcdGet32 (PcdFlashMicrocodeOffset)),\r | |
34 | ((UINT32)FixedPcdGet64 (PcdCpuMicrocodePatchRegionSize) - FixedPcdGet32 (PcdFlashMicrocodeOffset)),\r | |
35 | FixedPcdGet32 (PcdFlashCodeCacheAddress),\r | |
36 | FixedPcdGet32 (PcdFlashCodeCacheSize),\r | |
37 | }\r | |
38 | };\r | |
39 | \r |