projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| cf1d4549 JY |
1 | /** @file\r |
| 2 | Sample to provide TempRamInitParams data.\r | |
| 3 | \r | |
| 91a03f78 | 4 | Copyright (c) 2014 - 2022, Intel Corporation. All rights reserved.<BR>\r |
| 512e23a3 | 5 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
| cf1d4549 JY |
6 | \r |
| 7 | **/\r | |
| 8 | \r | |
| 9 | #include <Library/PcdLib.h>\r | |
| 10 | #include <FspEas.h>\r | |
| 11 | \r | |
| 12 | typedef struct {\r | |
| 7c424c28 MK |
13 | EFI_PHYSICAL_ADDRESS MicrocodeRegionBase;\r |
| 14 | UINT64 MicrocodeRegionSize;\r | |
| 15 | EFI_PHYSICAL_ADDRESS CodeRegionBase;\r | |
| 16 | UINT64 CodeRegionSize;\r | |
| cf1d4549 JY |
17 | } FSPT_CORE_UPD;\r |
| 18 | \r | |
| 19 | typedef struct {\r | |
| 20 | FSP_UPD_HEADER FspUpdHeader;\r | |
| 1a992030 | 21 | //\r |
| 91a03f78 TK |
22 | // If FSP spec version < 2.2, remove FSPT_ARCH_UPD structure.\r |
| 23 | // Else If FSP spec version >= 2.2 and FSP spec version < 2.4, use FSPT_ARCH_UPD structure.\r | |
| 24 | // Else, use FSPT_ARCH2_UPD structure.\r | |
| 1a992030 | 25 | //\r |
| 91a03f78 | 26 | FSPT_ARCH2_UPD FsptArchUpd;\r |
| cf1d4549 JY |
27 | FSPT_CORE_UPD FsptCoreUpd;\r |
| 28 | } FSPT_UPD_CORE_DATA;\r | |
| 29 | \r | |
| 7c7184e2 | 30 | GLOBAL_REMOVE_IF_UNREFERENCED CONST FSPT_UPD_CORE_DATA FsptUpdDataPtr = {\r |
| cf1d4549 JY |
31 | {\r |
| 32 | 0x4450555F54505346,\r | |
| 1a992030 CC |
33 | //\r |
| 34 | // UPD header revision must be equal or greater than 2 when the structure is compliant with FSP spec 2.2.\r | |
| 35 | //\r | |
| 36 | 0x02,\r | |
| cf1d4549 | 37 | { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r |
| 7c7184e2 | 38 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00 }\r |
| cf1d4549 | 39 | },\r |
| 1a992030 | 40 | //\r |
| 91a03f78 TK |
41 | // If FSP spec version < 2.2, remove FSPT_ARCH_UPD structure.\r |
| 42 | // Else If FSP spec version >= 2.2 and FSP spec version < 2.4, use FSPT_ARCH_UPD structure.\r | |
| 43 | // Else, use FSPT_ARCH2_UPD structure.\r | |
| 1a992030 CC |
44 | //\r |
| 45 | {\r | |
| 91a03f78 | 46 | 0x02,\r |
| 1a992030 CC |
47 | {\r |
| 48 | 0x00, 0x00, 0x00\r | |
| 49 | },\r | |
| 50 | 0x00000020,\r | |
| 51 | 0x00000000,\r | |
| 52 | {\r | |
| 53 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r | |
| 91a03f78 | 54 | 0x00, 0x00, 0x00, 0x00, 0x00, 0x00\r |
| 1a992030 CC |
55 | }\r |
| 56 | },\r | |
| cf1d4549 | 57 | {\r |
| fe5da092 LY |
58 | FixedPcdGet32 (PcdCpuMicrocodePatchAddress),\r |
| 59 | FixedPcdGet32 (PcdCpuMicrocodePatchRegionSize),\r | |
| cf1d4549 JY |
60 | FixedPcdGet32 (PcdFlashCodeCacheAddress),\r |
| 61 | FixedPcdGet32 (PcdFlashCodeCacheSize),\r | |
| 62 | }\r | |
| 63 | };\r |