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IntelFsp2WrapperPkg: Remove microcode related PCDs
[mirror_edk2.git] / IntelFsp2WrapperPkg / Library / SecFspWrapperPlatformSecLibSample / SecRamInitData.c
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1/** @file\r
2 Sample to provide TempRamInitParams data.\r
3\r
fe5da092 4 Copyright (c) 2014 - 2021, Intel Corporation. All rights reserved.<BR>\r
512e23a3 5 SPDX-License-Identifier: BSD-2-Clause-Patent\r
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6\r
7**/\r
8\r
9#include <Library/PcdLib.h>\r
10#include <FspEas.h>\r
11\r
12typedef struct {\r
13 UINT32 MicrocodeRegionBase;\r
14 UINT32 MicrocodeRegionSize;\r
15 UINT32 CodeRegionBase;\r
16 UINT32 CodeRegionSize;\r
17} FSPT_CORE_UPD;\r
18\r
19typedef struct {\r
20 FSP_UPD_HEADER FspUpdHeader;\r
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21 //\r
22 // If platform does not support FSP spec 2.2 remove FSPT_ARCH_UPD structure.\r
23 //\r
24 FSPT_ARCH_UPD FsptArchUpd;\r
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25 FSPT_CORE_UPD FsptCoreUpd;\r
26} FSPT_UPD_CORE_DATA;\r
27\r
28GLOBAL_REMOVE_IF_UNREFERENCED CONST FSPT_UPD_CORE_DATA FsptUpdDataPtr = {\r
29 {\r
30 0x4450555F54505346,\r
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31 //\r
32 // UPD header revision must be equal or greater than 2 when the structure is compliant with FSP spec 2.2.\r
33 //\r
34 0x02,\r
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35 { 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
36 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00\r
37 }\r
38 },\r
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39 //\r
40 // If platform does not support FSP spec 2.2 remove FSPT_ARCH_UPD structure.\r
41 //\r
42 {\r
43 0x01,\r
44 {\r
45 0x00, 0x00, 0x00\r
46 },\r
47 0x00000020,\r
48 0x00000000,\r
49 {\r
50 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,\r
51 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00\r
52 }\r
53 },\r
cf1d4549 54 {\r
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55 FixedPcdGet32 (PcdCpuMicrocodePatchAddress),\r
56 FixedPcdGet32 (PcdCpuMicrocodePatchRegionSize),\r
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57 FixedPcdGet32 (PcdFlashCodeCacheAddress),\r
58 FixedPcdGet32 (PcdFlashCodeCacheSize),\r
59 }\r
60};\r
61\r