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a33a2f62 JY |
1 | /** @file\r |
2 | Intel FSP API definition from Intel Firmware Support Package External\r | |
3b17b245 | 3 | Architecture Specification v1.1, April 2015, revision 001.\r |
a33a2f62 | 4 | \r |
d5fb1edf | 5 | Copyright (c) 2014 - 2015, Intel Corporation. All rights reserved.<BR>\r |
16a16ea6 | 6 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
a33a2f62 JY |
7 | \r |
8 | **/\r | |
9 | \r | |
10 | #ifndef _FSP_API_H_\r | |
11 | #define _FSP_API_H_\r | |
12 | \r | |
d5fb1edf | 13 | #define FSP_STATUS EFI_STATUS\r |
a33a2f62 JY |
14 | #define FSPAPI EFIAPI\r |
15 | \r | |
16 | /**\r | |
17 | FSP Init continuation function prototype.\r | |
18 | Control will be returned to this callback function after FspInit API call.\r | |
19 | \r | |
20 | @param[in] Status Status of the FSP INIT API.\r | |
21 | @param[in] HobBufferPtr Pointer to the HOB data structure defined in the PI specification.\r | |
22 | **/\r | |
23 | typedef\r | |
24 | VOID\r | |
25 | (* CONTINUATION_PROC) (\r | |
d5fb1edf | 26 | IN EFI_STATUS Status,\r |
a33a2f62 JY |
27 | IN VOID *HobListPtr\r |
28 | );\r | |
29 | \r | |
30 | #pragma pack(1)\r | |
31 | \r | |
32 | typedef struct {\r | |
33 | ///\r | |
34 | /// Base address of the microcode region.\r | |
35 | ///\r | |
36 | UINT32 MicrocodeRegionBase;\r | |
37 | ///\r | |
38 | /// Length of the microcode region.\r | |
39 | ///\r | |
40 | UINT32 MicrocodeRegionLength;\r | |
41 | ///\r | |
42 | /// Base address of the cacheable flash region.\r | |
43 | ///\r | |
44 | UINT32 CodeRegionBase;\r | |
45 | ///\r | |
46 | /// Length of the cacheable flash region.\r | |
47 | ///\r | |
48 | UINT32 CodeRegionLength;\r | |
49 | } FSP_TEMP_RAM_INIT_PARAMS;\r | |
50 | \r | |
51 | typedef struct {\r | |
52 | ///\r | |
53 | /// Non-volatile storage buffer pointer.\r | |
54 | ///\r | |
55 | VOID *NvsBufferPtr;\r | |
56 | ///\r | |
57 | /// Runtime buffer pointer\r | |
58 | ///\r | |
59 | VOID *RtBufferPtr;\r | |
60 | ///\r | |
61 | /// Continuation function address\r | |
62 | ///\r | |
63 | CONTINUATION_PROC ContinuationFunc;\r | |
64 | } FSP_INIT_PARAMS;\r | |
65 | \r | |
66 | typedef struct {\r | |
67 | ///\r | |
68 | /// Stack top pointer used by the bootloader.\r | |
69 | /// The new stack frame will be set up at this location after FspInit API call.\r | |
70 | ///\r | |
71 | UINT32 *StackTop;\r | |
72 | ///\r | |
73 | /// Current system boot mode.\r | |
74 | ///\r | |
75 | UINT32 BootMode;\r | |
76 | ///\r | |
77 | /// User platform configuraiton data region pointer.\r | |
78 | ///\r | |
79 | VOID *UpdDataRgnPtr;\r | |
9da59186 JY |
80 | //\r |
81 | // Below field is added in FSP EAS v1.1\r | |
82 | //\r | |
83 | ///\r | |
84 | /// The size of memory to be reserved below the top of low usable memory (TOLUM)\r | |
85 | /// for BootLoader usage. This is optional and value can be zero. If non-zero, the\r | |
86 | /// size must be a multiple of 4KB.\r | |
87 | ///\r | |
88 | UINT32 BootLoaderTolumSize;\r | |
a33a2f62 JY |
89 | ///\r |
90 | /// Reserved\r | |
91 | ///\r | |
9da59186 | 92 | UINT32 Reserved[6];\r |
a33a2f62 JY |
93 | } FSP_INIT_RT_COMMON_BUFFER;\r |
94 | \r | |
95 | typedef enum {\r | |
96 | ///\r | |
97 | /// Notification code for post PCI enuermation\r | |
98 | ///\r | |
99 | EnumInitPhaseAfterPciEnumeration = 0x20,\r | |
100 | ///\r | |
101 | /// Notification code before transfering control to the payload\r | |
102 | ///\r | |
103 | EnumInitPhaseReadyToBoot = 0x40\r | |
104 | } FSP_INIT_PHASE;\r | |
105 | \r | |
106 | typedef struct {\r | |
107 | ///\r | |
108 | /// Notification phase used for NotifyPhase API\r | |
109 | ///\r | |
110 | FSP_INIT_PHASE Phase;\r | |
111 | } NOTIFY_PHASE_PARAMS;\r | |
112 | \r | |
d5fb1edf JY |
113 | typedef struct {\r |
114 | ///\r | |
115 | /// Non-volatile storage buffer pointer.\r | |
116 | ///\r | |
117 | VOID *NvsBufferPtr;\r | |
118 | ///\r | |
119 | /// Runtime buffer pointer\r | |
120 | ///\r | |
121 | VOID *RtBufferPtr;\r | |
122 | ///\r | |
123 | /// Pointer to the HOB data structure defined in the PI specification\r | |
124 | ///\r | |
125 | VOID **HobListPtr;\r | |
126 | } FSP_MEMORY_INIT_PARAMS;\r | |
127 | \r | |
a33a2f62 JY |
128 | #pragma pack()\r |
129 | \r | |
130 | /**\r | |
131 | This FSP API is called soon after coming out of reset and before memory and stack is\r | |
132 | available. This FSP API will load the microcode update, enable code caching for the\r | |
133 | region specified by the boot loader and also setup a temporary stack to be used until\r | |
134 | main memory is initialized.\r | |
135 | \r | |
136 | A hardcoded stack can be set up with the following values, and the "esp" register\r | |
137 | initialized to point to this hardcoded stack.\r | |
138 | 1. The return address where the FSP will return control after setting up a temporary\r | |
139 | stack.\r | |
140 | 2. A pointer to the input parameter structure\r | |
141 | \r | |
142 | However, since the stack is in ROM and not writeable, this FSP API cannot be called\r | |
143 | using the "call" instruction, but needs to be jumped to.\r | |
144 | \r | |
145 | @param[in] TempRaminitParamPtr Address pointer to the FSP_TEMP_RAM_INIT_PARAMS structure.\r | |
146 | \r | |
d5fb1edf JY |
147 | @retval EFI_SUCCESS Temp RAM was initialized successfully.\r |
148 | @retval EFI_INVALID_PARAMETER Input parameters are invalid..\r | |
149 | @retval EFI_NOT_FOUND No valid microcode was found in the microcode region.\r | |
150 | @retval EFI_UNSUPPORTED The FSP calling conditions were not met.\r | |
151 | @retval EFI_DEVICE_ERROR Temp RAM initialization failed.\r | |
a33a2f62 JY |
152 | \r |
153 | If this function is successful, the FSP initializes the ECX and EDX registers to point to\r | |
154 | a temporary but writeable memory range available to the boot loader and returns with\r | |
155 | FSP_SUCCESS in register EAX. Register ECX points to the start of this temporary\r | |
156 | memory range and EDX points to the end of the range. Boot loader is free to use the\r | |
157 | whole range described. Typically the boot loader can reload the ESP register to point\r | |
158 | to the end of this returned range so that it can be used as a standard stack.\r | |
159 | **/\r | |
160 | typedef\r | |
d5fb1edf JY |
161 | EFI_STATUS\r |
162 | (EFIAPI *FSP_TEMP_RAM_INIT) (\r | |
a33a2f62 JY |
163 | IN FSP_TEMP_RAM_INIT_PARAMS *FspTempRamInitPtr\r |
164 | );\r | |
165 | \r | |
166 | /**\r | |
167 | This FSP API is called after TempRamInitEntry. This FSP API initializes the memory,\r | |
168 | the CPU and the chipset to enable normal operation of these devices. This FSP API\r | |
169 | accepts a pointer to a data structure that will be platform dependent and defined for\r | |
170 | each FSP binary. This will be documented in the Integration Guide for each FSP\r | |
171 | release.\r | |
172 | The boot loader provides a continuation function as a parameter when calling FspInit.\r | |
173 | After FspInit completes its execution, it does not return to the boot loader from where\r | |
174 | it was called but instead returns control to the boot loader by calling the continuation\r | |
175 | function which is passed to FspInit as an argument.\r | |
176 | \r | |
177 | @param[in] FspInitParamPtr Address pointer to the FSP_INIT_PARAMS structure.\r | |
178 | \r | |
d5fb1edf JY |
179 | @retval EFI_SUCCESS FSP execution environment was initialized successfully.\r |
180 | @retval EFI_INVALID_PARAMETER Input parameters are invalid.\r | |
181 | @retval EFI_UNSUPPORTED The FSP calling conditions were not met.\r | |
182 | @retval EFI_DEVICE_ERROR FSP initialization failed.\r | |
a33a2f62 JY |
183 | **/\r |
184 | typedef\r | |
d5fb1edf JY |
185 | EFI_STATUS\r |
186 | (EFIAPI *FSP_INIT) (\r | |
a33a2f62 JY |
187 | IN OUT FSP_INIT_PARAMS *FspInitParamPtr\r |
188 | );\r | |
189 | \r | |
d5fb1edf JY |
190 | #define FSP_FSP_INIT FSP_INIT\r |
191 | \r | |
a33a2f62 JY |
192 | /**\r |
193 | This FSP API is used to notify the FSP about the different phases in the boot process.\r | |
194 | This allows the FSP to take appropriate actions as needed during different initialization\r | |
195 | phases. The phases will be platform dependent and will be documented with the FSP\r | |
196 | release. The current FSP supports two notify phases:\r | |
197 | Post PCI enumeration\r | |
198 | Ready To Boot\r | |
199 | \r | |
200 | @param[in] NotifyPhaseParamPtr Address pointer to the NOTIFY_PHASE_PRAMS\r | |
201 | \r | |
d5fb1edf JY |
202 | @retval EFI_SUCCESS The notification was handled successfully.\r |
203 | @retval EFI_UNSUPPORTED The notification was not called in the proper order.\r | |
204 | @retval EFI_INVALID_PARAMETER The notification code is invalid.\r | |
a33a2f62 JY |
205 | **/\r |
206 | typedef\r | |
d5fb1edf JY |
207 | EFI_STATUS\r |
208 | (EFIAPI *FSP_NOTIFY_PHASE) (\r | |
a33a2f62 JY |
209 | IN NOTIFY_PHASE_PARAMS *NotifyPhaseParamPtr\r |
210 | );\r | |
211 | \r | |
d5fb1edf JY |
212 | /**\r |
213 | This FSP API is called after TempRamInit and initializes the memory.\r | |
214 | This FSP API accepts a pointer to a data structure that will be platform dependent\r | |
215 | and defined for each FSP binary. This will be documented in Integration guide with\r | |
216 | each FSP release.\r | |
217 | After FspMemInit completes its execution, it passes the pointer to the HobList and\r | |
9da59186 | 218 | returns to the boot loader from where it was called. BootLoader is responsible to \r |
6ca9135a | 219 | migrate it's stack and data to Memory.\r |
d5fb1edf JY |
220 | FspMemoryInit, TempRamExit and FspSiliconInit APIs provide an alternate method to\r |
221 | complete the silicon initialization and provides bootloader an opportunity to get\r | |
222 | control after system memory is available and before the temporary RAM is torn down.\r | |
223 | These APIs are mutually exclusive to the FspInit API.\r | |
224 | \r | |
225 | @param[in][out] FspMemoryInitParamPtr Address pointer to the FSP_MEMORY_INIT_PARAMS\r | |
226 | structure.\r | |
227 | \r | |
228 | @retval EFI_SUCCESS FSP execution environment was initialized successfully.\r | |
229 | @retval EFI_INVALID_PARAMETER Input parameters are invalid.\r | |
230 | @retval EFI_UNSUPPORTED The FSP calling conditions were not met.\r | |
231 | @retval EFI_DEVICE_ERROR FSP initialization failed.\r | |
232 | **/\r | |
233 | typedef\r | |
234 | EFI_STATUS\r | |
235 | (EFIAPI *FSP_MEMORY_INIT) (\r | |
236 | IN OUT FSP_MEMORY_INIT_PARAMS *FspMemoryInitParamPtr\r | |
237 | );\r | |
238 | \r | |
239 | \r | |
240 | /**\r | |
241 | This FSP API is called after FspMemoryInit API. This FSP API tears down the temporary\r | |
242 | memory setup by TempRamInit API. This FSP API accepts a pointer to a data structure\r | |
243 | that will be platform dependent and defined for each FSP binary. This will be\r | |
244 | documented in Integration Guide.\r | |
245 | FspMemoryInit, TempRamExit and FspSiliconInit APIs provide an alternate method to\r | |
246 | complete the silicon initialization and provides bootloader an opportunity to get\r | |
247 | control after system memory is available and before the temporary RAM is torn down.\r | |
248 | These APIs are mutually exclusive to the FspInit API.\r | |
249 | \r | |
250 | @param[in][out] TempRamExitParamPtr Pointer to the Temp Ram Exit parameters structure.\r | |
251 | This structure is normally defined in the Integration Guide.\r | |
252 | And if it is not defined in the Integration Guide, pass NULL.\r | |
253 | \r | |
254 | @retval EFI_SUCCESS FSP execution environment was initialized successfully.\r | |
255 | @retval EFI_INVALID_PARAMETER Input parameters are invalid.\r | |
256 | @retval EFI_UNSUPPORTED The FSP calling conditions were not met.\r | |
257 | @retval EFI_DEVICE_ERROR FSP initialization failed.\r | |
258 | **/\r | |
259 | typedef\r | |
260 | EFI_STATUS\r | |
261 | (EFIAPI *FSP_TEMP_RAM_EXIT) (\r | |
262 | IN OUT VOID *TempRamExitParamPtr\r | |
263 | );\r | |
264 | \r | |
265 | \r | |
266 | /**\r | |
267 | This FSP API is called after TempRamExit API.\r | |
268 | FspMemoryInit, TempRamExit and FspSiliconInit APIs provide an alternate method to complete the\r | |
269 | silicon initialization.\r | |
270 | These APIs are mutually exclusive to the FspInit API.\r | |
271 | \r | |
272 | @param[in][out] FspSiliconInitParamPtr Pointer to the Silicon Init parameters structure.\r | |
273 | This structure is normally defined in the Integration Guide.\r | |
274 | And if it is not defined in the Integration Guide, pass NULL.\r | |
275 | \r | |
276 | @retval EFI_SUCCESS FSP execution environment was initialized successfully.\r | |
277 | @retval EFI_INVALID_PARAMETER Input parameters are invalid.\r | |
278 | @retval EFI_UNSUPPORTED The FSP calling conditions were not met.\r | |
279 | @retval EFI_DEVICE_ERROR FSP initialization failed.\r | |
280 | **/\r | |
281 | typedef\r | |
282 | EFI_STATUS\r | |
283 | (EFIAPI *FSP_SILICON_INIT) (\r | |
284 | IN OUT VOID *FspSiliconInitParamPtr\r | |
285 | );\r | |
286 | \r | |
a33a2f62 | 287 | ///\r |
d5fb1edf JY |
288 | /// FSP API Return Status Code for backward compatibility with v1.0\r |
289 | ///@{\r | |
290 | #define FSP_SUCCESS EFI_SUCCESS\r | |
291 | #define FSP_INVALID_PARAMETER EFI_INVALID_PARAMETER\r | |
292 | #define FSP_UNSUPPORTED EFI_UNSUPPORTED\r | |
293 | #define FSP_NOT_READY EFI_NOT_READY\r | |
294 | #define FSP_DEVICE_ERROR EFI_DEVICE_ERROR\r | |
295 | #define FSP_OUT_OF_RESOURCES EFI_OUT_OF_RESOURCES\r | |
296 | #define FSP_VOLUME_CORRUPTED EFI_VOLUME_CORRUPTED\r | |
297 | #define FSP_NOT_FOUND EFI_NOT_FOUND\r | |
298 | #define FSP_TIMEOUT EFI_TIMEOUT\r | |
299 | #define FSP_ABORTED EFI_ABORTED\r | |
300 | #define FSP_INCOMPATIBLE_VERSION EFI_INCOMPATIBLE_VERSION\r | |
301 | #define FSP_SECURITY_VIOLATION EFI_SECURITY_VIOLATION\r | |
302 | #define FSP_CRC_ERROR EFI_CRC_ERROR\r | |
303 | ///@}\r | |
a33a2f62 JY |
304 | \r |
305 | #endif\r |