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87bc3f19 HW |
1 | /** @file\r |
2 | The AhciPei driver is used to manage ATA hard disk device working under AHCI\r | |
3 | mode at PEI phase.\r | |
4 | \r | |
5 | Copyright (c) 2019, Intel Corporation. All rights reserved.<BR>\r | |
6 | \r | |
9d510e61 | 7 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
87bc3f19 HW |
8 | \r |
9 | **/\r | |
10 | \r | |
11 | #include "AhciPei.h"\r | |
a8f59e2e CM |
12 | #include <Ppi/PciDevice.h>\r |
13 | #include <Library/DevicePathLib.h>\r | |
14 | #include <IndustryStandard/Pci.h>\r | |
87bc3f19 HW |
15 | \r |
16 | EFI_PEI_PPI_DESCRIPTOR mAhciAtaPassThruPpiListTemplate = {\r | |
17 | (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),\r | |
18 | &gEdkiiPeiAtaPassThruPpiGuid,\r | |
19 | NULL\r | |
20 | };\r | |
21 | \r | |
b2b8e872 HW |
22 | EFI_PEI_PPI_DESCRIPTOR mAhciBlkIoPpiListTemplate = {\r |
23 | (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),\r | |
24 | &gEfiPeiVirtualBlockIoPpiGuid,\r | |
25 | NULL\r | |
26 | };\r | |
27 | \r | |
28 | EFI_PEI_PPI_DESCRIPTOR mAhciBlkIo2PpiListTemplate = {\r | |
29 | (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),\r | |
30 | &gEfiPeiVirtualBlockIo2PpiGuid,\r | |
31 | NULL\r | |
32 | };\r | |
33 | \r | |
87bc3f19 HW |
34 | EFI_PEI_PPI_DESCRIPTOR mAhciStorageSecurityPpiListTemplate = {\r |
35 | (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),\r | |
36 | &gEdkiiPeiStorageSecurityCommandPpiGuid,\r | |
37 | NULL\r | |
38 | };\r | |
39 | \r | |
40 | EFI_PEI_NOTIFY_DESCRIPTOR mAhciEndOfPeiNotifyListTemplate = {\r | |
41 | (EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),\r | |
42 | &gEfiEndOfPeiSignalPpiGuid,\r | |
43 | AhciPeimEndOfPei\r | |
44 | };\r | |
45 | \r | |
a8f59e2e CM |
46 | EFI_PEI_NOTIFY_DESCRIPTOR mAtaAhciHostControllerNotify = {\r |
47 | (EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),\r | |
48 | &gEdkiiPeiAtaAhciHostControllerPpiGuid,\r | |
49 | AtaAhciHostControllerPpiInstallationCallback\r | |
50 | };\r | |
51 | \r | |
52 | EFI_PEI_NOTIFY_DESCRIPTOR mPciDevicePpiNotify = {\r | |
53 | (EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),\r | |
54 | &gEdkiiPeiPciDevicePpiGuid,\r | |
55 | AtaAhciPciDevicePpiInstallationCallback\r | |
56 | };\r | |
57 | \r | |
87bc3f19 HW |
58 | /**\r |
59 | Free the DMA resources allocated by an ATA AHCI controller.\r | |
60 | \r | |
61 | @param[in] Private A pointer to the PEI_AHCI_CONTROLLER_PRIVATE_DATA data\r | |
62 | structure.\r | |
63 | \r | |
64 | **/\r | |
65 | VOID\r | |
66 | AhciFreeDmaResource (\r | |
1436aea4 | 67 | IN PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private\r |
87bc3f19 HW |
68 | )\r |
69 | {\r | |
1436aea4 | 70 | EFI_AHCI_REGISTERS *AhciRegisters;\r |
87bc3f19 HW |
71 | \r |
72 | ASSERT (Private != NULL);\r | |
73 | \r | |
74 | AhciRegisters = &Private->AhciRegisters;\r | |
75 | \r | |
76 | if (AhciRegisters->AhciRFisMap != NULL) {\r | |
77 | IoMmuFreeBuffer (\r | |
1436aea4 MK |
78 | EFI_SIZE_TO_PAGES (AhciRegisters->MaxRFisSize),\r |
79 | AhciRegisters->AhciRFis,\r | |
80 | AhciRegisters->AhciRFisMap\r | |
81 | );\r | |
87bc3f19 HW |
82 | }\r |
83 | \r | |
84 | if (AhciRegisters->AhciCmdListMap != NULL) {\r | |
85 | IoMmuFreeBuffer (\r | |
1436aea4 MK |
86 | EFI_SIZE_TO_PAGES (AhciRegisters->MaxCmdListSize),\r |
87 | AhciRegisters->AhciCmdList,\r | |
88 | AhciRegisters->AhciCmdListMap\r | |
89 | );\r | |
87bc3f19 HW |
90 | }\r |
91 | \r | |
92 | if (AhciRegisters->AhciCmdTableMap != NULL) {\r | |
93 | IoMmuFreeBuffer (\r | |
94 | EFI_SIZE_TO_PAGES (AhciRegisters->MaxCmdTableSize),\r | |
95 | AhciRegisters->AhciCmdTable,\r | |
96 | AhciRegisters->AhciCmdTableMap\r | |
97 | );\r | |
98 | }\r | |
87bc3f19 HW |
99 | }\r |
100 | \r | |
101 | /**\r | |
102 | One notified function to cleanup the allocated DMA buffers at EndOfPei.\r | |
103 | \r | |
104 | @param[in] PeiServices Pointer to PEI Services Table.\r | |
105 | @param[in] NotifyDescriptor Pointer to the descriptor for the Notification\r | |
106 | event that caused this function to execute.\r | |
107 | @param[in] Ppi Pointer to the PPI data associated with this function.\r | |
108 | \r | |
109 | @retval EFI_SUCCESS The function completes successfully\r | |
110 | \r | |
111 | **/\r | |
112 | EFI_STATUS\r | |
113 | EFIAPI\r | |
114 | AhciPeimEndOfPei (\r | |
115 | IN EFI_PEI_SERVICES **PeiServices,\r | |
116 | IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor,\r | |
117 | IN VOID *Ppi\r | |
118 | )\r | |
119 | {\r | |
1436aea4 | 120 | PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private;\r |
87bc3f19 HW |
121 | \r |
122 | Private = GET_AHCI_PEIM_HC_PRIVATE_DATA_FROM_THIS_NOTIFY (NotifyDescriptor);\r | |
123 | AhciFreeDmaResource (Private);\r | |
124 | \r | |
125 | return EFI_SUCCESS;\r | |
126 | }\r | |
127 | \r | |
128 | /**\r | |
a8f59e2e | 129 | Initialize and install PrivateData PPIs.\r |
87bc3f19 | 130 | \r |
a8f59e2e CM |
131 | @param[in] MmioBase MMIO base address of specific AHCI controller\r |
132 | @param[in] DevicePath A pointer to the EFI_DEVICE_PATH_PROTOCOL\r | |
133 | structure.\r | |
134 | @param[in] DevicePathLength Length of the device path.\r | |
87bc3f19 | 135 | \r |
a8f59e2e CM |
136 | @retval EFI_SUCCESS AHCI controller initialized and PPIs installed\r |
137 | @retval others Failed to initialize AHCI controller\r | |
87bc3f19 HW |
138 | **/\r |
139 | EFI_STATUS\r | |
a8f59e2e CM |
140 | AtaAhciInitPrivateData (\r |
141 | IN UINTN MmioBase,\r | |
142 | IN EFI_DEVICE_PATH_PROTOCOL *DevicePath,\r | |
143 | IN UINTN DevicePathLength\r | |
87bc3f19 HW |
144 | )\r |
145 | {\r | |
a8f59e2e CM |
146 | EFI_STATUS Status;\r |
147 | UINT32 PortBitMap;\r | |
148 | UINT8 NumberOfPorts;\r | |
149 | PEI_AHCI_CONTROLLER_PRIVATE_DATA *Private;\r | |
150 | EFI_BOOT_MODE BootMode;\r | |
87bc3f19 | 151 | \r |
a8f59e2e | 152 | DEBUG ((DEBUG_INFO, "Initializing private data for ATA\n"));\r |
87bc3f19 HW |
153 | \r |
154 | //\r | |
155 | // Get the current boot mode.\r | |
156 | //\r | |
157 | Status = PeiServicesGetBootMode (&BootMode);\r | |
158 | if (EFI_ERROR (Status)) {\r | |
159 | DEBUG ((DEBUG_ERROR, "%a: Fail to get the current boot mode.\n", __FUNCTION__));\r | |
160 | return Status;\r | |
161 | }\r | |
162 | \r | |
163 | //\r | |
a8f59e2e | 164 | // Check validity of the device path of the ATA AHCI controller.\r |
87bc3f19 | 165 | //\r |
a8f59e2e | 166 | Status = AhciIsHcDevicePathValid (DevicePath, DevicePathLength);\r |
87bc3f19 | 167 | if (EFI_ERROR (Status)) {\r |
a8f59e2e CM |
168 | DEBUG ((\r |
169 | DEBUG_ERROR,\r | |
170 | "%a: The device path is invalid.\n",\r | |
171 | __FUNCTION__\r | |
172 | ));\r | |
173 | return Status;\r | |
174 | }\r | |
175 | \r | |
176 | //\r | |
177 | // For S3 resume performance consideration, not all ports on an ATA AHCI\r | |
178 | // controller will be enumerated/initialized. The driver consumes the\r | |
179 | // content within S3StorageDeviceInitList LockBox to get the ports that\r | |
180 | // will be enumerated/initialized during S3 resume.\r | |
181 | //\r | |
182 | if (BootMode == BOOT_ON_S3_RESUME) {\r | |
183 | NumberOfPorts = AhciS3GetEumeratePorts (DevicePath, DevicePathLength, &PortBitMap);\r | |
184 | if (NumberOfPorts == 0) {\r | |
185 | return EFI_SUCCESS;\r | |
186 | }\r | |
187 | } else {\r | |
188 | PortBitMap = MAX_UINT32;\r | |
87bc3f19 HW |
189 | }\r |
190 | \r | |
a8f59e2e CM |
191 | //\r |
192 | // Memory allocation for controller private data.\r | |
193 | //\r | |
194 | Private = AllocateZeroPool (sizeof (PEI_AHCI_CONTROLLER_PRIVATE_DATA));\r | |
195 | if (Private == NULL) {\r | |
196 | DEBUG ((\r | |
197 | DEBUG_ERROR,\r | |
198 | "%a: Fail to allocate private data.\n",\r | |
199 | __FUNCTION__\r | |
200 | ));\r | |
201 | return EFI_OUT_OF_RESOURCES;\r | |
202 | }\r | |
203 | \r | |
204 | //\r | |
205 | // Initialize controller private data.\r | |
206 | //\r | |
207 | Private->Signature = AHCI_PEI_CONTROLLER_PRIVATE_DATA_SIGNATURE;\r | |
208 | Private->MmioBase = MmioBase;\r | |
209 | Private->DevicePathLength = DevicePathLength;\r | |
210 | Private->DevicePath = DevicePath;\r | |
211 | Private->PortBitMap = PortBitMap;\r | |
212 | InitializeListHead (&Private->DeviceList);\r | |
213 | \r | |
214 | Status = AhciModeInitialization (Private);\r | |
215 | if (EFI_ERROR (Status)) {\r | |
216 | return Status;\r | |
217 | }\r | |
218 | \r | |
219 | Private->AtaPassThruMode.Attributes = EFI_ATA_PASS_THRU_ATTRIBUTES_PHYSICAL |\r | |
220 | EFI_ATA_PASS_THRU_ATTRIBUTES_LOGICAL;\r | |
221 | Private->AtaPassThruMode.IoAlign = sizeof (UINTN);\r | |
222 | Private->AtaPassThruPpi.Revision = EDKII_PEI_ATA_PASS_THRU_PPI_REVISION;\r | |
223 | Private->AtaPassThruPpi.Mode = &Private->AtaPassThruMode;\r | |
224 | Private->AtaPassThruPpi.PassThru = AhciAtaPassThruPassThru;\r | |
225 | Private->AtaPassThruPpi.GetNextPort = AhciAtaPassThruGetNextPort;\r | |
226 | Private->AtaPassThruPpi.GetNextDevice = AhciAtaPassThruGetNextDevice;\r | |
227 | Private->AtaPassThruPpi.GetDevicePath = AhciAtaPassThruGetDevicePath;\r | |
228 | CopyMem (\r | |
229 | &Private->AtaPassThruPpiList,\r | |
230 | &mAhciAtaPassThruPpiListTemplate,\r | |
231 | sizeof (EFI_PEI_PPI_DESCRIPTOR)\r | |
232 | );\r | |
233 | Private->AtaPassThruPpiList.Ppi = &Private->AtaPassThruPpi;\r | |
234 | PeiServicesInstallPpi (&Private->AtaPassThruPpiList);\r | |
235 | \r | |
236 | Private->BlkIoPpi.GetNumberOfBlockDevices = AhciBlockIoGetDeviceNo;\r | |
237 | Private->BlkIoPpi.GetBlockDeviceMediaInfo = AhciBlockIoGetMediaInfo;\r | |
238 | Private->BlkIoPpi.ReadBlocks = AhciBlockIoReadBlocks;\r | |
239 | CopyMem (\r | |
240 | &Private->BlkIoPpiList,\r | |
241 | &mAhciBlkIoPpiListTemplate,\r | |
242 | sizeof (EFI_PEI_PPI_DESCRIPTOR)\r | |
243 | );\r | |
244 | Private->BlkIoPpiList.Ppi = &Private->BlkIoPpi;\r | |
245 | PeiServicesInstallPpi (&Private->BlkIoPpiList);\r | |
246 | \r | |
247 | Private->BlkIo2Ppi.Revision = EFI_PEI_RECOVERY_BLOCK_IO2_PPI_REVISION;\r | |
248 | Private->BlkIo2Ppi.GetNumberOfBlockDevices = AhciBlockIoGetDeviceNo2;\r | |
249 | Private->BlkIo2Ppi.GetBlockDeviceMediaInfo = AhciBlockIoGetMediaInfo2;\r | |
250 | Private->BlkIo2Ppi.ReadBlocks = AhciBlockIoReadBlocks2;\r | |
251 | CopyMem (\r | |
252 | &Private->BlkIo2PpiList,\r | |
253 | &mAhciBlkIo2PpiListTemplate,\r | |
254 | sizeof (EFI_PEI_PPI_DESCRIPTOR)\r | |
255 | );\r | |
256 | Private->BlkIo2PpiList.Ppi = &Private->BlkIo2Ppi;\r | |
257 | PeiServicesInstallPpi (&Private->BlkIo2PpiList);\r | |
258 | \r | |
259 | if (Private->TrustComputingDevices != 0) {\r | |
260 | DEBUG ((\r | |
261 | DEBUG_INFO,\r | |
262 | "%a: Security Security Command PPI will be produced.\n",\r | |
263 | __FUNCTION__\r | |
264 | ));\r | |
265 | Private->StorageSecurityPpi.Revision = EDKII_STORAGE_SECURITY_PPI_REVISION;\r | |
266 | Private->StorageSecurityPpi.GetNumberofDevices = AhciStorageSecurityGetDeviceNo;\r | |
267 | Private->StorageSecurityPpi.GetDevicePath = AhciStorageSecurityGetDevicePath;\r | |
268 | Private->StorageSecurityPpi.ReceiveData = AhciStorageSecurityReceiveData;\r | |
269 | Private->StorageSecurityPpi.SendData = AhciStorageSecuritySendData;\r | |
270 | CopyMem (\r | |
271 | &Private->StorageSecurityPpiList,\r | |
272 | &mAhciStorageSecurityPpiListTemplate,\r | |
273 | sizeof (EFI_PEI_PPI_DESCRIPTOR)\r | |
274 | );\r | |
275 | Private->StorageSecurityPpiList.Ppi = &Private->StorageSecurityPpi;\r | |
276 | PeiServicesInstallPpi (&Private->StorageSecurityPpiList);\r | |
277 | }\r | |
278 | \r | |
279 | CopyMem (\r | |
280 | &Private->EndOfPeiNotifyList,\r | |
281 | &mAhciEndOfPeiNotifyListTemplate,\r | |
282 | sizeof (EFI_PEI_NOTIFY_DESCRIPTOR)\r | |
283 | );\r | |
284 | PeiServicesNotifyPpi (&Private->EndOfPeiNotifyList);\r | |
285 | \r | |
286 | return EFI_SUCCESS;\r | |
287 | }\r | |
288 | \r | |
289 | /**\r | |
290 | Initialize AHCI controller from EDKII_ATA_AHCI_HOST_CONTROLLER_PPI instance.\r | |
291 | \r | |
292 | @param[in] AhciHcPpi Pointer to the AHCI Host Controller PPI instance.\r | |
293 | \r | |
294 | @retval EFI_SUCCESS PPI successfully installed.\r | |
295 | **/\r | |
296 | EFI_STATUS\r | |
297 | AtaAhciInitPrivateDataFromHostControllerPpi (\r | |
298 | IN EDKII_ATA_AHCI_HOST_CONTROLLER_PPI *AhciHcPpi\r | |
299 | )\r | |
300 | {\r | |
301 | UINT8 Controller;\r | |
302 | UINTN MmioBase;\r | |
303 | UINTN DevicePathLength;\r | |
304 | EFI_DEVICE_PATH_PROTOCOL *DevicePath;\r | |
305 | EFI_STATUS Status;\r | |
306 | \r | |
87bc3f19 HW |
307 | Controller = 0;\r |
308 | MmioBase = 0;\r | |
309 | while (TRUE) {\r | |
310 | Status = AhciHcPpi->GetAhciHcMmioBar (\r | |
311 | AhciHcPpi,\r | |
312 | Controller,\r | |
313 | &MmioBase\r | |
314 | );\r | |
315 | //\r | |
316 | // When status is error, meant no controller is found.\r | |
317 | //\r | |
318 | if (EFI_ERROR (Status)) {\r | |
319 | break;\r | |
320 | }\r | |
321 | \r | |
322 | Status = AhciHcPpi->GetAhciHcDevicePath (\r | |
323 | AhciHcPpi,\r | |
324 | Controller,\r | |
325 | &DevicePathLength,\r | |
326 | &DevicePath\r | |
327 | );\r | |
328 | if (EFI_ERROR (Status)) {\r | |
329 | DEBUG ((\r | |
1436aea4 MK |
330 | DEBUG_ERROR,\r |
331 | "%a: Fail to allocate get the device path for Controller %d.\n",\r | |
332 | __FUNCTION__,\r | |
333 | Controller\r | |
87bc3f19 HW |
334 | ));\r |
335 | return Status;\r | |
336 | }\r | |
337 | \r | |
a8f59e2e | 338 | Status = AtaAhciInitPrivateData (MmioBase, DevicePath, DevicePathLength);\r |
87bc3f19 HW |
339 | if (EFI_ERROR (Status)) {\r |
340 | DEBUG ((\r | |
1436aea4 | 341 | DEBUG_ERROR,\r |
a8f59e2e | 342 | "%a: Controller initialization fail for Controller %d with Status - %r.\n",\r |
1436aea4 | 343 | __FUNCTION__,\r |
a8f59e2e CM |
344 | Controller,\r |
345 | Status\r | |
87bc3f19 | 346 | ));\r |
87bc3f19 | 347 | } else {\r |
87bc3f19 | 348 | DEBUG ((\r |
a8f59e2e CM |
349 | DEBUG_INFO,\r |
350 | "%a: Controller %d has been successfully initialized.\n",\r | |
1436aea4 MK |
351 | __FUNCTION__,\r |
352 | Controller\r | |
87bc3f19 | 353 | ));\r |
87bc3f19 HW |
354 | }\r |
355 | \r | |
a8f59e2e CM |
356 | Controller++;\r |
357 | }\r | |
87bc3f19 | 358 | \r |
a8f59e2e CM |
359 | return EFI_SUCCESS;\r |
360 | }\r | |
87bc3f19 | 361 | \r |
a8f59e2e CM |
362 | /**\r |
363 | Callback for EDKII_ATA_AHCI_HOST_CONTROLLER_PPI installation.\r | |
b2b8e872 | 364 | \r |
a8f59e2e CM |
365 | @param[in] PeiServices Pointer to PEI Services Table.\r |
366 | @param[in] NotifyDescriptor Pointer to the descriptor for the Notification\r | |
367 | event that caused this function to execute.\r | |
368 | @param[in] Ppi Pointer to the PPI data associated with this function.\r | |
b2b8e872 | 369 | \r |
a8f59e2e CM |
370 | @retval EFI_SUCCESS The function completes successfully\r |
371 | @retval Others Cannot initialize AHCI controller from given EDKII_ATA_AHCI_HOST_CONTROLLER_PPI\r | |
372 | \r | |
373 | **/\r | |
374 | EFI_STATUS\r | |
375 | EFIAPI\r | |
376 | AtaAhciHostControllerPpiInstallationCallback (\r | |
377 | IN EFI_PEI_SERVICES **PeiServices,\r | |
378 | IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor,\r | |
379 | IN VOID *Ppi\r | |
380 | )\r | |
381 | {\r | |
382 | EDKII_ATA_AHCI_HOST_CONTROLLER_PPI *AhciHcPpi;\r | |
383 | \r | |
384 | if (Ppi == NULL) {\r | |
385 | return EFI_INVALID_PARAMETER;\r | |
386 | }\r | |
387 | \r | |
388 | AhciHcPpi = (EDKII_ATA_AHCI_HOST_CONTROLLER_PPI *)Ppi;\r | |
389 | \r | |
390 | return AtaAhciInitPrivateDataFromHostControllerPpi (AhciHcPpi);\r | |
391 | }\r | |
392 | \r | |
393 | /**\r | |
394 | Initialize AHCI controller from fiven PCI_DEVICE_PPI.\r | |
395 | \r | |
396 | @param[in] PciDevice Pointer to the PCI Device PPI instance.\r | |
397 | \r | |
398 | @retval EFI_SUCCESS The function completes successfully\r | |
399 | @retval Others Cannot initialize AHCI controller for given device\r | |
400 | **/\r | |
401 | EFI_STATUS\r | |
402 | AtaAhciInitPrivateDataFromPciDevice (\r | |
403 | EDKII_PCI_DEVICE_PPI *PciDevice\r | |
404 | )\r | |
405 | {\r | |
406 | EFI_STATUS Status;\r | |
407 | PCI_TYPE00 PciData;\r | |
1dccbd1a | 408 | UINT32 MmioBase;\r |
a8f59e2e CM |
409 | EFI_DEVICE_PATH_PROTOCOL *DevicePath;\r |
410 | UINTN DevicePathLength;\r | |
411 | UINT64 EnabledPciAttributes;\r | |
412 | \r | |
413 | //\r | |
414 | // Now further check the PCI header: Base Class (offset 0x0B) and\r | |
415 | // Sub Class (offset 0x0A). This controller should be an SATA controller\r | |
416 | //\r | |
417 | Status = PciDevice->PciIo.Pci.Read (\r | |
418 | &PciDevice->PciIo,\r | |
419 | EfiPciIoWidthUint8,\r | |
420 | PCI_CLASSCODE_OFFSET,\r | |
421 | sizeof (PciData.Hdr.ClassCode),\r | |
422 | PciData.Hdr.ClassCode\r | |
423 | );\r | |
424 | if (EFI_ERROR (Status)) {\r | |
425 | return EFI_UNSUPPORTED;\r | |
426 | }\r | |
427 | \r | |
428 | if (!IS_PCI_IDE (&PciData) && !IS_PCI_SATADPA (&PciData)) {\r | |
429 | return EFI_UNSUPPORTED;\r | |
430 | }\r | |
431 | \r | |
432 | Status = PciDevice->PciIo.Attributes (\r | |
433 | &PciDevice->PciIo,\r | |
434 | EfiPciIoAttributeOperationSupported,\r | |
435 | 0,\r | |
436 | &EnabledPciAttributes\r | |
437 | );\r | |
438 | if (EFI_ERROR (Status)) {\r | |
439 | return EFI_UNSUPPORTED;\r | |
440 | } else {\r | |
441 | EnabledPciAttributes &= (UINT64)EFI_PCI_DEVICE_ENABLE;\r | |
442 | Status = PciDevice->PciIo.Attributes (\r | |
443 | &PciDevice->PciIo,\r | |
444 | EfiPciIoAttributeOperationEnable,\r | |
445 | EnabledPciAttributes,\r | |
446 | NULL\r | |
447 | );\r | |
448 | if (EFI_ERROR (Status)) {\r | |
449 | return EFI_UNSUPPORTED;\r | |
87bc3f19 | 450 | }\r |
a8f59e2e | 451 | }\r |
87bc3f19 | 452 | \r |
a8f59e2e CM |
453 | Status = PciDevice->PciIo.Pci.Read (\r |
454 | &PciDevice->PciIo,\r | |
455 | EfiPciIoWidthUint32,\r | |
456 | 0x24,\r | |
1dccbd1a | 457 | 1,\r |
a8f59e2e CM |
458 | &MmioBase\r |
459 | );\r | |
460 | if (EFI_ERROR (Status)) {\r | |
461 | return EFI_UNSUPPORTED;\r | |
462 | }\r | |
463 | \r | |
1dccbd1a CM |
464 | MmioBase &= 0xFFFFFFF0;\r |
465 | \r | |
a8f59e2e CM |
466 | DevicePathLength = GetDevicePathSize (PciDevice->DevicePath);\r |
467 | DevicePath = PciDevice->DevicePath;\r | |
87bc3f19 | 468 | \r |
a8f59e2e CM |
469 | Status = AtaAhciInitPrivateData (MmioBase, DevicePath, DevicePathLength);\r |
470 | if (EFI_ERROR (Status)) {\r | |
87bc3f19 | 471 | DEBUG ((\r |
1436aea4 | 472 | DEBUG_INFO,\r |
a8f59e2e | 473 | "%a: Failed to init controller, with Status - %r\n",\r |
1436aea4 | 474 | __FUNCTION__,\r |
a8f59e2e | 475 | Status\r |
87bc3f19 | 476 | ));\r |
87bc3f19 HW |
477 | }\r |
478 | \r | |
479 | return EFI_SUCCESS;\r | |
480 | }\r | |
a8f59e2e CM |
481 | \r |
482 | /**\r | |
483 | Callback for EDKII_PCI_DEVICE_PPI installation.\r | |
484 | \r | |
485 | @param[in] PeiServices Pointer to PEI Services Table.\r | |
486 | @param[in] NotifyDescriptor Pointer to the descriptor for the Notification\r | |
487 | event that caused this function to execute.\r | |
488 | @param[in] Ppi Pointer to the PPI data associated with this function.\r | |
489 | \r | |
490 | @retval EFI_SUCCESS The function completes successfully\r | |
491 | @retval Others Cannot initialize AHCI controller from given PCI_DEVICE_PPI\r | |
492 | \r | |
493 | **/\r | |
494 | EFI_STATUS\r | |
495 | EFIAPI\r | |
496 | AtaAhciPciDevicePpiInstallationCallback (\r | |
497 | IN EFI_PEI_SERVICES **PeiServices,\r | |
498 | IN EFI_PEI_NOTIFY_DESCRIPTOR *NotifyDescriptor,\r | |
499 | IN VOID *Ppi\r | |
500 | )\r | |
501 | {\r | |
502 | EDKII_PCI_DEVICE_PPI *PciDevice;\r | |
503 | \r | |
504 | PciDevice = (EDKII_PCI_DEVICE_PPI *)Ppi;\r | |
505 | \r | |
506 | return AtaAhciInitPrivateDataFromPciDevice (PciDevice);\r | |
507 | }\r | |
508 | \r | |
509 | /**\r | |
510 | Entry point of the PEIM.\r | |
511 | \r | |
512 | @param[in] FileHandle Handle of the file being invoked.\r | |
513 | @param[in] PeiServices Describes the list of possible PEI Services.\r | |
514 | \r | |
515 | @retval EFI_SUCCESS PPI successfully installed.\r | |
516 | \r | |
517 | **/\r | |
518 | EFI_STATUS\r | |
519 | EFIAPI\r | |
520 | AtaAhciPeimEntry (\r | |
521 | IN EFI_PEI_FILE_HANDLE FileHandle,\r | |
522 | IN CONST EFI_PEI_SERVICES **PeiServices\r | |
523 | )\r | |
524 | {\r | |
525 | DEBUG ((DEBUG_INFO, "%a: Enters.\n", __FUNCTION__));\r | |
526 | \r | |
527 | PeiServicesNotifyPpi (&mAtaAhciHostControllerNotify);\r | |
528 | \r | |
529 | PeiServicesNotifyPpi (&mPciDevicePpiNotify);\r | |
530 | \r | |
531 | return EFI_SUCCESS;\r | |
532 | }\r |