[mirror_edk2.git] / MdeModulePkg / Bus / Pci / NvmExpressPei / NvmExpressPei.c

/** @file\r
  The NvmExpressPei driver is used to manage non-volatile memory subsystem\r
  which follows NVM Express specification at PEI phase.\r
\r
  Copyright (c) 2018 - 2019, Intel Corporation. All rights reserved.<BR>\r
\r
  SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
\r
#include "NvmExpressPei.h"\r
\r
EFI_PEI_PPI_DESCRIPTOR  mNvmeBlkIoPpiListTemplate = {\r
  EFI_PEI_PPI_DESCRIPTOR_PPI,\r
  &gEfiPeiVirtualBlockIoPpiGuid,\r
  NULL\r
};\r
\r
EFI_PEI_PPI_DESCRIPTOR  mNvmeBlkIo2PpiListTemplate = {\r
  (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),\r
  &gEfiPeiVirtualBlockIo2PpiGuid,\r
  NULL\r
};\r
\r
EFI_PEI_PPI_DESCRIPTOR  mNvmeStorageSecurityPpiListTemplate = {\r
  (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),\r
  &gEdkiiPeiStorageSecurityCommandPpiGuid,\r
  NULL\r
};\r
\r
EFI_PEI_PPI_DESCRIPTOR  mNvmePassThruPpiListTemplate = {\r
  (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),\r
  &gEdkiiPeiNvmExpressPassThruPpiGuid,\r
  NULL\r
};\r
\r
EFI_PEI_NOTIFY_DESCRIPTOR  mNvmeEndOfPeiNotifyListTemplate = {\r
  (EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),\r
  &gEfiEndOfPeiSignalPpiGuid,\r
  NvmePeimEndOfPei\r
};\r
\r
EFI_PEI_NOTIFY_DESCRIPTOR  mNvmeHostControllerNotify = {\r
  (EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),\r
  &gEdkiiPeiNvmExpressHostControllerPpiGuid,\r
  NvmeHostControllerPpiInstallationCallback\r
};\r
\r
EFI_PEI_NOTIFY_DESCRIPTOR  mPciDevicePpiNotify = {\r
  (EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),\r
  &gEdkiiPeiPciDevicePpiGuid,\r
  NvmePciDevicePpiInstallationCallback\r
};\r
\r
/**\r
  Check if the specified Nvm Express device namespace is active, and then get the Identify\r
  Namespace data.\r
\r
  @param[in,out] Private        The pointer to the PEI_NVME_CONTROLLER_PRIVATE_DATA data structure.\r
  @param[in]     NamespaceId    The specified namespace identifier.\r
\r
  @retval EFI_SUCCESS    The specified namespace in the device is successfully enumerated.\r
  @return Others         Error occurs when enumerating the namespace.\r
\r
**/\r
EFI_STATUS\r
EnumerateNvmeDevNamespace (\r
  IN OUT PEI_NVME_CONTROLLER_PRIVATE_DATA  *Private,\r
  IN UINT32                                NamespaceId\r
  )\r
{\r
  EFI_STATUS                 Status;\r
  NVME_ADMIN_NAMESPACE_DATA  *NamespaceData;\r
  PEI_NVME_NAMESPACE_INFO    *NamespaceInfo;\r
  UINT32                     DeviceIndex;\r
  UINT32                     Lbads;\r
  UINT32                     Flbas;\r
  UINT32                     LbaFmtIdx;\r
\r
  NamespaceData = (NVME_ADMIN_NAMESPACE_DATA *)AllocateZeroPool (sizeof (NVME_ADMIN_NAMESPACE_DATA));\r
  if (NamespaceData == NULL) {\r
    return EFI_OUT_OF_RESOURCES;\r
  }\r
\r
  //\r
  // Identify Namespace\r
  //\r
  Status = NvmeIdentifyNamespace (\r
             Private,\r
             NamespaceId,\r
             NamespaceData\r
             );\r
  if (EFI_ERROR (Status)) {\r
    DEBUG ((DEBUG_ERROR, "%a: NvmeIdentifyNamespace fail, Status - %r\n", __FUNCTION__, Status));\r
    goto Exit;\r
  }\r
\r
  //\r
  // Validate Namespace\r
  //\r
  if (NamespaceData->Ncap == 0) {\r
    DEBUG ((DEBUG_INFO, "%a: Namespace ID %d is an inactive one.\n", __FUNCTION__, NamespaceId));\r
    Status = EFI_DEVICE_ERROR;\r
    goto Exit;\r
  }\r
\r
  DeviceIndex                  = Private->ActiveNamespaceNum;\r
  NamespaceInfo                = &Private->NamespaceInfo[DeviceIndex];\r
  NamespaceInfo->NamespaceId   = NamespaceId;\r
  NamespaceInfo->NamespaceUuid = NamespaceData->Eui64;\r
  NamespaceInfo->Controller    = Private;\r
  Private->ActiveNamespaceNum++;\r
\r
  //\r
  // Build BlockIo media structure\r
  //\r
  Flbas     = NamespaceData->Flbas;\r
  LbaFmtIdx = Flbas & 0xF;\r
\r
  //\r
  // Currently this NVME driver only suport Metadata Size == 0\r
  //\r
  if (NamespaceData->LbaFormat[LbaFmtIdx].Ms != 0) {\r
    DEBUG ((\r
      DEBUG_ERROR,\r
      "NVME IDENTIFY NAMESPACE [%d] Ms(%d) is not supported.\n",\r
      NamespaceId,\r
      NamespaceData->LbaFormat[LbaFmtIdx].Ms\r
      ));\r
    Status = EFI_UNSUPPORTED;\r
    goto Exit;\r
  }\r
\r
  Lbads = NamespaceData->LbaFormat[LbaFmtIdx].Lbads;\r
\r
  NamespaceInfo->Media.InterfaceType  = MSG_NVME_NAMESPACE_DP;\r
  NamespaceInfo->Media.RemovableMedia = FALSE;\r
  NamespaceInfo->Media.MediaPresent   = TRUE;\r
  NamespaceInfo->Media.ReadOnly       = FALSE;\r
  NamespaceInfo->Media.BlockSize      = (UINT32)1 << Lbads;\r
  NamespaceInfo->Media.LastBlock      = (EFI_PEI_LBA)NamespaceData->Nsze - 1;\r
  DEBUG ((\r
    DEBUG_INFO,\r
    "%a: Namespace ID %d - BlockSize = 0x%x, LastBlock = 0x%lx\n",\r
    __FUNCTION__,\r
    NamespaceId,\r
    NamespaceInfo->Media.BlockSize,\r
    NamespaceInfo->Media.LastBlock\r
    ));\r
\r
Exit:\r
  if (NamespaceData != NULL) {\r
    FreePool (NamespaceData);\r
  }\r
\r
  return Status;\r
}\r
\r
/**\r
  Discover all Nvm Express device active namespaces.\r
\r
  @param[in,out] Private    The pointer to the PEI_NVME_CONTROLLER_PRIVATE_DATA data structure.\r
\r
  @retval EFI_SUCCESS       All the namespaces in the device are successfully enumerated.\r
  @return EFI_NOT_FOUND     No active namespaces can be found.\r
\r
**/\r
EFI_STATUS\r
NvmeDiscoverNamespaces (\r
  IN OUT PEI_NVME_CONTROLLER_PRIVATE_DATA  *Private\r
  )\r
{\r
  UINT32  NamespaceId;\r
\r
  Private->ActiveNamespaceNum = 0;\r
  Private->NamespaceInfo      = AllocateZeroPool (Private->ControllerData->Nn * sizeof (PEI_NVME_NAMESPACE_INFO));\r
\r
  //\r
  // According to Nvm Express 1.1 spec Figure 82, the field 'Nn' of the identify\r
  // controller data defines the number of valid namespaces present for the\r
  // controller. Namespaces shall be allocated in order (starting with 1) and\r
  // packed sequentially.\r
  //\r
  for (NamespaceId = 1; NamespaceId <= Private->ControllerData->Nn; NamespaceId++) {\r
    //\r
    // For now, we do not care the return status. Since if a valid namespace is inactive,\r
    // error status will be returned. But we continue to enumerate other valid namespaces.\r
    //\r
    EnumerateNvmeDevNamespace (Private, NamespaceId);\r
  }\r
\r
  if (Private->ActiveNamespaceNum == 0) {\r
    return EFI_NOT_FOUND;\r
  }\r
\r
  return EFI_SUCCESS;\r
}\r
\r
/**\r
  One notified function to cleanup the allocated resources at the end of PEI.\r
\r
  @param[in] PeiServices         Pointer to PEI Services Table.\r
  @param[in] NotifyDescriptor    Pointer to the descriptor for the Notification\r
                                 event that caused this function to execute.\r
  @param[in] Ppi                 Pointer to the PPI data associated with this function.\r
\r
  @retval     EFI_SUCCESS  The function completes successfully\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
NvmePeimEndOfPei (\r
  IN EFI_PEI_SERVICES           **PeiServices,\r
  IN EFI_PEI_NOTIFY_DESCRIPTOR  *NotifyDescriptor,\r
  IN VOID                       *Ppi\r
  )\r
{\r
  PEI_NVME_CONTROLLER_PRIVATE_DATA  *Private;\r
\r
  Private = GET_NVME_PEIM_HC_PRIVATE_DATA_FROM_THIS_NOTIFY (NotifyDescriptor);\r
  NvmeFreeDmaResource (Private);\r
\r
  return EFI_SUCCESS;\r
}\r
\r
/**\r
  Initialize and install PrivateData PPIs.\r
\r
  @param[in] MmioBase            MMIO base address of specific Nvme controller\r
  @param[in] DevicePath          A pointer to the EFI_DEVICE_PATH_PROTOCOL\r
                                 structure.\r
  @param[in] DevicePathLength    Length of the device path.\r
\r
  @retval EFI_SUCCESS  Nvme controller initialized and PPIs installed\r
  @retval others       Failed to initialize Nvme controller\r
**/\r
EFI_STATUS\r
NvmeInitPrivateData (\r
  IN UINTN                     MmioBase,\r
  IN EFI_DEVICE_PATH_PROTOCOL  *DevicePath,\r
  IN UINTN                     DevicePathLength\r
  )\r
{\r
  EFI_STATUS                        Status;\r
  EFI_BOOT_MODE                     BootMode;\r
  PEI_NVME_CONTROLLER_PRIVATE_DATA  *Private;\r
  EFI_PHYSICAL_ADDRESS              DeviceAddress;\r
\r
  DEBUG ((DEBUG_INFO, "%a: Enters.\n", __FUNCTION__));\r
\r
  //\r
  // Get the current boot mode.\r
  //\r
  Status = PeiServicesGetBootMode (&BootMode);\r
  if (EFI_ERROR (Status)) {\r
    DEBUG ((DEBUG_ERROR, "%a: Fail to get the current boot mode.\n", __FUNCTION__));\r
    return Status;\r
  }\r
\r
  //\r
  // Check validity of the device path of the NVM Express controller.\r
  //\r
  Status = NvmeIsHcDevicePathValid (DevicePath, DevicePathLength);\r
  if (EFI_ERROR (Status)) {\r
    DEBUG ((\r
      DEBUG_ERROR,\r
      "%a: The device path is invalid for Controller %d.\n",\r
      __FUNCTION__\r
      ));\r
    return Status;\r
  }\r
\r
  //\r
  // For S3 resume performance consideration, not all NVM Express controllers\r
  // will be initialized. The driver consumes the content within\r
  // S3StorageDeviceInitList LockBox to see if a controller will be skipped\r
  // during S3 resume.\r
  //\r
  if ((BootMode == BOOT_ON_S3_RESUME) &&\r
      (NvmeS3SkipThisController (DevicePath, DevicePathLength)))\r
  {\r
    DEBUG ((\r
      DEBUG_ERROR,\r
      "%a: skipped during S3.\n",\r
      __FUNCTION__\r
      ));\r
    return EFI_SUCCESS;\r
  }\r
\r
  //\r
  // Memory allocation for controller private data\r
  //\r
  Private = AllocateZeroPool (sizeof (PEI_NVME_CONTROLLER_PRIVATE_DATA));\r
  if (Private == NULL) {\r
    DEBUG ((\r
      DEBUG_ERROR,\r
      "%a: Fail to allocate private data.\n",\r
      __FUNCTION__\r
      ));\r
    return EFI_OUT_OF_RESOURCES;\r
  }\r
\r
  //\r
  // Memory allocation for transfer-related data\r
  //\r
  Status = IoMmuAllocateBuffer (\r
             NVME_MEM_MAX_PAGES,\r
             &Private->Buffer,\r
             &DeviceAddress,\r
             &Private->BufferMapping\r
             );\r
  if (EFI_ERROR (Status)) {\r
    DEBUG ((\r
      DEBUG_ERROR,\r
      "%a: Fail to allocate DMA buffers.\n",\r
      __FUNCTION__\r
      ));\r
    return Status;\r
  }\r
\r
  ASSERT (DeviceAddress == ((EFI_PHYSICAL_ADDRESS)(UINTN)Private->Buffer));\r
  DEBUG ((DEBUG_INFO, "%a: DMA buffer base at 0x%x\n", __FUNCTION__, Private->Buffer));\r
\r
  //\r
  // Initialize controller private data\r
  //\r
  Private->Signature        = NVME_PEI_CONTROLLER_PRIVATE_DATA_SIGNATURE;\r
  Private->MmioBase         = MmioBase;\r
  Private->DevicePathLength = DevicePathLength;\r
  Private->DevicePath       = DevicePath;\r
\r
  //\r
  // Initialize the NVME controller\r
  //\r
  Status = NvmeControllerInit (Private);\r
  if (EFI_ERROR (Status)) {\r
    DEBUG ((\r
      DEBUG_ERROR,\r
      "%a: Controller initialization fail with Status - %r.\n",\r
      __FUNCTION__,\r
      Status\r
      ));\r
    NvmeFreeDmaResource (Private);\r
    return Status;\r
  }\r
\r
  //\r
  // Enumerate the NVME namespaces on the controller\r
  //\r
  Status = NvmeDiscoverNamespaces (Private);\r
  if (EFI_ERROR (Status)) {\r
    //\r
    // No active namespace was found on the controller\r
    //\r
    DEBUG ((\r
      DEBUG_ERROR,\r
      "%a: Namespaces discovery fail with Status - %r.\n",\r
      __FUNCTION__,\r
      Status\r
      ));\r
    NvmeFreeDmaResource (Private);\r
    return Status;\r
  }\r
\r
  //\r
  // Nvm Express Pass Thru PPI\r
  //\r
  Private->PassThruMode.Attributes = EFI_NVM_EXPRESS_PASS_THRU_ATTRIBUTES_PHYSICAL |\r
                                     EFI_NVM_EXPRESS_PASS_THRU_ATTRIBUTES_LOGICAL |\r
                                     EFI_NVM_EXPRESS_PASS_THRU_ATTRIBUTES_CMD_SET_NVM;\r
  Private->PassThruMode.IoAlign             = sizeof (UINTN);\r
  Private->PassThruMode.NvmeVersion         = EDKII_PEI_NVM_EXPRESS_PASS_THRU_PPI_REVISION;\r
  Private->NvmePassThruPpi.Mode             = &Private->PassThruMode;\r
  Private->NvmePassThruPpi.GetDevicePath    = NvmePassThruGetDevicePath;\r
  Private->NvmePassThruPpi.GetNextNameSpace = NvmePassThruGetNextNameSpace;\r
  Private->NvmePassThruPpi.PassThru         = NvmePassThru;\r
  CopyMem (\r
    &Private->NvmePassThruPpiList,\r
    &mNvmePassThruPpiListTemplate,\r
    sizeof (EFI_PEI_PPI_DESCRIPTOR)\r
    );\r
  Private->NvmePassThruPpiList.Ppi = &Private->NvmePassThruPpi;\r
  PeiServicesInstallPpi (&Private->NvmePassThruPpiList);\r
\r
  //\r
  // Block Io PPI\r
  //\r
  Private->BlkIoPpi.GetNumberOfBlockDevices = NvmeBlockIoPeimGetDeviceNo;\r
  Private->BlkIoPpi.GetBlockDeviceMediaInfo = NvmeBlockIoPeimGetMediaInfo;\r
  Private->BlkIoPpi.ReadBlocks              = NvmeBlockIoPeimReadBlocks;\r
  CopyMem (\r
    &Private->BlkIoPpiList,\r
    &mNvmeBlkIoPpiListTemplate,\r
    sizeof (EFI_PEI_PPI_DESCRIPTOR)\r
    );\r
  Private->BlkIoPpiList.Ppi = &Private->BlkIoPpi;\r
\r
  Private->BlkIo2Ppi.Revision                = EFI_PEI_RECOVERY_BLOCK_IO2_PPI_REVISION;\r
  Private->BlkIo2Ppi.GetNumberOfBlockDevices = NvmeBlockIoPeimGetDeviceNo2;\r
  Private->BlkIo2Ppi.GetBlockDeviceMediaInfo = NvmeBlockIoPeimGetMediaInfo2;\r
  Private->BlkIo2Ppi.ReadBlocks              = NvmeBlockIoPeimReadBlocks2;\r
  CopyMem (\r
    &Private->BlkIo2PpiList,\r
    &mNvmeBlkIo2PpiListTemplate,\r
    sizeof (EFI_PEI_PPI_DESCRIPTOR)\r
    );\r
  Private->BlkIo2PpiList.Ppi = &Private->BlkIo2Ppi;\r
  PeiServicesInstallPpi (&Private->BlkIoPpiList);\r
\r
  //\r
  // Check if the NVME controller supports the Security Receive/Send commands\r
  //\r
  if ((Private->ControllerData->Oacs & SECURITY_SEND_RECEIVE_SUPPORTED) != 0) {\r
    DEBUG ((\r
      DEBUG_INFO,\r
      "%a: Security Security Command PPI will be produced.\n",\r
      __FUNCTION__\r
      ));\r
    Private->StorageSecurityPpi.Revision           = EDKII_STORAGE_SECURITY_PPI_REVISION;\r
    Private->StorageSecurityPpi.GetNumberofDevices = NvmeStorageSecurityGetDeviceNo;\r
    Private->StorageSecurityPpi.GetDevicePath      = NvmeStorageSecurityGetDevicePath;\r
    Private->StorageSecurityPpi.ReceiveData        = NvmeStorageSecurityReceiveData;\r
    Private->StorageSecurityPpi.SendData           = NvmeStorageSecuritySendData;\r
    CopyMem (\r
      &Private->StorageSecurityPpiList,\r
      &mNvmeStorageSecurityPpiListTemplate,\r
      sizeof (EFI_PEI_PPI_DESCRIPTOR)\r
      );\r
    Private->StorageSecurityPpiList.Ppi = &Private->StorageSecurityPpi;\r
    PeiServicesInstallPpi (&Private->StorageSecurityPpiList);\r
  }\r
\r
  CopyMem (\r
    &Private->EndOfPeiNotifyList,\r
    &mNvmeEndOfPeiNotifyListTemplate,\r
    sizeof (EFI_PEI_NOTIFY_DESCRIPTOR)\r
    );\r
  PeiServicesNotifyPpi (&Private->EndOfPeiNotifyList);\r
\r
  return EFI_SUCCESS;\r
}\r
\r
/**\r
  Initialize Nvme controller from fiven PCI_DEVICE_PPI.\r
\r
  @param[in] PciDevice  Pointer to the PCI Device PPI instance.\r
\r
  @retval EFI_SUCCESS      The function completes successfully\r
  @retval Others           Cannot initialize Nvme controller for given device\r
**/\r
EFI_STATUS\r
NvmeInitControllerDataFromPciDevice (\r
  EDKII_PCI_DEVICE_PPI  *PciDevice\r
  )\r
{\r
  EFI_STATUS                Status;\r
  PCI_TYPE00                PciData;\r
  UINTN                     MmioBase;\r
  EFI_DEVICE_PATH_PROTOCOL  *DevicePath;\r
  UINTN                     DevicePathLength;\r
  UINT64                    EnabledPciAttributes;\r
  UINT32                    MmioBaseH;\r
\r
  //\r
  // Now further check the PCI header: Base Class (offset 0x0B), Sub Class (offset 0x0A) and\r
  // Programming Interface (offset 0x09). This controller should be an Nvme controller\r
  //\r
  Status = PciDevice->PciIo.Pci.Read (\r
                                  &PciDevice->PciIo,\r
                                  EfiPciIoWidthUint8,\r
                                  PCI_CLASSCODE_OFFSET,\r
                                  sizeof (PciData.Hdr.ClassCode),\r
                                  PciData.Hdr.ClassCode\r
                                  );\r
  if (EFI_ERROR (Status)) {\r
    return EFI_UNSUPPORTED;\r
  }\r
\r
  if (!IS_PCI_NVMHCI (&PciData)) {\r
    return EFI_UNSUPPORTED;\r
  }\r
\r
  Status = PciDevice->PciIo.Attributes (\r
                              &PciDevice->PciIo,\r
                              EfiPciIoAttributeOperationSupported,\r
                              0,\r
                              &EnabledPciAttributes\r
                              );\r
  if (EFI_ERROR (Status)) {\r
    return EFI_UNSUPPORTED;\r
  } else {\r
    EnabledPciAttributes &= (UINT64)EFI_PCI_DEVICE_ENABLE;\r
    Status                = PciDevice->PciIo.Attributes (\r
                                               &PciDevice->PciIo,\r
                                               EfiPciIoAttributeOperationEnable,\r
                                               EnabledPciAttributes,\r
                                               NULL\r
                                               );\r
    if (EFI_ERROR (Status)) {\r
      return EFI_UNSUPPORTED;\r
    }\r
  }\r
\r
  Status = PciDevice->PciIo.Pci.Read (\r
                                  &PciDevice->PciIo,\r
                                  EfiPciIoWidthUint32,\r
                                  PCI_BASE_ADDRESSREG_OFFSET,\r
                                  1,\r
                                  &MmioBase\r
                                  );\r
  if (EFI_ERROR (Status)) {\r
    return EFI_UNSUPPORTED;\r
  }\r
\r
  switch (MmioBase & 0x07) {\r
    case 0x0:\r
      //\r
      // Memory space for 32 bit bar address\r
      //\r
      MmioBase = MmioBase & 0xFFFFFFF0;\r
      break;\r
    case 0x4:\r
      //\r
      // For 64 bit bar address, read the high 32bits of this 64 bit bar\r
      //\r
      Status = PciDevice->PciIo.Pci.Read (\r
                                      &PciDevice->PciIo,\r
                                      EfiPciIoWidthUint32,\r
                                      PCI_BASE_ADDRESSREG_OFFSET + 4,\r
                                      1,\r
                                      &MmioBaseH\r
                                      );\r
      //\r
      // For 32 bit environment, high 32bits of the bar should be zero.\r
      //\r
      if (  EFI_ERROR (Status)\r
         || ((MmioBaseH != 0) && (sizeof (UINTN) == sizeof (UINT32))))\r
      {\r
        return EFI_UNSUPPORTED;\r
      }\r
\r
      MmioBase  = MmioBase & 0xFFFFFFF0;\r
      MmioBase |= LShiftU64 ((UINT64)MmioBaseH, 32);\r
      break;\r
    default:\r
      //\r
      // Unknown bar type\r
      //\r
      return EFI_UNSUPPORTED;\r
  }\r
\r
  DevicePathLength = GetDevicePathSize (PciDevice->DevicePath);\r
  DevicePath       = PciDevice->DevicePath;\r
\r
  Status = NvmeInitPrivateData (MmioBase, DevicePath, DevicePathLength);\r
  if (EFI_ERROR (Status)) {\r
    DEBUG ((\r
      DEBUG_INFO,\r
      "%a: Failed to init controller, with Status - %r\n",\r
      __FUNCTION__,\r
      Status\r
      ));\r
  }\r
\r
  return EFI_SUCCESS;\r
}\r
\r
/**\r
  Callback for EDKII_PCI_DEVICE_PPI installation.\r
\r
  @param[in] PeiServices         Pointer to PEI Services Table.\r
  @param[in] NotifyDescriptor    Pointer to the descriptor for the Notification\r
                                 event that caused this function to execute.\r
  @param[in] Ppi                 Pointer to the PPI data associated with this function.\r
\r
  @retval EFI_SUCCESS            The function completes successfully\r
  @retval Others                 Cannot initialize Nvme controller from given PCI_DEVICE_PPI\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
NvmePciDevicePpiInstallationCallback (\r
  IN EFI_PEI_SERVICES           **PeiServices,\r
  IN EFI_PEI_NOTIFY_DESCRIPTOR  *NotifyDescriptor,\r
  IN VOID                       *Ppi\r
  )\r
{\r
  EDKII_PCI_DEVICE_PPI  *PciDevice;\r
\r
  PciDevice = (EDKII_PCI_DEVICE_PPI *)Ppi;\r
\r
  return NvmeInitControllerDataFromPciDevice (PciDevice);\r
}\r
\r
/**\r
  Initialize Nvme controller from EDKII_NVM_EXPRESS_HOST_CONTROLLER_PPI instance.\r
\r
  @param[in] NvmeHcPpi  Pointer to the Nvme Host Controller PPI instance.\r
\r
  @retval EFI_SUCCESS   PPI successfully installed.\r
**/\r
EFI_STATUS\r
NvmeInitControllerFromHostControllerPpi (\r
  IN EDKII_NVM_EXPRESS_HOST_CONTROLLER_PPI  *NvmeHcPpi\r
  )\r
{\r
  UINT8                     Controller;\r
  UINTN                     MmioBase;\r
  UINTN                     DevicePathLength;\r
  EFI_DEVICE_PATH_PROTOCOL  *DevicePath;\r
  EFI_STATUS                Status;\r
\r
  Controller = 0;\r
  MmioBase   = 0;\r
  while (TRUE) {\r
    Status = NvmeHcPpi->GetNvmeHcMmioBar (\r
                          NvmeHcPpi,\r
                          Controller,\r
                          &MmioBase\r
                          );\r
    //\r
    // When status is error, meant no controller is found\r
    //\r
    if (EFI_ERROR (Status)) {\r
      break;\r
    }\r
\r
    Status = NvmeHcPpi->GetNvmeHcDevicePath (\r
                          NvmeHcPpi,\r
                          Controller,\r
                          &DevicePathLength,\r
                          &DevicePath\r
                          );\r
    if (EFI_ERROR (Status)) {\r
      DEBUG ((\r
        DEBUG_ERROR,\r
        "%a: Fail to allocate get the device path for Controller %d.\n",\r
        __FUNCTION__,\r
        Controller\r
        ));\r
      return Status;\r
    }\r
\r
    Status = NvmeInitPrivateData (MmioBase, DevicePath, DevicePathLength);\r
    if (EFI_ERROR (Status)) {\r
      DEBUG ((\r
        DEBUG_ERROR,\r
        "%a: Controller initialization fail for Controller %d with Status - %r.\n",\r
        __FUNCTION__,\r
        Controller,\r
        Status\r
        ));\r
    } else {\r
      DEBUG ((\r
        DEBUG_INFO,\r
        "%a: Controller %d has been successfully initialized.\n",\r
        __FUNCTION__,\r
        Controller\r
        ));\r
    }\r
\r
    Controller++;\r
  }\r
\r
  return EFI_SUCCESS;\r
}\r
\r
/**\r
  Callback for EDKII_NVM_EXPRESS_HOST_CONTROLLER_PPI installation.\r
\r
  @param[in] PeiServices         Pointer to PEI Services Table.\r
  @param[in] NotifyDescriptor    Pointer to the descriptor for the Notification\r
                                 event that caused this function to execute.\r
  @param[in] Ppi                 Pointer to the PPI data associated with this function.\r
\r
  @retval EFI_SUCCESS            The function completes successfully\r
  @retval Others                 Cannot initialize Nvme controller from given EDKII_NVM_EXPRESS_HOST_CONTROLLER_PPI\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
NvmeHostControllerPpiInstallationCallback (\r
  IN EFI_PEI_SERVICES           **PeiServices,\r
  IN EFI_PEI_NOTIFY_DESCRIPTOR  *NotifyDescriptor,\r
  IN VOID                       *Ppi\r
  )\r
{\r
  EDKII_NVM_EXPRESS_HOST_CONTROLLER_PPI  *NvmeHcPpi;\r
\r
  if (Ppi == NULL) {\r
    return EFI_INVALID_PARAMETER;\r
  }\r
\r
  NvmeHcPpi = (EDKII_NVM_EXPRESS_HOST_CONTROLLER_PPI *)Ppi;\r
\r
  return NvmeInitControllerFromHostControllerPpi (NvmeHcPpi);\r
}\r
\r
/**\r
  Entry point of the PEIM.\r
\r
  @param[in] FileHandle     Handle of the file being invoked.\r
  @param[in] PeiServices    Describes the list of possible PEI Services.\r
\r
  @retval EFI_SUCCESS    PPI successfully installed.\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
NvmExpressPeimEntry (\r
  IN EFI_PEI_FILE_HANDLE     FileHandle,\r
  IN CONST EFI_PEI_SERVICES  **PeiServices\r
  )\r
{\r
  DEBUG ((DEBUG_INFO, "%a: Enters.\n", __FUNCTION__));\r
\r
  PeiServicesNotifyPpi (&mNvmeHostControllerNotify);\r
\r
  PeiServicesNotifyPpi (&mPciDevicePpiNotify);\r
\r
  return EFI_SUCCESS;\r
}\r