projects / mirror_edk2.git / blame
| Commit | Line | Data |
|---|---|---|
| 9060e3ec | 1 | /** @file\r |
| fcdfcdbf | 2 | Power management support functions implementation for PCI Bus module.\r |
| 9060e3ec | 3 | \r |
| fcdfcdbf | 4 | Copyright (c) 2006 - 2019, Intel Corporation. All rights reserved.<BR>\r |
| 9d510e61 | 5 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
| 9060e3ec | 6 | \r |
| 7 | **/\r | |
| 8 | \r | |
| 9 | #include "PciBus.h"\r | |
| 10 | \r | |
| 11 | /**\r | |
| 12 | This function is intended to turn off PWE assertion and\r | |
| 13 | put the device to D0 state if the device supports\r | |
| 14 | PCI Power Management.\r | |
| 15 | \r | |
| 16 | @param PciIoDevice PCI device instance.\r | |
| 17 | \r | |
| 18 | @retval EFI_UNSUPPORTED PCI Device does not support power management.\r | |
| 19 | @retval EFI_SUCCESS Turned off PWE successfully.\r | |
| 20 | \r | |
| 21 | **/\r | |
| 22 | EFI_STATUS\r | |
| 23 | ResetPowerManagementFeature (\r | |
| 1436aea4 | 24 | IN PCI_IO_DEVICE *PciIoDevice\r |
| 9060e3ec | 25 | )\r |
| 26 | {\r | |
| 27 | EFI_STATUS Status;\r | |
| 28 | UINT8 PowerManagementRegBlock;\r | |
| 29 | UINT16 PowerManagementCSR;\r | |
| 30 | \r | |
| 31 | PowerManagementRegBlock = 0;\r | |
| 32 | \r | |
| 33 | Status = LocateCapabilityRegBlock (\r | |
| 1436aea4 MK |
34 | PciIoDevice,\r |
| 35 | EFI_PCI_CAPABILITY_ID_PMI,\r | |
| 36 | &PowerManagementRegBlock,\r | |
| 37 | NULL\r | |
| 38 | );\r | |
| 9060e3ec | 39 | \r |
| 40 | if (EFI_ERROR (Status)) {\r | |
| 41 | return EFI_UNSUPPORTED;\r | |
| 42 | }\r | |
| 43 | \r | |
| 44 | //\r | |
| 45 | // Turn off the PWE assertion and put the device into D0 State\r | |
| 46 | //\r | |
| 9060e3ec | 47 | \r |
| 48 | //\r | |
| 7e242786 | 49 | // Read PMCSR\r |
| 9060e3ec | 50 | //\r |
| 7e242786 | 51 | Status = PciIoDevice->PciIo.Pci.Read (\r |
| 52 | &PciIoDevice->PciIo,\r | |
| 53 | EfiPciIoWidthUint16,\r | |
| 54 | PowerManagementRegBlock + 4,\r | |
| 55 | 1,\r | |
| 56 | &PowerManagementCSR\r | |
| 57 | );\r | |
| 58 | \r | |
| 59 | if (!EFI_ERROR (Status)) {\r | |
| 60 | //\r | |
| 61 | // Clear PME_Status bit\r | |
| 62 | //\r | |
| 63 | PowerManagementCSR |= BIT15;\r | |
| 64 | //\r | |
| 65 | // Clear PME_En bit. PowerState = D0.\r | |
| 66 | //\r | |
| 67 | PowerManagementCSR &= ~(BIT8 | BIT1 | BIT0);\r | |
| 68 | \r | |
| 69 | //\r | |
| 70 | // Write PMCSR\r | |
| 71 | //\r | |
| 72 | Status = PciIoDevice->PciIo.Pci.Write (\r | |
| 73 | &PciIoDevice->PciIo,\r | |
| 74 | EfiPciIoWidthUint16,\r | |
| 75 | PowerManagementRegBlock + 4,\r | |
| 76 | 1,\r | |
| 77 | &PowerManagementCSR\r | |
| 78 | );\r | |
| 79 | }\r | |
| 1436aea4 | 80 | \r |
| 7e242786 | 81 | return Status;\r |
| 9060e3ec | 82 | }\r |