]>
Commit | Line | Data |
---|---|---|
9060e3ec | 1 | /** @file\r |
2 | Set up ROM Table for PCI Bus module.\r | |
3 | \r | |
221c8fd5 | 4 | Copyright (c) 2006 - 2017, Intel Corporation. All rights reserved.<BR>\r |
9d510e61 | 5 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
9060e3ec | 6 | \r |
7 | **/\r | |
8 | \r | |
9 | #include "PciBus.h"\r | |
10 | \r | |
11 | //\r | |
12 | // PCI ROM image information\r | |
13 | //\r | |
14 | typedef struct {\r | |
1436aea4 MK |
15 | EFI_HANDLE ImageHandle;\r |
16 | UINTN Seg;\r | |
17 | UINT8 Bus;\r | |
18 | UINT8 Dev;\r | |
19 | UINT8 Func;\r | |
20 | VOID *RomImage;\r | |
21 | UINT64 RomSize;\r | |
221c8fd5 | 22 | } PCI_ROM_IMAGE;\r |
9060e3ec | 23 | \r |
1436aea4 MK |
24 | UINTN mNumberOfPciRomImages = 0;\r |
25 | UINTN mMaxNumberOfPciRomImages = 0;\r | |
26 | PCI_ROM_IMAGE *mRomImageTable = NULL;\r | |
9060e3ec | 27 | \r |
28 | /**\r | |
29 | Add the Rom Image to internal database for later PCI light enumeration.\r | |
30 | \r | |
31 | @param ImageHandle Option Rom image handle.\r | |
32 | @param Seg Segment of PCI space.\r | |
33 | @param Bus Bus NO of PCI space.\r | |
34 | @param Dev Dev NO of PCI space.\r | |
35 | @param Func Func NO of PCI space.\r | |
221c8fd5 RN |
36 | @param RomImage Option Rom buffer.\r |
37 | @param RomSize Size of Option Rom buffer.\r | |
9060e3ec | 38 | **/\r |
39 | VOID\r | |
40 | PciRomAddImageMapping (\r | |
41 | IN EFI_HANDLE ImageHandle,\r | |
42 | IN UINTN Seg,\r | |
43 | IN UINT8 Bus,\r | |
44 | IN UINT8 Dev,\r | |
45 | IN UINT8 Func,\r | |
221c8fd5 RN |
46 | IN VOID *RomImage,\r |
47 | IN UINT64 RomSize\r | |
9060e3ec | 48 | )\r |
49 | {\r | |
1436aea4 MK |
50 | UINTN Index;\r |
51 | PCI_ROM_IMAGE *NewTable;\r | |
9060e3ec | 52 | \r |
84ed8edf | 53 | for (Index = 0; Index < mNumberOfPciRomImages; Index++) {\r |
1436aea4 MK |
54 | if ((mRomImageTable[Index].Seg == Seg) &&\r |
55 | (mRomImageTable[Index].Bus == Bus) &&\r | |
56 | (mRomImageTable[Index].Dev == Dev) &&\r | |
57 | (mRomImageTable[Index].Func == Func))\r | |
58 | {\r | |
84ed8edf RN |
59 | //\r |
60 | // Expect once RomImage and RomSize are recorded, they will be passed in\r | |
a4b7aa36 MK |
61 | // later when updating ImageHandle. They may also be updated with new\r |
62 | // values if the platform provides an override of RomImage and RomSize.\r | |
84ed8edf | 63 | //\r |
84ed8edf | 64 | break;\r |
9060e3ec | 65 | }\r |
84ed8edf | 66 | }\r |
9060e3ec | 67 | \r |
84ed8edf RN |
68 | if (Index == mNumberOfPciRomImages) {\r |
69 | //\r | |
70 | // Rom Image Table buffer needs to grow.\r | |
71 | //\r | |
72 | if (mNumberOfPciRomImages == mMaxNumberOfPciRomImages) {\r | |
73 | NewTable = ReallocatePool (\r | |
74 | mMaxNumberOfPciRomImages * sizeof (PCI_ROM_IMAGE),\r | |
75 | (mMaxNumberOfPciRomImages + 0x20) * sizeof (PCI_ROM_IMAGE),\r | |
76 | mRomImageTable\r | |
77 | );\r | |
78 | if (NewTable == NULL) {\r | |
1436aea4 | 79 | return;\r |
84ed8edf RN |
80 | }\r |
81 | \r | |
82 | mRomImageTable = NewTable;\r | |
83 | mMaxNumberOfPciRomImages += 0x20;\r | |
84 | }\r | |
1436aea4 | 85 | \r |
84ed8edf RN |
86 | //\r |
87 | // Record the new PCI device\r | |
88 | //\r | |
89 | mRomImageTable[Index].Seg = Seg;\r | |
90 | mRomImageTable[Index].Bus = Bus;\r | |
91 | mRomImageTable[Index].Dev = Dev;\r | |
92 | mRomImageTable[Index].Func = Func;\r | |
93 | mNumberOfPciRomImages++;\r | |
9060e3ec | 94 | }\r |
95 | \r | |
84ed8edf RN |
96 | mRomImageTable[Index].ImageHandle = ImageHandle;\r |
97 | mRomImageTable[Index].RomImage = RomImage;\r | |
98 | mRomImageTable[Index].RomSize = RomSize;\r | |
9060e3ec | 99 | }\r |
100 | \r | |
101 | /**\r | |
102 | Get Option rom driver's mapping for PCI device.\r | |
103 | \r | |
104 | @param PciIoDevice Device instance.\r | |
105 | \r | |
106 | @retval TRUE Found Image mapping.\r | |
107 | @retval FALSE Cannot found image mapping.\r | |
108 | \r | |
109 | **/\r | |
110 | BOOLEAN\r | |
111 | PciRomGetImageMapping (\r | |
1436aea4 | 112 | IN PCI_IO_DEVICE *PciIoDevice\r |
9060e3ec | 113 | )\r |
114 | {\r | |
1436aea4 MK |
115 | EFI_PCI_ROOT_BRIDGE_IO_PROTOCOL *PciRootBridgeIo;\r |
116 | UINTN Index;\r | |
9060e3ec | 117 | \r |
118 | PciRootBridgeIo = PciIoDevice->PciRootBridgeIo;\r | |
9060e3ec | 119 | \r |
120 | for (Index = 0; Index < mNumberOfPciRomImages; Index++) {\r | |
1436aea4 MK |
121 | if ((mRomImageTable[Index].Seg == PciRootBridgeIo->SegmentNumber) &&\r |
122 | (mRomImageTable[Index].Bus == PciIoDevice->BusNumber) &&\r | |
123 | (mRomImageTable[Index].Dev == PciIoDevice->DeviceNumber) &&\r | |
124 | (mRomImageTable[Index].Func == PciIoDevice->FunctionNumber))\r | |
125 | {\r | |
9060e3ec | 126 | if (mRomImageTable[Index].ImageHandle != NULL) {\r |
b5cbef4e | 127 | AddDriver (PciIoDevice, mRomImageTable[Index].ImageHandle, NULL);\r |
9060e3ec | 128 | }\r |
1436aea4 | 129 | \r |
84ed8edf RN |
130 | PciIoDevice->PciIo.RomImage = mRomImageTable[Index].RomImage;\r |
131 | PciIoDevice->PciIo.RomSize = mRomImageTable[Index].RomSize;\r | |
132 | return TRUE;\r | |
9060e3ec | 133 | }\r |
134 | }\r | |
135 | \r | |
84ed8edf | 136 | return FALSE;\r |
9060e3ec | 137 | }\r |