]>
Commit | Line | Data |
---|---|---|
a59e2ede RN |
1 | /** @file\r |
2 | Header file for PciSioSerial Driver\r | |
3 | \r | |
d1102dba | 4 | Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r |
9d510e61 | 5 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
a59e2ede RN |
6 | \r |
7 | **/\r | |
8 | \r | |
9 | #ifndef _SERIAL_H_\r | |
10 | #define _SERIAL_H_\r | |
11 | \r | |
12 | \r | |
13 | #include <Uefi.h>\r | |
14 | \r | |
15 | #include <IndustryStandard/Pci.h>\r | |
16 | \r | |
17 | #include <Protocol/SuperIo.h>\r | |
18 | #include <Protocol/PciIo.h>\r | |
19 | #include <Protocol/SerialIo.h>\r | |
20 | #include <Protocol/DevicePath.h>\r | |
21 | \r | |
22 | #include <Library/DebugLib.h>\r | |
23 | #include <Library/UefiDriverEntryPoint.h>\r | |
24 | #include <Library/UefiLib.h>\r | |
25 | #include <Library/DevicePathLib.h>\r | |
26 | #include <Library/BaseMemoryLib.h>\r | |
27 | #include <Library/MemoryAllocationLib.h>\r | |
28 | #include <Library/UefiBootServicesTableLib.h>\r | |
29 | #include <Library/ReportStatusCodeLib.h>\r | |
30 | #include <Library/PcdLib.h>\r | |
31 | #include <Library/IoLib.h>\r | |
32 | #include <Library/PrintLib.h>\r | |
33 | \r | |
34 | //\r | |
35 | // Driver Binding Externs\r | |
36 | //\r | |
37 | extern EFI_DRIVER_BINDING_PROTOCOL gSerialControllerDriver;\r | |
38 | extern EFI_COMPONENT_NAME_PROTOCOL gPciSioSerialComponentName;\r | |
39 | extern EFI_COMPONENT_NAME2_PROTOCOL gPciSioSerialComponentName2;\r | |
40 | \r | |
41 | #define SIO_SERIAL_PORT_NAME L"SIO Serial Port #%d"\r | |
42 | #define PCI_SERIAL_PORT_NAME L"PCI Serial Port #%d"\r | |
43 | #define SERIAL_PORT_NAME_LEN (sizeof (SIO_SERIAL_PORT_NAME) / sizeof (CHAR16) + MAXIMUM_VALUE_CHARACTERS)\r | |
44 | \r | |
45 | //\r | |
46 | // Internal Data Structures\r | |
47 | //\r | |
48 | #define TIMEOUT_STALL_INTERVAL 10\r | |
49 | \r | |
50 | #pragma pack(1)\r | |
51 | ///\r | |
52 | /// PcdPciSerialParameters contains zero or more instances of the below structure.\r | |
53 | /// If a PCI device contains multiple UARTs, PcdPciSerialParameters needs to contain\r | |
54 | /// two instances of the below structure, with the VendorId and DeviceId equals to the\r | |
55 | /// device ID and vendor ID of the device. If the PCI device uses the first two BARs\r | |
56 | /// to support multiple UARTs, BarIndex of first instance equals to 0 and BarIndex of\r | |
57 | /// second one equals to 1; if the PCI device uses the first BAR to support multiple\r | |
58 | /// UARTs, BarIndex of both instance equals to 0 and Offset of first instance equals\r | |
59 | /// to 0 while Offset of second one equals to some value bigger or equal to 8.\r | |
60 | /// For certain UART whose register needs to be accessed in DWORD aligned address,\r | |
61 | /// RegisterStride equals to 4.\r | |
62 | ///\r | |
63 | typedef struct {\r | |
64 | UINT16 VendorId; ///< Vendor ID to match the PCI device. The value 0xFFFF terminates the list of entries.\r | |
65 | UINT16 DeviceId; ///< Device ID to match the PCI device\r | |
66 | UINT32 ClockRate; ///< UART clock rate. Set to 0 for default clock rate of 1843200 Hz\r | |
67 | UINT64 Offset; ///< The byte offset into to the BAR\r | |
68 | UINT8 BarIndex; ///< Which BAR to get the UART base address\r | |
69 | UINT8 RegisterStride; ///< UART register stride in bytes. Set to 0 for default register stride of 1 byte.\r | |
70 | UINT16 ReceiveFifoDepth; ///< UART receive FIFO depth in bytes. Set to 0 for a default FIFO depth of 16 bytes.\r | |
71 | UINT16 TransmitFifoDepth; ///< UART transmit FIFO depth in bytes. Set to 0 for a default FIFO depth of 16 bytes.\r | |
72 | UINT8 Reserved[2];\r | |
73 | } PCI_SERIAL_PARAMETER;\r | |
74 | #pragma pack()\r | |
75 | \r | |
76 | #define SERIAL_MAX_FIFO_SIZE 17 ///< Actual FIFO size is 16. FIFO based on circular wastes one unit.\r | |
77 | typedef struct {\r | |
78 | UINT16 Head; ///< Head pointer of the FIFO. Empty when (Head == Tail).\r | |
79 | UINT16 Tail; ///< Tail pointer of the FIFO. Full when ((Tail + 1) % SERIAL_MAX_FIFO_SIZE == Head).\r | |
80 | UINT8 Data[SERIAL_MAX_FIFO_SIZE]; ///< Store the FIFO data.\r | |
81 | } SERIAL_DEV_FIFO;\r | |
82 | \r | |
83 | typedef union {\r | |
84 | EFI_PCI_IO_PROTOCOL *PciIo;\r | |
85 | EFI_SIO_PROTOCOL *Sio;\r | |
86 | } PARENT_IO_PROTOCOL_PTR;\r | |
87 | \r | |
88 | typedef struct {\r | |
89 | EFI_PCI_IO_PROTOCOL *PciIo; // Pointer to parent PciIo instance.\r | |
90 | UINTN ChildCount; // Count of child SerialIo instance.\r | |
91 | UINT64 PciAttributes; // Original PCI attributes.\r | |
92 | } PCI_DEVICE_INFO;\r | |
93 | \r | |
94 | typedef struct {\r | |
95 | UINT32 Signature;\r | |
96 | EFI_HANDLE Handle;\r | |
97 | EFI_SERIAL_IO_PROTOCOL SerialIo;\r | |
98 | EFI_SERIAL_IO_MODE SerialMode;\r | |
99 | EFI_DEVICE_PATH_PROTOCOL *DevicePath;\r | |
100 | \r | |
101 | EFI_DEVICE_PATH_PROTOCOL *ParentDevicePath;\r | |
102 | UART_DEVICE_PATH UartDevicePath;\r | |
103 | \r | |
104 | EFI_PHYSICAL_ADDRESS BaseAddress; ///< UART base address\r | |
105 | BOOLEAN MmioAccess; ///< TRUE for MMIO, FALSE for IO\r | |
106 | UINT8 RegisterStride; ///< UART Register Stride\r | |
107 | UINT32 ClockRate; ///< UART clock rate\r | |
108 | \r | |
109 | UINT16 ReceiveFifoDepth; ///< UART receive FIFO depth in bytes.\r | |
110 | SERIAL_DEV_FIFO Receive; ///< The FIFO used to store received data\r | |
111 | \r | |
112 | UINT16 TransmitFifoDepth; ///< UART transmit FIFO depth in bytes.\r | |
113 | SERIAL_DEV_FIFO Transmit; ///< The FIFO used to store to-transmit data\r | |
114 | \r | |
115 | BOOLEAN SoftwareLoopbackEnable;\r | |
116 | BOOLEAN HardwareFlowControl;\r | |
117 | EFI_UNICODE_STRING_TABLE *ControllerNameTable;\r | |
118 | BOOLEAN ContainsControllerNode; ///< TRUE if the device produced contains Controller node\r | |
119 | UINT32 Instance;\r | |
120 | PCI_DEVICE_INFO *PciDeviceInfo;\r | |
121 | } SERIAL_DEV;\r | |
122 | \r | |
123 | #define SERIAL_DEV_SIGNATURE SIGNATURE_32 ('s', 'e', 'r', 'd')\r | |
124 | #define SERIAL_DEV_FROM_THIS(a) CR (a, SERIAL_DEV, SerialIo, SERIAL_DEV_SIGNATURE)\r | |
125 | \r | |
126 | //\r | |
127 | // Serial Driver Defaults\r | |
128 | //\r | |
129 | #define SERIAL_PORT_DEFAULT_TIMEOUT 1000000\r | |
130 | #define SERIAL_PORT_SUPPORT_CONTROL_MASK (EFI_SERIAL_CLEAR_TO_SEND | \\r | |
131 | EFI_SERIAL_DATA_SET_READY | \\r | |
132 | EFI_SERIAL_RING_INDICATE | \\r | |
133 | EFI_SERIAL_CARRIER_DETECT | \\r | |
134 | EFI_SERIAL_REQUEST_TO_SEND | \\r | |
135 | EFI_SERIAL_DATA_TERMINAL_READY | \\r | |
136 | EFI_SERIAL_HARDWARE_LOOPBACK_ENABLE | \\r | |
137 | EFI_SERIAL_SOFTWARE_LOOPBACK_ENABLE | \\r | |
138 | EFI_SERIAL_HARDWARE_FLOW_CONTROL_ENABLE | \\r | |
139 | EFI_SERIAL_OUTPUT_BUFFER_EMPTY | \\r | |
140 | EFI_SERIAL_INPUT_BUFFER_EMPTY)\r | |
141 | \r | |
142 | #define SERIAL_PORT_MIN_TIMEOUT 1 // 1 uS\r | |
143 | #define SERIAL_PORT_MAX_TIMEOUT 100000000 // 100 seconds\r | |
144 | //\r | |
145 | // UART Registers\r | |
146 | //\r | |
147 | #define SERIAL_REGISTER_THR 0 ///< WO Transmit Holding Register\r | |
148 | #define SERIAL_REGISTER_RBR 0 ///< RO Receive Buffer Register\r | |
149 | #define SERIAL_REGISTER_DLL 0 ///< R/W Divisor Latch LSB\r | |
150 | #define SERIAL_REGISTER_DLM 1 ///< R/W Divisor Latch MSB\r | |
151 | #define SERIAL_REGISTER_IER 1 ///< R/W Interrupt Enable Register\r | |
152 | #define SERIAL_REGISTER_IIR 2 ///< RO Interrupt Identification Register\r | |
153 | #define SERIAL_REGISTER_FCR 2 ///< WO FIFO Cotrol Register\r | |
154 | #define SERIAL_REGISTER_LCR 3 ///< R/W Line Control Register\r | |
155 | #define SERIAL_REGISTER_MCR 4 ///< R/W Modem Control Register\r | |
156 | #define SERIAL_REGISTER_LSR 5 ///< R/W Line Status Register\r | |
157 | #define SERIAL_REGISTER_MSR 6 ///< R/W Modem Status Register\r | |
158 | #define SERIAL_REGISTER_SCR 7 ///< R/W Scratch Pad Register\r | |
159 | #pragma pack(1)\r | |
160 | \r | |
161 | ///\r | |
162 | /// Interrupt Enable Register\r | |
163 | ///\r | |
164 | typedef union {\r | |
165 | struct {\r | |
166 | UINT8 Ravie : 1; ///< Receiver Data Available Interrupt Enable\r | |
167 | UINT8 Theie : 1; ///< Transmistter Holding Register Empty Interrupt Enable\r | |
168 | UINT8 Rie : 1; ///< Receiver Interrupt Enable\r | |
169 | UINT8 Mie : 1; ///< Modem Interrupt Enable\r | |
170 | UINT8 Reserved : 4;\r | |
171 | } Bits;\r | |
172 | UINT8 Data;\r | |
173 | } SERIAL_PORT_IER;\r | |
174 | \r | |
175 | ///\r | |
176 | /// FIFO Control Register\r | |
177 | ///\r | |
178 | typedef union {\r | |
179 | struct {\r | |
180 | UINT8 TrFIFOE : 1; ///< Transmit and Receive FIFO Enable\r | |
181 | UINT8 ResetRF : 1; ///< Reset Reciever FIFO\r | |
182 | UINT8 ResetTF : 1; ///< Reset Transmistter FIFO\r | |
183 | UINT8 Dms : 1; ///< DMA Mode Select\r | |
184 | UINT8 Reserved : 1;\r | |
185 | UINT8 TrFIFO64 : 1; ///< Enable 64 byte FIFO\r | |
186 | UINT8 Rtb : 2; ///< Receive Trigger Bits\r | |
187 | } Bits;\r | |
188 | UINT8 Data;\r | |
189 | } SERIAL_PORT_FCR;\r | |
190 | \r | |
191 | ///\r | |
192 | /// Line Control Register\r | |
193 | ///\r | |
194 | typedef union {\r | |
195 | struct {\r | |
196 | UINT8 SerialDB : 2; ///< Number of Serial Data Bits\r | |
197 | UINT8 StopB : 1; ///< Number of Stop Bits\r | |
198 | UINT8 ParEn : 1; ///< Parity Enable\r | |
199 | UINT8 EvenPar : 1; ///< Even Parity Select\r | |
200 | UINT8 SticPar : 1; ///< Sticky Parity\r | |
201 | UINT8 BrCon : 1; ///< Break Control\r | |
202 | UINT8 DLab : 1; ///< Divisor Latch Access Bit\r | |
203 | } Bits;\r | |
204 | UINT8 Data;\r | |
205 | } SERIAL_PORT_LCR;\r | |
206 | \r | |
207 | ///\r | |
208 | /// Modem Control Register\r | |
209 | ///\r | |
210 | typedef union {\r | |
211 | struct {\r | |
212 | UINT8 DtrC : 1; ///< Data Terminal Ready Control\r | |
213 | UINT8 Rts : 1; ///< Request To Send Control\r | |
214 | UINT8 Out1 : 1; ///< Output1\r | |
215 | UINT8 Out2 : 1; ///< Output2, used to disable interrupt\r | |
216 | UINT8 Lme : 1; ///< Loopback Mode Enable\r | |
217 | UINT8 Reserved : 3;\r | |
218 | } Bits;\r | |
219 | UINT8 Data;\r | |
220 | } SERIAL_PORT_MCR;\r | |
221 | \r | |
222 | ///\r | |
223 | /// Line Status Register\r | |
224 | ///\r | |
225 | typedef union {\r | |
226 | struct {\r | |
227 | UINT8 Dr : 1; ///< Receiver Data Ready Status\r | |
228 | UINT8 Oe : 1; ///< Overrun Error Status\r | |
229 | UINT8 Pe : 1; ///< Parity Error Status\r | |
230 | UINT8 Fe : 1; ///< Framing Error Status\r | |
231 | UINT8 Bi : 1; ///< Break Interrupt Status\r | |
232 | UINT8 Thre : 1; ///< Transmistter Holding Register Status\r | |
233 | UINT8 Temt : 1; ///< Transmitter Empty Status\r | |
234 | UINT8 FIFOe : 1; ///< FIFO Error Status\r | |
235 | } Bits;\r | |
236 | UINT8 Data;\r | |
237 | } SERIAL_PORT_LSR;\r | |
238 | \r | |
239 | ///\r | |
240 | /// Modem Status Register\r | |
241 | ///\r | |
242 | typedef union {\r | |
243 | struct {\r | |
244 | UINT8 DeltaCTS : 1; ///< Delta Clear To Send Status\r | |
245 | UINT8 DeltaDSR : 1; ///< Delta Data Set Ready Status\r | |
246 | UINT8 TrailingEdgeRI : 1; ///< Trailing Edge of Ring Indicator Status\r | |
247 | UINT8 DeltaDCD : 1; ///< Delta Data Carrier Detect Status\r | |
248 | UINT8 Cts : 1; ///< Clear To Send Status\r | |
249 | UINT8 Dsr : 1; ///< Data Set Ready Status\r | |
250 | UINT8 Ri : 1; ///< Ring Indicator Status\r | |
251 | UINT8 Dcd : 1; ///< Data Carrier Detect Status\r | |
252 | } Bits;\r | |
253 | UINT8 Data;\r | |
254 | } SERIAL_PORT_MSR;\r | |
255 | \r | |
256 | #pragma pack()\r | |
257 | //\r | |
258 | // Define serial register I/O macros\r | |
259 | //\r | |
260 | #define READ_RBR(S) SerialReadRegister (S, SERIAL_REGISTER_RBR)\r | |
261 | #define READ_DLL(S) SerialReadRegister (S, SERIAL_REGISTER_DLL)\r | |
262 | #define READ_DLM(S) SerialReadRegister (S, SERIAL_REGISTER_DLM)\r | |
263 | #define READ_IER(S) SerialReadRegister (S, SERIAL_REGISTER_IER)\r | |
264 | #define READ_IIR(S) SerialReadRegister (S, SERIAL_REGISTER_IIR)\r | |
265 | #define READ_LCR(S) SerialReadRegister (S, SERIAL_REGISTER_LCR)\r | |
266 | #define READ_MCR(S) SerialReadRegister (S, SERIAL_REGISTER_MCR)\r | |
267 | #define READ_LSR(S) SerialReadRegister (S, SERIAL_REGISTER_LSR)\r | |
268 | #define READ_MSR(S) SerialReadRegister (S, SERIAL_REGISTER_MSR)\r | |
269 | #define READ_SCR(S) SerialReadRegister (S, SERIAL_REGISTER_SCR)\r | |
270 | \r | |
271 | #define WRITE_THR(S, D) SerialWriteRegister (S, SERIAL_REGISTER_THR, D)\r | |
272 | #define WRITE_DLL(S, D) SerialWriteRegister (S, SERIAL_REGISTER_DLL, D)\r | |
273 | #define WRITE_DLM(S, D) SerialWriteRegister (S, SERIAL_REGISTER_DLM, D)\r | |
274 | #define WRITE_IER(S, D) SerialWriteRegister (S, SERIAL_REGISTER_IER, D)\r | |
275 | #define WRITE_FCR(S, D) SerialWriteRegister (S, SERIAL_REGISTER_FCR, D)\r | |
276 | #define WRITE_LCR(S, D) SerialWriteRegister (S, SERIAL_REGISTER_LCR, D)\r | |
277 | #define WRITE_MCR(S, D) SerialWriteRegister (S, SERIAL_REGISTER_MCR, D)\r | |
278 | #define WRITE_LSR(S, D) SerialWriteRegister (S, SERIAL_REGISTER_LSR, D)\r | |
279 | #define WRITE_MSR(S, D) SerialWriteRegister (S, SERIAL_REGISTER_MSR, D)\r | |
280 | #define WRITE_SCR(S, D) SerialWriteRegister (S, SERIAL_REGISTER_SCR, D)\r | |
281 | \r | |
282 | //\r | |
283 | // Prototypes\r | |
284 | // Driver model protocol interface\r | |
285 | //\r | |
286 | /**\r | |
287 | Check to see if this driver supports the given controller\r | |
288 | \r | |
289 | @param This A pointer to the EFI_DRIVER_BINDING_PROTOCOL instance.\r | |
290 | @param Controller The handle of the controller to test.\r | |
291 | @param RemainingDevicePath A pointer to the remaining portion of a device path.\r | |
292 | \r | |
293 | @return EFI_SUCCESS This driver can support the given controller\r | |
294 | \r | |
295 | **/\r | |
296 | EFI_STATUS\r | |
297 | EFIAPI\r | |
298 | SerialControllerDriverSupported (\r | |
299 | IN EFI_DRIVER_BINDING_PROTOCOL *This,\r | |
300 | IN EFI_HANDLE Controller,\r | |
301 | IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath\r | |
302 | );\r | |
303 | \r | |
304 | /**\r | |
305 | Start to management the controller passed in\r | |
306 | \r | |
307 | @param This A pointer to the EFI_DRIVER_BINDING_PROTOCOL instance.\r | |
308 | @param Controller The handle of the controller to test.\r | |
309 | @param RemainingDevicePath A pointer to the remaining portion of a device path.\r | |
310 | \r | |
311 | @return EFI_SUCCESS Driver is started successfully\r | |
312 | **/\r | |
313 | EFI_STATUS\r | |
314 | EFIAPI\r | |
315 | SerialControllerDriverStart (\r | |
316 | IN EFI_DRIVER_BINDING_PROTOCOL *This,\r | |
317 | IN EFI_HANDLE Controller,\r | |
318 | IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath\r | |
319 | );\r | |
320 | \r | |
321 | /**\r | |
322 | Disconnect this driver with the controller, uninstall related protocol instance\r | |
323 | \r | |
324 | @param This A pointer to the EFI_DRIVER_BINDING_PROTOCOL instance.\r | |
325 | @param Controller The handle of the controller to test.\r | |
326 | @param NumberOfChildren Number of child device.\r | |
327 | @param ChildHandleBuffer A pointer to the remaining portion of a device path.\r | |
328 | \r | |
329 | @retval EFI_SUCCESS Operation successfully\r | |
330 | @retval EFI_DEVICE_ERROR Cannot stop the driver successfully\r | |
331 | \r | |
332 | **/\r | |
333 | EFI_STATUS\r | |
334 | EFIAPI\r | |
335 | SerialControllerDriverStop (\r | |
336 | IN EFI_DRIVER_BINDING_PROTOCOL *This,\r | |
337 | IN EFI_HANDLE Controller,\r | |
338 | IN UINTN NumberOfChildren,\r | |
339 | IN EFI_HANDLE *ChildHandleBuffer\r | |
340 | );\r | |
341 | \r | |
342 | //\r | |
343 | // Serial I/O Protocol Interface\r | |
344 | //\r | |
345 | /**\r | |
346 | Reset serial device.\r | |
347 | \r | |
348 | @param This Pointer to EFI_SERIAL_IO_PROTOCOL\r | |
349 | \r | |
350 | @retval EFI_SUCCESS Reset successfully\r | |
351 | @retval EFI_DEVICE_ERROR Failed to reset\r | |
352 | \r | |
353 | **/\r | |
354 | EFI_STATUS\r | |
355 | EFIAPI\r | |
356 | SerialReset (\r | |
357 | IN EFI_SERIAL_IO_PROTOCOL *This\r | |
358 | );\r | |
359 | \r | |
360 | /**\r | |
361 | Set new attributes to a serial device.\r | |
362 | \r | |
363 | @param This Pointer to EFI_SERIAL_IO_PROTOCOL\r | |
364 | @param BaudRate The baudrate of the serial device\r | |
365 | @param ReceiveFifoDepth The depth of receive FIFO buffer\r | |
366 | @param Timeout The request timeout for a single char\r | |
367 | @param Parity The type of parity used in serial device\r | |
368 | @param DataBits Number of databits used in serial device\r | |
369 | @param StopBits Number of stopbits used in serial device\r | |
370 | \r | |
371 | @retval EFI_SUCCESS The new attributes were set\r | |
372 | @retval EFI_INVALID_PARAMETERS One or more attributes have an unsupported value\r | |
373 | @retval EFI_UNSUPPORTED Data Bits can not set to 5 or 6\r | |
374 | @retval EFI_DEVICE_ERROR The serial device is not functioning correctly (no return)\r | |
375 | \r | |
376 | **/\r | |
377 | EFI_STATUS\r | |
378 | EFIAPI\r | |
379 | SerialSetAttributes (\r | |
380 | IN EFI_SERIAL_IO_PROTOCOL *This,\r | |
381 | IN UINT64 BaudRate,\r | |
382 | IN UINT32 ReceiveFifoDepth,\r | |
383 | IN UINT32 Timeout,\r | |
384 | IN EFI_PARITY_TYPE Parity,\r | |
385 | IN UINT8 DataBits,\r | |
386 | IN EFI_STOP_BITS_TYPE StopBits\r | |
387 | );\r | |
388 | \r | |
389 | /**\r | |
390 | Set Control Bits.\r | |
391 | \r | |
392 | @param This Pointer to EFI_SERIAL_IO_PROTOCOL\r | |
393 | @param Control Control bits that can be settable\r | |
394 | \r | |
395 | @retval EFI_SUCCESS New Control bits were set successfully\r | |
396 | @retval EFI_UNSUPPORTED The Control bits wanted to set are not supported\r | |
397 | \r | |
398 | **/\r | |
399 | EFI_STATUS\r | |
400 | EFIAPI\r | |
401 | SerialSetControl (\r | |
402 | IN EFI_SERIAL_IO_PROTOCOL *This,\r | |
403 | IN UINT32 Control\r | |
404 | );\r | |
405 | \r | |
406 | /**\r | |
407 | Get ControlBits.\r | |
408 | \r | |
409 | @param This Pointer to EFI_SERIAL_IO_PROTOCOL\r | |
410 | @param Control Control signals of the serial device\r | |
411 | \r | |
412 | @retval EFI_SUCCESS Get Control signals successfully\r | |
413 | \r | |
414 | **/\r | |
415 | EFI_STATUS\r | |
416 | EFIAPI\r | |
417 | SerialGetControl (\r | |
418 | IN EFI_SERIAL_IO_PROTOCOL *This,\r | |
419 | OUT UINT32 *Control\r | |
420 | );\r | |
421 | \r | |
422 | /**\r | |
423 | Write the specified number of bytes to serial device.\r | |
424 | \r | |
425 | @param This Pointer to EFI_SERIAL_IO_PROTOCOL\r | |
426 | @param BufferSize On input the size of Buffer, on output the amount of\r | |
427 | data actually written\r | |
428 | @param Buffer The buffer of data to write\r | |
429 | \r | |
430 | @retval EFI_SUCCESS The data were written successfully\r | |
431 | @retval EFI_DEVICE_ERROR The device reported an error\r | |
432 | @retval EFI_TIMEOUT The write operation was stopped due to timeout\r | |
433 | \r | |
434 | **/\r | |
435 | EFI_STATUS\r | |
436 | EFIAPI\r | |
437 | SerialWrite (\r | |
438 | IN EFI_SERIAL_IO_PROTOCOL *This,\r | |
439 | IN OUT UINTN *BufferSize,\r | |
440 | IN VOID *Buffer\r | |
441 | );\r | |
442 | \r | |
443 | /**\r | |
444 | Read the specified number of bytes from serial device.\r | |
445 | \r | |
446 | @param This Pointer to EFI_SERIAL_IO_PROTOCOL\r | |
447 | @param BufferSize On input the size of Buffer, on output the amount of\r | |
448 | data returned in buffer\r | |
449 | @param Buffer The buffer to return the data into\r | |
450 | \r | |
451 | @retval EFI_SUCCESS The data were read successfully\r | |
452 | @retval EFI_DEVICE_ERROR The device reported an error\r | |
453 | @retval EFI_TIMEOUT The read operation was stopped due to timeout\r | |
454 | \r | |
455 | **/\r | |
456 | EFI_STATUS\r | |
457 | EFIAPI\r | |
458 | SerialRead (\r | |
459 | IN EFI_SERIAL_IO_PROTOCOL *This,\r | |
460 | IN OUT UINTN *BufferSize,\r | |
461 | OUT VOID *Buffer\r | |
462 | );\r | |
463 | \r | |
464 | //\r | |
465 | // Internal Functions\r | |
466 | //\r | |
467 | /**\r | |
468 | Use scratchpad register to test if this serial port is present.\r | |
469 | \r | |
470 | @param SerialDevice Pointer to serial device structure\r | |
471 | \r | |
472 | @return if this serial port is present\r | |
473 | **/\r | |
474 | BOOLEAN\r | |
475 | SerialPresent (\r | |
476 | IN SERIAL_DEV *SerialDevice\r | |
477 | );\r | |
478 | \r | |
479 | /**\r | |
480 | Detect whether specific FIFO is full or not.\r | |
481 | \r | |
482 | @param Fifo A pointer to the Data Structure SERIAL_DEV_FIFO\r | |
483 | \r | |
484 | @return whether specific FIFO is full or not\r | |
485 | \r | |
486 | **/\r | |
487 | BOOLEAN\r | |
488 | SerialFifoFull (\r | |
489 | IN SERIAL_DEV_FIFO *Fifo\r | |
490 | );\r | |
491 | \r | |
492 | /**\r | |
493 | Detect whether specific FIFO is empty or not.\r | |
d1102dba | 494 | \r |
a59e2ede RN |
495 | @param Fifo A pointer to the Data Structure SERIAL_DEV_FIFO\r |
496 | \r | |
497 | @return whether specific FIFO is empty or not\r | |
498 | \r | |
499 | **/\r | |
500 | BOOLEAN\r | |
501 | SerialFifoEmpty (\r | |
502 | IN SERIAL_DEV_FIFO *Fifo\r | |
503 | );\r | |
504 | \r | |
505 | /**\r | |
506 | Add data to specific FIFO.\r | |
507 | \r | |
508 | @param Fifo A pointer to the Data Structure SERIAL_DEV_FIFO\r | |
509 | @param Data the data added to FIFO\r | |
510 | \r | |
511 | @retval EFI_SUCCESS Add data to specific FIFO successfully\r | |
512 | @retval EFI_OUT_OF_RESOURCE Failed to add data because FIFO is already full\r | |
513 | \r | |
514 | **/\r | |
515 | EFI_STATUS\r | |
516 | SerialFifoAdd (\r | |
517 | IN SERIAL_DEV_FIFO *Fifo,\r | |
518 | IN UINT8 Data\r | |
519 | );\r | |
520 | \r | |
521 | /**\r | |
522 | Remove data from specific FIFO.\r | |
523 | \r | |
524 | @param Fifo A pointer to the Data Structure SERIAL_DEV_FIFO\r | |
525 | @param Data the data removed from FIFO\r | |
526 | \r | |
527 | @retval EFI_SUCCESS Remove data from specific FIFO successfully\r | |
528 | @retval EFI_OUT_OF_RESOURCE Failed to remove data because FIFO is empty\r | |
529 | \r | |
530 | **/\r | |
531 | EFI_STATUS\r | |
532 | SerialFifoRemove (\r | |
533 | IN SERIAL_DEV_FIFO *Fifo,\r | |
534 | OUT UINT8 *Data\r | |
535 | );\r | |
536 | \r | |
537 | /**\r | |
2048c585 | 538 | Reads and writes all available data.\r |
a59e2ede RN |
539 | \r |
540 | @param SerialDevice The device to flush\r | |
541 | \r | |
542 | @retval EFI_SUCCESS Data was read/written successfully.\r | |
543 | @retval EFI_OUT_OF_RESOURCE Failed because software receive FIFO is full. Note, when\r | |
544 | this happens, pending writes are not done.\r | |
545 | \r | |
546 | **/\r | |
547 | EFI_STATUS\r | |
548 | SerialReceiveTransmit (\r | |
549 | IN SERIAL_DEV *SerialDevice\r | |
550 | );\r | |
551 | \r | |
552 | /**\r | |
553 | Read serial port.\r | |
554 | \r | |
555 | @param SerialDev Pointer to serial device\r | |
556 | @param Offset Offset in register group\r | |
557 | \r | |
558 | @return Data read from serial port\r | |
559 | **/\r | |
560 | UINT8\r | |
561 | SerialReadRegister (\r | |
562 | IN SERIAL_DEV *SerialDev,\r | |
563 | IN UINT32 Offset\r | |
564 | );\r | |
565 | \r | |
566 | /**\r | |
567 | Write serial port.\r | |
568 | \r | |
569 | @param SerialDev Pointer to serial device\r | |
570 | @param Offset Offset in register group\r | |
571 | @param Data data which is to be written to some serial port register\r | |
572 | **/\r | |
573 | VOID\r | |
574 | SerialWriteRegister (\r | |
575 | IN SERIAL_DEV *SerialDev,\r | |
576 | IN UINT32 Offset,\r | |
577 | IN UINT8 Data\r | |
578 | );\r | |
579 | \r | |
580 | \r | |
581 | //\r | |
582 | // EFI Component Name Functions\r | |
583 | //\r | |
584 | /**\r | |
585 | Retrieves a Unicode string that is the user readable name of the driver.\r | |
586 | \r | |
587 | This function retrieves the user readable name of a driver in the form of a\r | |
588 | Unicode string. If the driver specified by This has a user readable name in\r | |
589 | the language specified by Language, then a pointer to the driver name is\r | |
590 | returned in DriverName, and EFI_SUCCESS is returned. If the driver specified\r | |
591 | by This does not support the language specified by Language,\r | |
592 | then EFI_UNSUPPORTED is returned.\r | |
593 | \r | |
594 | @param This[in] A pointer to the EFI_COMPONENT_NAME2_PROTOCOL or\r | |
595 | EFI_COMPONENT_NAME_PROTOCOL instance.\r | |
596 | \r | |
597 | @param Language[in] A pointer to a Null-terminated ASCII string\r | |
598 | array indicating the language. This is the\r | |
599 | language of the driver name that the caller is\r | |
600 | requesting, and it must match one of the\r | |
601 | languages specified in SupportedLanguages. The\r | |
602 | number of languages supported by a driver is up\r | |
603 | to the driver writer. Language is specified\r | |
604 | in RFC 4646 or ISO 639-2 language code format.\r | |
605 | \r | |
606 | @param DriverName[out] A pointer to the Unicode string to return.\r | |
607 | This Unicode string is the name of the\r | |
608 | driver specified by This in the language\r | |
609 | specified by Language.\r | |
610 | \r | |
611 | @retval EFI_SUCCESS The Unicode string for the Driver specified by\r | |
612 | This and the language specified by Language was\r | |
613 | returned in DriverName.\r | |
614 | \r | |
615 | @retval EFI_INVALID_PARAMETER Language is NULL.\r | |
616 | \r | |
617 | @retval EFI_INVALID_PARAMETER DriverName is NULL.\r | |
618 | \r | |
619 | @retval EFI_UNSUPPORTED The driver specified by This does not support\r | |
620 | the language specified by Language.\r | |
621 | \r | |
622 | **/\r | |
623 | EFI_STATUS\r | |
624 | EFIAPI\r | |
625 | SerialComponentNameGetDriverName (\r | |
626 | IN EFI_COMPONENT_NAME_PROTOCOL *This,\r | |
627 | IN CHAR8 *Language,\r | |
628 | OUT CHAR16 **DriverName\r | |
629 | );\r | |
630 | \r | |
631 | \r | |
632 | /**\r | |
633 | Retrieves a Unicode string that is the user readable name of the controller\r | |
634 | that is being managed by a driver.\r | |
635 | \r | |
636 | This function retrieves the user readable name of the controller specified by\r | |
637 | ControllerHandle and ChildHandle in the form of a Unicode string. If the\r | |
638 | driver specified by This has a user readable name in the language specified by\r | |
639 | Language, then a pointer to the controller name is returned in ControllerName,\r | |
640 | and EFI_SUCCESS is returned. If the driver specified by This is not currently\r | |
641 | managing the controller specified by ControllerHandle and ChildHandle,\r | |
642 | then EFI_UNSUPPORTED is returned. If the driver specified by This does not\r | |
643 | support the language specified by Language, then EFI_UNSUPPORTED is returned.\r | |
644 | \r | |
645 | @param This[in] A pointer to the EFI_COMPONENT_NAME2_PROTOCOL or\r | |
646 | EFI_COMPONENT_NAME_PROTOCOL instance.\r | |
647 | \r | |
648 | @param ControllerHandle[in] The handle of a controller that the driver\r | |
649 | specified by This is managing. This handle\r | |
650 | specifies the controller whose name is to be\r | |
651 | returned.\r | |
652 | \r | |
653 | @param ChildHandle[in] The handle of the child controller to retrieve\r | |
654 | the name of. This is an optional parameter that\r | |
655 | may be NULL. It will be NULL for device\r | |
656 | drivers. It will also be NULL for a bus drivers\r | |
657 | that wish to retrieve the name of the bus\r | |
658 | controller. It will not be NULL for a bus\r | |
659 | driver that wishes to retrieve the name of a\r | |
660 | child controller.\r | |
661 | \r | |
662 | @param Language[in] A pointer to a Null-terminated ASCII string\r | |
663 | array indicating the language. This is the\r | |
664 | language of the driver name that the caller is\r | |
665 | requesting, and it must match one of the\r | |
666 | languages specified in SupportedLanguages. The\r | |
667 | number of languages supported by a driver is up\r | |
668 | to the driver writer. Language is specified in\r | |
669 | RFC 4646 or ISO 639-2 language code format.\r | |
670 | \r | |
671 | @param ControllerName[out] A pointer to the Unicode string to return.\r | |
672 | This Unicode string is the name of the\r | |
673 | controller specified by ControllerHandle and\r | |
674 | ChildHandle in the language specified by\r | |
675 | Language from the point of view of the driver\r | |
676 | specified by This.\r | |
677 | \r | |
678 | @retval EFI_SUCCESS The Unicode string for the user readable name in\r | |
679 | the language specified by Language for the\r | |
680 | driver specified by This was returned in\r | |
681 | DriverName.\r | |
682 | \r | |
683 | @retval EFI_INVALID_PARAMETER ControllerHandle is NULL.\r | |
684 | \r | |
685 | @retval EFI_INVALID_PARAMETER ChildHandle is not NULL and it is not a valid\r | |
686 | EFI_HANDLE.\r | |
687 | \r | |
688 | @retval EFI_INVALID_PARAMETER Language is NULL.\r | |
689 | \r | |
690 | @retval EFI_INVALID_PARAMETER ControllerName is NULL.\r | |
691 | \r | |
692 | @retval EFI_UNSUPPORTED The driver specified by This is not currently\r | |
693 | managing the controller specified by\r | |
694 | ControllerHandle and ChildHandle.\r | |
695 | \r | |
696 | @retval EFI_UNSUPPORTED The driver specified by This does not support\r | |
697 | the language specified by Language.\r | |
698 | \r | |
699 | **/\r | |
700 | EFI_STATUS\r | |
701 | EFIAPI\r | |
702 | SerialComponentNameGetControllerName (\r | |
703 | IN EFI_COMPONENT_NAME_PROTOCOL *This,\r | |
704 | IN EFI_HANDLE ControllerHandle,\r | |
705 | IN EFI_HANDLE ChildHandle OPTIONAL,\r | |
706 | IN CHAR8 *Language,\r | |
707 | OUT CHAR16 **ControllerName\r | |
708 | );\r | |
709 | \r | |
710 | /**\r | |
711 | Add the component name for the serial io device\r | |
712 | \r | |
713 | @param SerialDevice A pointer to the SERIAL_DEV instance.\r | |
714 | @param Uid Unique ID for the serial device.\r | |
715 | **/\r | |
716 | VOID\r | |
717 | AddName (\r | |
718 | IN SERIAL_DEV *SerialDevice,\r | |
719 | IN UINT32 Uid\r | |
720 | );\r | |
721 | \r | |
722 | /**\r | |
723 | Checks whether the UART parameters are valid and computes the Divisor.\r | |
724 | \r | |
725 | @param ClockRate The clock rate of the serial device used to verify\r | |
726 | the BaudRate. Do not verify the BaudRate if it's 0.\r | |
727 | @param BaudRate The requested baudrate of the serial device.\r | |
728 | @param DataBits Number of databits used in serial device.\r | |
729 | @param Parity The type of parity used in serial device.\r | |
730 | @param StopBits Number of stopbits used in serial device.\r | |
731 | @param Divisor Return the divisor if ClockRate is not 0.\r | |
732 | @param ActualBaudRate Return the actual supported baudrate without\r | |
733 | exceeding BaudRate. NULL means baudrate degradation\r | |
734 | is not allowed.\r | |
735 | If the requested BaudRate is not supported, the routine\r | |
736 | returns TRUE and the Actual Baud Rate when ActualBaudRate\r | |
737 | is not NULL, returns FALSE when ActualBaudRate is NULL.\r | |
738 | \r | |
739 | @retval TRUE The UART parameters are valid.\r | |
740 | @retval FALSE The UART parameters are not valid.\r | |
741 | **/\r | |
742 | BOOLEAN\r | |
743 | VerifyUartParameters (\r | |
744 | IN UINT32 ClockRate,\r | |
745 | IN UINT64 BaudRate,\r | |
746 | IN UINT8 DataBits,\r | |
747 | IN EFI_PARITY_TYPE Parity,\r | |
748 | IN EFI_STOP_BITS_TYPE StopBits,\r | |
749 | OUT UINT64 *Divisor,\r | |
750 | OUT UINT64 *ActualBaudRate\r | |
751 | );\r | |
752 | \r | |
753 | /**\r | |
754 | Skip the optional Controller device path node and return the\r | |
755 | pointer to the next device path node.\r | |
756 | \r | |
757 | @param DevicePath Pointer to the device path.\r | |
758 | @param ContainsControllerNode Returns TRUE if the Controller device path exists.\r | |
759 | @param ControllerNumber Returns the Controller Number if Controller device path exists.\r | |
760 | \r | |
761 | @return Pointer to the next device path node.\r | |
762 | **/\r | |
763 | UART_DEVICE_PATH *\r | |
764 | SkipControllerDevicePathNode (\r | |
765 | EFI_DEVICE_PATH_PROTOCOL *DevicePath,\r | |
766 | BOOLEAN *ContainsControllerNode,\r | |
767 | UINT32 *ControllerNumber\r | |
768 | );\r | |
769 | \r | |
770 | /**\r | |
771 | Check the device path node whether it's the Flow Control node or not.\r | |
772 | \r | |
773 | @param[in] FlowControl The device path node to be checked.\r | |
d1102dba | 774 | \r |
a59e2ede RN |
775 | @retval TRUE It's the Flow Control node.\r |
776 | @retval FALSE It's not.\r | |
777 | \r | |
778 | **/\r | |
779 | BOOLEAN\r | |
780 | IsUartFlowControlDevicePathNode (\r | |
781 | IN UART_FLOW_CONTROL_DEVICE_PATH *FlowControl\r | |
782 | );\r | |
783 | #endif\r |