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MdeModulePkg/SdMmcPciHcDxe: Send SEND_STATUS at lower frequency
[mirror_edk2.git] / MdeModulePkg / Bus / Pci / SdMmcPciHcDxe / EmmcDevice.c
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48555339
FT
1/** @file\r
2 This file provides some helper functions which are specific for EMMC device.\r
3\r
b5547b9c 4 Copyright (c) 2018, NVIDIA CORPORATION. All rights reserved.\r
8c983d3e 5 Copyright (c) 2015 - 2016, Intel Corporation. All rights reserved.<BR>\r
9d510e61 6 SPDX-License-Identifier: BSD-2-Clause-Patent\r
48555339
FT
7\r
8**/\r
9\r
10#include "SdMmcPciHcDxe.h"\r
11\r
12/**\r
13 Send command GO_IDLE_STATE (CMD0 with argument of 0x00000000) to the device to\r
14 make it go to Idle State.\r
15\r
16 Refer to EMMC Electrical Standard Spec 5.1 Section 6.4 for details.\r
17\r
18 @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.\r
19 @param[in] Slot The slot number of the SD card to send the command to.\r
20\r
21 @retval EFI_SUCCESS The EMMC device is reset correctly.\r
22 @retval Others The device reset fails.\r
23\r
24**/\r
25EFI_STATUS\r
26EmmcReset (\r
27 IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,\r
28 IN UINT8 Slot\r
29 )\r
30{\r
31 EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;\r
32 EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;\r
33 EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;\r
34 EFI_STATUS Status;\r
35\r
36 ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));\r
37 ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));\r
38 ZeroMem (&Packet, sizeof (Packet));\r
39\r
40 Packet.SdMmcCmdBlk = &SdMmcCmdBlk;\r
41 Packet.SdMmcStatusBlk = &SdMmcStatusBlk;\r
42 Packet.Timeout = SD_MMC_HC_GENERIC_TIMEOUT;\r
43\r
44 SdMmcCmdBlk.CommandIndex = EMMC_GO_IDLE_STATE;\r
45 SdMmcCmdBlk.CommandType = SdMmcCommandTypeBc;\r
46 SdMmcCmdBlk.ResponseType = 0;\r
47 SdMmcCmdBlk.CommandArgument = 0;\r
48\r
9252d67a
JZ
49 gBS->Stall (1000);\r
50\r
48555339
FT
51 Status = SdMmcPassThruPassThru (PassThru, Slot, &Packet, NULL);\r
52\r
53 return Status;\r
54}\r
55\r
56/**\r
57 Send command SEND_OP_COND to the EMMC device to get the data of the OCR register.\r
58\r
59 Refer to EMMC Electrical Standard Spec 5.1 Section 6.4 for details.\r
60\r
61 @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.\r
62 @param[in] Slot The slot number of the SD card to send the command to.\r
63 @param[in, out] Argument On input, the argument of SEND_OP_COND is to send to the device.\r
64 On output, the argument is the value of OCR register.\r
65\r
66 @retval EFI_SUCCESS The operation is done correctly.\r
67 @retval Others The operation fails.\r
68\r
69**/\r
70EFI_STATUS\r
71EmmcGetOcr (\r
72 IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,\r
73 IN UINT8 Slot,\r
74 IN OUT UINT32 *Argument\r
75 )\r
76{\r
77 EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;\r
78 EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;\r
79 EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;\r
80 EFI_STATUS Status;\r
81\r
82 ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));\r
83 ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));\r
84 ZeroMem (&Packet, sizeof (Packet));\r
85\r
86 Packet.SdMmcCmdBlk = &SdMmcCmdBlk;\r
87 Packet.SdMmcStatusBlk = &SdMmcStatusBlk;\r
88 Packet.Timeout = SD_MMC_HC_GENERIC_TIMEOUT;\r
89\r
90 SdMmcCmdBlk.CommandIndex = EMMC_SEND_OP_COND;\r
91 SdMmcCmdBlk.CommandType = SdMmcCommandTypeBcr;\r
92 SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR3;\r
93 SdMmcCmdBlk.CommandArgument = *Argument;\r
94\r
95 Status = SdMmcPassThruPassThru (PassThru, Slot, &Packet, NULL);\r
96 if (!EFI_ERROR (Status)) {\r
97 //\r
98 // For details, refer to SD Host Controller Simplified Spec 3.0 Table 2-12.\r
99 //\r
100 *Argument = SdMmcStatusBlk.Resp0;\r
101 }\r
102\r
103 return Status;\r
104}\r
105\r
106/**\r
107 Broadcast command ALL_SEND_CID to the bus to ask all the EMMC devices to send the\r
108 data of their CID registers.\r
109\r
110 Refer to EMMC Electrical Standard Spec 5.1 Section 6.4 for details.\r
111\r
112 @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.\r
113 @param[in] Slot The slot number of the SD card to send the command to.\r
114\r
115 @retval EFI_SUCCESS The operation is done correctly.\r
116 @retval Others The operation fails.\r
117\r
118**/\r
119EFI_STATUS\r
120EmmcGetAllCid (\r
121 IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,\r
122 IN UINT8 Slot\r
123 )\r
124{\r
125 EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;\r
126 EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;\r
127 EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;\r
128 EFI_STATUS Status;\r
129\r
130 ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));\r
131 ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));\r
132 ZeroMem (&Packet, sizeof (Packet));\r
133\r
134 Packet.SdMmcCmdBlk = &SdMmcCmdBlk;\r
135 Packet.SdMmcStatusBlk = &SdMmcStatusBlk;\r
136 Packet.Timeout = SD_MMC_HC_GENERIC_TIMEOUT;\r
137\r
138 SdMmcCmdBlk.CommandIndex = EMMC_ALL_SEND_CID;\r
139 SdMmcCmdBlk.CommandType = SdMmcCommandTypeBcr;\r
140 SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR2;\r
141 SdMmcCmdBlk.CommandArgument = 0;\r
142\r
143 Status = SdMmcPassThruPassThru (PassThru, Slot, &Packet, NULL);\r
144\r
145 return Status;\r
146}\r
147\r
148/**\r
149 Send command SET_RELATIVE_ADDR to the EMMC device to assign a Relative device\r
150 Address (RCA).\r
151\r
152 Refer to EMMC Electrical Standard Spec 5.1 Section 6.4 for details.\r
153\r
154 @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.\r
155 @param[in] Slot The slot number of the SD card to send the command to.\r
156 @param[in] Rca The relative device address to be assigned.\r
157\r
158 @retval EFI_SUCCESS The operation is done correctly.\r
159 @retval Others The operation fails.\r
160\r
161**/\r
162EFI_STATUS\r
163EmmcSetRca (\r
164 IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,\r
165 IN UINT8 Slot,\r
166 IN UINT16 Rca\r
167 )\r
168{\r
169 EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;\r
170 EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;\r
171 EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;\r
172 EFI_STATUS Status;\r
173\r
174 ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));\r
175 ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));\r
176 ZeroMem (&Packet, sizeof (Packet));\r
177\r
178 Packet.SdMmcCmdBlk = &SdMmcCmdBlk;\r
179 Packet.SdMmcStatusBlk = &SdMmcStatusBlk;\r
180 Packet.Timeout = SD_MMC_HC_GENERIC_TIMEOUT;\r
181\r
182 SdMmcCmdBlk.CommandIndex = EMMC_SET_RELATIVE_ADDR;\r
183 SdMmcCmdBlk.CommandType = SdMmcCommandTypeAc;\r
184 SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR1;\r
185 SdMmcCmdBlk.CommandArgument = (UINT32)Rca << 16;\r
186\r
187 Status = SdMmcPassThruPassThru (PassThru, Slot, &Packet, NULL);\r
188\r
189 return Status;\r
190}\r
191\r
192/**\r
193 Send command SEND_CSD to the EMMC device to get the data of the CSD register.\r
194\r
195 Refer to EMMC Electrical Standard Spec 5.1 Section 6.10.4 for details.\r
196\r
197 @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.\r
198 @param[in] Slot The slot number of the SD card to send the command to.\r
199 @param[in] Rca The relative device address of selected device.\r
200 @param[out] Csd The buffer to store the content of the CSD register.\r
201 Note the caller should ignore the lowest byte of this\r
202 buffer as the content of this byte is meaningless even\r
203 if the operation succeeds.\r
204\r
205 @retval EFI_SUCCESS The operation is done correctly.\r
206 @retval Others The operation fails.\r
207\r
208**/\r
209EFI_STATUS\r
210EmmcGetCsd (\r
211 IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,\r
212 IN UINT8 Slot,\r
213 IN UINT16 Rca,\r
214 OUT EMMC_CSD *Csd\r
215 )\r
216{\r
217 EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;\r
218 EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;\r
219 EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;\r
220 EFI_STATUS Status;\r
221\r
222 ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));\r
223 ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));\r
224 ZeroMem (&Packet, sizeof (Packet));\r
225\r
226 Packet.SdMmcCmdBlk = &SdMmcCmdBlk;\r
227 Packet.SdMmcStatusBlk = &SdMmcStatusBlk;\r
228 Packet.Timeout = SD_MMC_HC_GENERIC_TIMEOUT;\r
229\r
230 SdMmcCmdBlk.CommandIndex = EMMC_SEND_CSD;\r
231 SdMmcCmdBlk.CommandType = SdMmcCommandTypeAc;\r
232 SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR2;\r
233 SdMmcCmdBlk.CommandArgument = (UINT32)Rca << 16;\r
234\r
235 Status = SdMmcPassThruPassThru (PassThru, Slot, &Packet, NULL);\r
236 if (!EFI_ERROR (Status)) {\r
237 //\r
238 // For details, refer to SD Host Controller Simplified Spec 3.0 Table 2-12.\r
239 //\r
240 CopyMem (((UINT8*)Csd) + 1, &SdMmcStatusBlk.Resp0, sizeof (EMMC_CSD) - 1);\r
241 }\r
242\r
243 return Status;\r
244}\r
245\r
246/**\r
247 Send command SELECT_DESELECT_CARD to the EMMC device to select/deselect it.\r
248\r
249 Refer to EMMC Electrical Standard Spec 5.1 Section 6.10.4 for details.\r
250\r
251 @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.\r
252 @param[in] Slot The slot number of the SD card to send the command to.\r
253 @param[in] Rca The relative device address of selected device.\r
254\r
255 @retval EFI_SUCCESS The operation is done correctly.\r
256 @retval Others The operation fails.\r
257\r
258**/\r
259EFI_STATUS\r
260EmmcSelect (\r
261 IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,\r
262 IN UINT8 Slot,\r
263 IN UINT16 Rca\r
264 )\r
265{\r
266 EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;\r
267 EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;\r
268 EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;\r
269 EFI_STATUS Status;\r
270\r
271 ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));\r
272 ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));\r
273 ZeroMem (&Packet, sizeof (Packet));\r
274\r
275 Packet.SdMmcCmdBlk = &SdMmcCmdBlk;\r
276 Packet.SdMmcStatusBlk = &SdMmcStatusBlk;\r
277 Packet.Timeout = SD_MMC_HC_GENERIC_TIMEOUT;\r
278\r
279 SdMmcCmdBlk.CommandIndex = EMMC_SELECT_DESELECT_CARD;\r
280 SdMmcCmdBlk.CommandType = SdMmcCommandTypeAc;\r
281 SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR1;\r
282 SdMmcCmdBlk.CommandArgument = (UINT32)Rca << 16;\r
283\r
284 Status = SdMmcPassThruPassThru (PassThru, Slot, &Packet, NULL);\r
285\r
286 return Status;\r
287}\r
288\r
289/**\r
290 Send command SEND_EXT_CSD to the EMMC device to get the data of the EXT_CSD register.\r
291\r
292 Refer to EMMC Electrical Standard Spec 5.1 Section 6.10.4 for details.\r
293\r
294 @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.\r
295 @param[in] Slot The slot number of the SD card to send the command to.\r
296 @param[out] ExtCsd The buffer to store the content of the EXT_CSD register.\r
297\r
298 @retval EFI_SUCCESS The operation is done correctly.\r
299 @retval Others The operation fails.\r
300\r
301**/\r
302EFI_STATUS\r
303EmmcGetExtCsd (\r
304 IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,\r
305 IN UINT8 Slot,\r
306 OUT EMMC_EXT_CSD *ExtCsd\r
307 )\r
308{\r
309 EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;\r
310 EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;\r
311 EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;\r
312 EFI_STATUS Status;\r
313\r
314 ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));\r
315 ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));\r
316 ZeroMem (&Packet, sizeof (Packet));\r
317\r
318 Packet.SdMmcCmdBlk = &SdMmcCmdBlk;\r
319 Packet.SdMmcStatusBlk = &SdMmcStatusBlk;\r
320 Packet.Timeout = SD_MMC_HC_GENERIC_TIMEOUT;\r
321\r
322 SdMmcCmdBlk.CommandIndex = EMMC_SEND_EXT_CSD;\r
323 SdMmcCmdBlk.CommandType = SdMmcCommandTypeAdtc;\r
324 SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR1;\r
325 SdMmcCmdBlk.CommandArgument = 0x00000000;\r
326\r
327 Packet.InDataBuffer = ExtCsd;\r
328 Packet.InTransferLength = sizeof (EMMC_EXT_CSD);\r
329\r
330 Status = SdMmcPassThruPassThru (PassThru, Slot, &Packet, NULL);\r
331 return Status;\r
332}\r
333\r
334/**\r
335 Send command SWITCH to the EMMC device to switch the mode of operation of the\r
336 selected Device or modifies the EXT_CSD registers.\r
337\r
338 Refer to EMMC Electrical Standard Spec 5.1 Section 6.10.4 for details.\r
339\r
340 @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.\r
341 @param[in] Slot The slot number of the SD card to send the command to.\r
342 @param[in] Access The access mode of SWTICH command.\r
343 @param[in] Index The offset of the field to be access.\r
344 @param[in] Value The value to be set to the specified field of EXT_CSD register.\r
345 @param[in] CmdSet The value of CmdSet field of EXT_CSD register.\r
346\r
347 @retval EFI_SUCCESS The operation is done correctly.\r
348 @retval Others The operation fails.\r
349\r
350**/\r
351EFI_STATUS\r
352EmmcSwitch (\r
353 IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,\r
354 IN UINT8 Slot,\r
355 IN UINT8 Access,\r
356 IN UINT8 Index,\r
357 IN UINT8 Value,\r
358 IN UINT8 CmdSet\r
359 )\r
360{\r
361 EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;\r
362 EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;\r
363 EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;\r
364 EFI_STATUS Status;\r
365\r
366 ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));\r
367 ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));\r
368 ZeroMem (&Packet, sizeof (Packet));\r
369\r
370 Packet.SdMmcCmdBlk = &SdMmcCmdBlk;\r
371 Packet.SdMmcStatusBlk = &SdMmcStatusBlk;\r
372 Packet.Timeout = SD_MMC_HC_GENERIC_TIMEOUT;\r
373\r
374 SdMmcCmdBlk.CommandIndex = EMMC_SWITCH;\r
375 SdMmcCmdBlk.CommandType = SdMmcCommandTypeAc;\r
376 SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR1b;\r
377 SdMmcCmdBlk.CommandArgument = (Access << 24) | (Index << 16) | (Value << 8) | CmdSet;\r
378\r
379 Status = SdMmcPassThruPassThru (PassThru, Slot, &Packet, NULL);\r
380\r
381 return Status;\r
382}\r
383\r
384/**\r
385 Send command SEND_STATUS to the addressed EMMC device to get its status register.\r
386\r
387 Refer to EMMC Electrical Standard Spec 5.1 Section 6.10.4 for details.\r
388\r
389 @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.\r
390 @param[in] Slot The slot number of the SD card to send the command to.\r
391 @param[in] Rca The relative device address of addressed device.\r
392 @param[out] DevStatus The returned device status.\r
393\r
394 @retval EFI_SUCCESS The operation is done correctly.\r
395 @retval Others The operation fails.\r
396\r
397**/\r
398EFI_STATUS\r
399EmmcSendStatus (\r
400 IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,\r
401 IN UINT8 Slot,\r
402 IN UINT16 Rca,\r
403 OUT UINT32 *DevStatus\r
404 )\r
405{\r
406 EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;\r
407 EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;\r
408 EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;\r
409 EFI_STATUS Status;\r
410\r
411 ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));\r
412 ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));\r
413 ZeroMem (&Packet, sizeof (Packet));\r
414\r
415 Packet.SdMmcCmdBlk = &SdMmcCmdBlk;\r
416 Packet.SdMmcStatusBlk = &SdMmcStatusBlk;\r
417 Packet.Timeout = SD_MMC_HC_GENERIC_TIMEOUT;\r
418\r
419 SdMmcCmdBlk.CommandIndex = EMMC_SEND_STATUS;\r
420 SdMmcCmdBlk.CommandType = SdMmcCommandTypeAc;\r
421 SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR1;\r
422 SdMmcCmdBlk.CommandArgument = (UINT32)Rca << 16;\r
423\r
424 Status = SdMmcPassThruPassThru (PassThru, Slot, &Packet, NULL);\r
425 if (!EFI_ERROR (Status)) {\r
426 *DevStatus = SdMmcStatusBlk.Resp0;\r
427 }\r
428\r
429 return Status;\r
430}\r
431\r
432/**\r
433 Send command SEND_TUNING_BLOCK to the EMMC device for HS200 optimal sampling point\r
434 detection.\r
435\r
436 It may be sent up to 40 times until the host finishes the tuning procedure.\r
437\r
438 Refer to EMMC Electrical Standard Spec 5.1 Section 6.6.8 for details.\r
439\r
440 @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.\r
441 @param[in] Slot The slot number of the SD card to send the command to.\r
442 @param[in] BusWidth The bus width to work.\r
443\r
444 @retval EFI_SUCCESS The operation is done correctly.\r
445 @retval Others The operation fails.\r
446\r
447**/\r
448EFI_STATUS\r
449EmmcSendTuningBlk (\r
450 IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,\r
451 IN UINT8 Slot,\r
452 IN UINT8 BusWidth\r
453 )\r
454{\r
455 EFI_SD_MMC_COMMAND_BLOCK SdMmcCmdBlk;\r
456 EFI_SD_MMC_STATUS_BLOCK SdMmcStatusBlk;\r
457 EFI_SD_MMC_PASS_THRU_COMMAND_PACKET Packet;\r
458 EFI_STATUS Status;\r
459 UINT8 TuningBlock[128];\r
460\r
461 ZeroMem (&SdMmcCmdBlk, sizeof (SdMmcCmdBlk));\r
462 ZeroMem (&SdMmcStatusBlk, sizeof (SdMmcStatusBlk));\r
463 ZeroMem (&Packet, sizeof (Packet));\r
464\r
465 Packet.SdMmcCmdBlk = &SdMmcCmdBlk;\r
466 Packet.SdMmcStatusBlk = &SdMmcStatusBlk;\r
467 Packet.Timeout = SD_MMC_HC_GENERIC_TIMEOUT;\r
468\r
469 SdMmcCmdBlk.CommandIndex = EMMC_SEND_TUNING_BLOCK;\r
470 SdMmcCmdBlk.CommandType = SdMmcCommandTypeAdtc;\r
471 SdMmcCmdBlk.ResponseType = SdMmcResponseTypeR1;\r
472 SdMmcCmdBlk.CommandArgument = 0;\r
473\r
474 Packet.InDataBuffer = TuningBlock;\r
475 if (BusWidth == 8) {\r
476 Packet.InTransferLength = sizeof (TuningBlock);\r
477 } else {\r
478 Packet.InTransferLength = 64;\r
479 }\r
480\r
481 Status = SdMmcPassThruPassThru (PassThru, Slot, &Packet, NULL);\r
482\r
483 return Status;\r
484}\r
485\r
486/**\r
487 Tunning the clock to get HS200 optimal sampling point.\r
488\r
489 Command SEND_TUNING_BLOCK may be sent up to 40 times until the host finishes the\r
490 tuning procedure.\r
491\r
492 Refer to EMMC Electrical Standard Spec 5.1 Section 6.6.8 and SD Host Controller\r
493 Simplified Spec 3.0 Figure 2-29 for details.\r
494\r
495 @param[in] PciIo A pointer to the EFI_PCI_IO_PROTOCOL instance.\r
496 @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.\r
497 @param[in] Slot The slot number of the SD card to send the command to.\r
498 @param[in] BusWidth The bus width to work.\r
499\r
500 @retval EFI_SUCCESS The operation is done correctly.\r
501 @retval Others The operation fails.\r
502\r
503**/\r
504EFI_STATUS\r
505EmmcTuningClkForHs200 (\r
506 IN EFI_PCI_IO_PROTOCOL *PciIo,\r
507 IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,\r
508 IN UINT8 Slot,\r
509 IN UINT8 BusWidth\r
510 )\r
511{\r
512 EFI_STATUS Status;\r
513 UINT8 HostCtrl2;\r
514 UINT8 Retry;\r
515\r
516 //\r
517 // Notify the host that the sampling clock tuning procedure starts.\r
518 //\r
519 HostCtrl2 = BIT6;\r
520 Status = SdMmcHcOrMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);\r
521 if (EFI_ERROR (Status)) {\r
522 return Status;\r
523 }\r
524 //\r
525 // Ask the device to send a sequence of tuning blocks till the tuning procedure is done.\r
526 //\r
527 Retry = 0;\r
528 do {\r
529 Status = EmmcSendTuningBlk (PassThru, Slot, BusWidth);\r
530 if (EFI_ERROR (Status)) {\r
e27ccaba 531 DEBUG ((DEBUG_ERROR, "EmmcTuningClkForHs200: Send tuning block fails with %r\n", Status));\r
48555339
FT
532 return Status;\r
533 }\r
534\r
535 Status = SdMmcHcRwMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL2, TRUE, sizeof (HostCtrl2), &HostCtrl2);\r
536 if (EFI_ERROR (Status)) {\r
537 return Status;\r
538 }\r
539\r
8c983d3e 540 if ((HostCtrl2 & (BIT6 | BIT7)) == 0) {\r
48555339
FT
541 break;\r
542 }\r
8c983d3e
FT
543\r
544 if ((HostCtrl2 & (BIT6 | BIT7)) == BIT7) {\r
545 return EFI_SUCCESS;\r
546 }\r
48555339
FT
547 } while (++Retry < 40);\r
548\r
e27ccaba 549 DEBUG ((DEBUG_ERROR, "EmmcTuningClkForHs200: Send tuning block fails at %d times with HostCtrl2 %02x\n", Retry, HostCtrl2));\r
8c983d3e
FT
550 //\r
551 // Abort the tuning procedure and reset the tuning circuit.\r
552 //\r
553 HostCtrl2 = (UINT8)~(BIT6 | BIT7);\r
554 Status = SdMmcHcAndMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL2, sizeof (HostCtrl2), &HostCtrl2);\r
555 if (EFI_ERROR (Status)) {\r
556 return Status;\r
48555339 557 }\r
8c983d3e 558 return EFI_DEVICE_ERROR;\r
48555339
FT
559}\r
560\r
64362314
AM
561/**\r
562 Check the SWITCH operation status.\r
563\r
564 @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.\r
565 @param[in] Slot The slot number on which command should be sent.\r
566 @param[in] Rca The relative device address.\r
567\r
568 @retval EFI_SUCCESS The SWITCH finished siccessfully.\r
569 @retval others The SWITCH failed.\r
570**/\r
571EFI_STATUS\r
572EmmcCheckSwitchStatus (\r
573 IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,\r
574 IN UINT8 Slot,\r
575 IN UINT16 Rca\r
576 )\r
577{\r
578 EFI_STATUS Status;\r
579 UINT32 DevStatus;\r
580\r
581 Status = EmmcSendStatus (PassThru, Slot, Rca, &DevStatus);\r
582 if (EFI_ERROR (Status)) {\r
583 DEBUG ((DEBUG_ERROR, "EmmcCheckSwitchStatus: Send status fails with %r\n", Status));\r
584 return Status;\r
585 }\r
586\r
587 //\r
588 // Check the switch operation is really successful or not.\r
589 //\r
590 if ((DevStatus & BIT7) != 0) {\r
591 DEBUG ((DEBUG_ERROR, "EmmcCheckSwitchStatus: The switch operation fails as DevStatus is 0x%08x\n", DevStatus));\r
592 return EFI_DEVICE_ERROR;\r
593 }\r
594\r
595 return EFI_SUCCESS;\r
596}\r
597\r
48555339
FT
598/**\r
599 Switch the bus width to specified width.\r
600\r
601 Refer to EMMC Electrical Standard Spec 5.1 Section 6.6.9 and SD Host Controller\r
602 Simplified Spec 3.0 Figure 3-7 for details.\r
603\r
604 @param[in] PciIo A pointer to the EFI_PCI_IO_PROTOCOL instance.\r
605 @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.\r
606 @param[in] Slot The slot number of the SD card to send the command to.\r
607 @param[in] Rca The relative device address to be assigned.\r
608 @param[in] IsDdr If TRUE, use dual data rate data simpling method. Otherwise\r
609 use single data rate data simpling method.\r
610 @param[in] BusWidth The bus width to be set, it could be 4 or 8.\r
611\r
612 @retval EFI_SUCCESS The operation is done correctly.\r
613 @retval Others The operation fails.\r
614\r
615**/\r
616EFI_STATUS\r
617EmmcSwitchBusWidth (\r
618 IN EFI_PCI_IO_PROTOCOL *PciIo,\r
619 IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,\r
620 IN UINT8 Slot,\r
621 IN UINT16 Rca,\r
622 IN BOOLEAN IsDdr,\r
623 IN UINT8 BusWidth\r
624 )\r
625{\r
626 EFI_STATUS Status;\r
627 UINT8 Access;\r
628 UINT8 Index;\r
629 UINT8 Value;\r
630 UINT8 CmdSet;\r
48555339
FT
631\r
632 //\r
633 // Write Byte, the Value field is written into the byte pointed by Index.\r
634 //\r
635 Access = 0x03;\r
636 Index = OFFSET_OF (EMMC_EXT_CSD, BusWidth);\r
637 if (BusWidth == 4) {\r
638 Value = 1;\r
639 } else if (BusWidth == 8) {\r
640 Value = 2;\r
641 } else {\r
642 return EFI_INVALID_PARAMETER;\r
643 }\r
644\r
645 if (IsDdr) {\r
646 Value += 4;\r
647 }\r
648\r
649 CmdSet = 0;\r
650 Status = EmmcSwitch (PassThru, Slot, Access, Index, Value, CmdSet);\r
651 if (EFI_ERROR (Status)) {\r
e27ccaba 652 DEBUG ((DEBUG_ERROR, "EmmcSwitchBusWidth: Switch to bus width %d fails with %r\n", BusWidth, Status));\r
48555339
FT
653 return Status;\r
654 }\r
655\r
64362314 656 Status = EmmcCheckSwitchStatus (PassThru, Slot, Rca);\r
48555339 657 if (EFI_ERROR (Status)) {\r
48555339
FT
658 return Status;\r
659 }\r
48555339
FT
660\r
661 Status = SdMmcHcSetBusWidth (PciIo, Slot, BusWidth);\r
662\r
663 return Status;\r
664}\r
665\r
666/**\r
195f673f 667 Switch the bus timing and clock frequency.\r
48555339
FT
668\r
669 Refer to EMMC Electrical Standard Spec 5.1 Section 6.6 and SD Host Controller\r
670 Simplified Spec 3.0 Figure 3-3 for details.\r
671\r
adec1f5d
AM
672 @param[in] PciIo A pointer to the EFI_PCI_IO_PROTOCOL instance.\r
673 @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.\r
674 @param[in] Slot The slot number of the SD card to send the command to.\r
675 @param[in] Rca The relative device address to be assigned.\r
676 @param[in] DriverStrength Driver strength to set for speed modes that support it.\r
677 @param[in] BusTiming The bus mode timing indicator.\r
678 @param[in] ClockFreq The max clock frequency to be set, the unit is MHz.\r
48555339
FT
679\r
680 @retval EFI_SUCCESS The operation is done correctly.\r
681 @retval Others The operation fails.\r
682\r
683**/\r
684EFI_STATUS\r
195f673f 685EmmcSwitchBusTiming (\r
48555339
FT
686 IN EFI_PCI_IO_PROTOCOL *PciIo,\r
687 IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,\r
688 IN UINT8 Slot,\r
689 IN UINT16 Rca,\r
adec1f5d
AM
690 IN EDKII_SD_MMC_DRIVER_STRENGTH DriverStrength,\r
691 IN SD_MMC_BUS_MODE BusTiming,\r
48555339
FT
692 IN UINT32 ClockFreq\r
693 )\r
694{\r
695 EFI_STATUS Status;\r
696 UINT8 Access;\r
697 UINT8 Index;\r
698 UINT8 Value;\r
699 UINT8 CmdSet;\r
48555339 700 SD_MMC_HC_PRIVATE_DATA *Private;\r
a8c1fc70 701 UINT8 HostCtrl1;\r
64362314 702 BOOLEAN DelaySendStatus;\r
48555339
FT
703\r
704 Private = SD_MMC_HC_PRIVATE_FROM_THIS (PassThru);\r
705 //\r
706 // Write Byte, the Value field is written into the byte pointed by Index.\r
707 //\r
708 Access = 0x03;\r
709 Index = OFFSET_OF (EMMC_EXT_CSD, HsTiming);\r
48555339 710 CmdSet = 0;\r
adec1f5d
AM
711 switch (BusTiming) {\r
712 case SdMmcMmcHs400:\r
713 Value = (UINT8)((DriverStrength.Emmc << 4) | 3);\r
714 break;\r
715 case SdMmcMmcHs200:\r
716 Value = (UINT8)((DriverStrength.Emmc << 4) | 2);\r
717 break;\r
718 case SdMmcMmcHsSdr:\r
719 case SdMmcMmcHsDdr:\r
720 Value = 1;\r
721 break;\r
722 case SdMmcMmcLegacy:\r
723 Value = 0;\r
724 break;\r
725 default:\r
64362314 726 DEBUG ((DEBUG_ERROR, "EmmcSwitchBusTiming: Unsupported BusTiming(%d)\n", BusTiming));\r
adec1f5d
AM
727 return EFI_INVALID_PARAMETER;\r
728 }\r
48555339
FT
729\r
730 Status = EmmcSwitch (PassThru, Slot, Access, Index, Value, CmdSet);\r
731 if (EFI_ERROR (Status)) {\r
adec1f5d 732 DEBUG ((DEBUG_ERROR, "EmmcSwitchBusTiming: Switch to bus timing %d fails with %r\n", BusTiming, Status));\r
195f673f
AM
733 return Status;\r
734 }\r
735\r
a8c1fc70
AM
736 if (BusTiming == SdMmcMmcHsSdr || BusTiming == SdMmcMmcHsDdr) {\r
737 HostCtrl1 = BIT2;\r
738 Status = SdMmcHcOrMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL1, sizeof (HostCtrl1), &HostCtrl1);\r
739 if (EFI_ERROR (Status)) {\r
740 return Status;\r
741 }\r
742 } else {\r
743 HostCtrl1 = (UINT8)~BIT2;\r
744 Status = SdMmcHcAndMmio (PciIo, Slot, SD_MMC_HC_HOST_CTRL1, sizeof (HostCtrl1), &HostCtrl1);\r
745 if (EFI_ERROR (Status)) {\r
746 return Status;\r
747 }\r
748 }\r
749\r
750 Status = SdMmcHcUhsSignaling (Private->ControllerHandle, PciIo, Slot, BusTiming);\r
751 if (EFI_ERROR (Status)) {\r
752 return Status;\r
753 }\r
754\r
64362314
AM
755 //\r
756 // For cases when we switch bus timing to higher mode from current we want to\r
757 // send SEND_STATUS at current, lower, frequency then the target frequency to avoid\r
758 // stability issues. It has been observed that some designs are unable to process the\r
759 // SEND_STATUS at higher frequency during switch to HS200 @200MHz irrespective of the number of retries\r
760 // and only running the clock tuning is able to make them work at target frequency.\r
761 //\r
762 // For cases when we are downgrading the frequency and current high frequency is invalid\r
763 // we have to first change the frequency to target frequency and then send the SEND_STATUS.\r
764 //\r
765 if (Private->Slot[Slot].CurrentFreq < (ClockFreq * 1000)) {\r
766 Status = EmmcCheckSwitchStatus (PassThru, Slot, Rca);\r
767 if (EFI_ERROR (Status)) {\r
768 return Status;\r
769 }\r
770 DelaySendStatus = FALSE;\r
771 } else {\r
772 DelaySendStatus = TRUE;\r
773 }\r
774\r
195f673f
AM
775 //\r
776 // Convert the clock freq unit from MHz to KHz.\r
777 //\r
49accded 778 Status = SdMmcHcClockSupply (Private, Slot, BusTiming, FALSE, ClockFreq * 1000);\r
195f673f 779 if (EFI_ERROR (Status)) {\r
48555339
FT
780 return Status;\r
781 }\r
782\r
64362314
AM
783 if (DelaySendStatus) {\r
784 Status = EmmcCheckSwitchStatus (PassThru, Slot, Rca);\r
785 if (EFI_ERROR (Status)) {\r
786 return Status;\r
787 }\r
48555339 788 }\r
b7b803a6 789\r
48555339
FT
790 return Status;\r
791}\r
792\r
793/**\r
794 Switch to the High Speed timing according to request.\r
795\r
796 Refer to EMMC Electrical Standard Spec 5.1 Section 6.6.8 and SD Host Controller\r
797 Simplified Spec 3.0 Figure 2-29 for details.\r
798\r
799 @param[in] PciIo A pointer to the EFI_PCI_IO_PROTOCOL instance.\r
800 @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.\r
801 @param[in] Slot The slot number of the SD card to send the command to.\r
802 @param[in] Rca The relative device address to be assigned.\r
adec1f5d 803 @param[in] BusMode Pointer to SD_MMC_BUS_SETTINGS structure containing bus settings.\r
48555339
FT
804\r
805 @retval EFI_SUCCESS The operation is done correctly.\r
806 @retval Others The operation fails.\r
807\r
808**/\r
809EFI_STATUS\r
810EmmcSwitchToHighSpeed (\r
811 IN EFI_PCI_IO_PROTOCOL *PciIo,\r
812 IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,\r
813 IN UINT8 Slot,\r
814 IN UINT16 Rca,\r
adec1f5d 815 IN SD_MMC_BUS_SETTINGS *BusMode\r
48555339
FT
816 )\r
817{\r
a8c1fc70
AM
818 EFI_STATUS Status;\r
819 BOOLEAN IsDdr;\r
48555339 820\r
76e1e563 821 if ((BusMode->BusTiming != SdMmcMmcHsSdr && BusMode->BusTiming != SdMmcMmcHsDdr && BusMode->BusTiming != SdMmcMmcLegacy) ||\r
adec1f5d
AM
822 BusMode->ClockFreq > 52) {\r
823 return EFI_INVALID_PARAMETER;\r
824 }\r
825\r
826 if (BusMode->BusTiming == SdMmcMmcHsDdr) {\r
827 IsDdr = TRUE;\r
828 } else {\r
829 IsDdr = FALSE;\r
830 }\r
831\r
832 Status = EmmcSwitchBusWidth (PciIo, PassThru, Slot, Rca, IsDdr, BusMode->BusWidth);\r
48555339
FT
833 if (EFI_ERROR (Status)) {\r
834 return Status;\r
835 }\r
adec1f5d 836\r
adec1f5d 837 return EmmcSwitchBusTiming (PciIo, PassThru, Slot, Rca, BusMode->DriverStrength, BusMode->BusTiming, BusMode->ClockFreq);\r
48555339
FT
838}\r
839\r
840/**\r
adec1f5d 841 Switch to the HS200 timing. This function assumes that eMMC bus is still in legacy mode.\r
48555339
FT
842\r
843 Refer to EMMC Electrical Standard Spec 5.1 Section 6.6.8 and SD Host Controller\r
844 Simplified Spec 3.0 Figure 2-29 for details.\r
845\r
adec1f5d
AM
846 @param[in] PciIo A pointer to the EFI_PCI_IO_PROTOCOL instance.\r
847 @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.\r
848 @param[in] Slot The slot number of the SD card to send the command to.\r
849 @param[in] Rca The relative device address to be assigned.\r
850 @param[in] BusMode Pointer to SD_MMC_BUS_SETTINGS structure containing bus settings.\r
48555339
FT
851\r
852 @retval EFI_SUCCESS The operation is done correctly.\r
853 @retval Others The operation fails.\r
854\r
855**/\r
856EFI_STATUS\r
857EmmcSwitchToHS200 (\r
858 IN EFI_PCI_IO_PROTOCOL *PciIo,\r
859 IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,\r
860 IN UINT8 Slot,\r
861 IN UINT16 Rca,\r
adec1f5d 862 IN SD_MMC_BUS_SETTINGS *BusMode\r
48555339
FT
863 )\r
864{\r
a8c1fc70 865 EFI_STATUS Status;\r
48555339 866\r
adec1f5d
AM
867 if (BusMode->BusTiming != SdMmcMmcHs200 ||\r
868 (BusMode->BusWidth != 4 && BusMode->BusWidth != 8)) {\r
48555339
FT
869 return EFI_INVALID_PARAMETER;\r
870 }\r
871\r
adec1f5d 872 Status = EmmcSwitchBusWidth (PciIo, PassThru, Slot, Rca, FALSE, BusMode->BusWidth);\r
48555339
FT
873 if (EFI_ERROR (Status)) {\r
874 return Status;\r
875 }\r
a4708009 876\r
adec1f5d 877 Status = EmmcSwitchBusTiming (PciIo, PassThru, Slot, Rca, BusMode->DriverStrength, BusMode->BusTiming, BusMode->ClockFreq);\r
48555339
FT
878 if (EFI_ERROR (Status)) {\r
879 return Status;\r
880 }\r
881\r
adec1f5d 882 Status = EmmcTuningClkForHs200 (PciIo, PassThru, Slot, BusMode->BusWidth);\r
48555339
FT
883\r
884 return Status;\r
885}\r
886\r
887/**\r
adec1f5d 888 Switch to the HS400 timing. This function assumes that eMMC bus is still in legacy mode.\r
48555339
FT
889\r
890 Refer to EMMC Electrical Standard Spec 5.1 Section 6.6.8 and SD Host Controller\r
891 Simplified Spec 3.0 Figure 2-29 for details.\r
892\r
adec1f5d
AM
893 @param[in] PciIo A pointer to the EFI_PCI_IO_PROTOCOL instance.\r
894 @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.\r
895 @param[in] Slot The slot number of the SD card to send the command to.\r
896 @param[in] Rca The relative device address to be assigned.\r
897 @param[in] BusMode Pointer to SD_MMC_BUS_SETTINGS structure containing bus settings.\r
48555339
FT
898\r
899 @retval EFI_SUCCESS The operation is done correctly.\r
900 @retval Others The operation fails.\r
901\r
902**/\r
903EFI_STATUS\r
904EmmcSwitchToHS400 (\r
905 IN EFI_PCI_IO_PROTOCOL *PciIo,\r
906 IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,\r
907 IN UINT8 Slot,\r
908 IN UINT16 Rca,\r
adec1f5d 909 IN SD_MMC_BUS_SETTINGS *BusMode\r
48555339
FT
910 )\r
911{\r
a8c1fc70
AM
912 EFI_STATUS Status;\r
913 SD_MMC_BUS_SETTINGS Hs200BusMode;\r
914 UINT32 HsFreq;\r
adec1f5d
AM
915\r
916 if (BusMode->BusTiming != SdMmcMmcHs400 ||\r
917 BusMode->BusWidth != 8) {\r
918 return EFI_INVALID_PARAMETER;\r
919 }\r
a4708009 920\r
adec1f5d
AM
921 Hs200BusMode.BusTiming = SdMmcMmcHs200;\r
922 Hs200BusMode.BusWidth = BusMode->BusWidth;\r
923 Hs200BusMode.ClockFreq = BusMode->ClockFreq;\r
924 Hs200BusMode.DriverStrength = BusMode->DriverStrength;\r
48555339 925\r
adec1f5d 926 Status = EmmcSwitchToHS200 (PciIo, PassThru, Slot, Rca, &Hs200BusMode);\r
48555339
FT
927 if (EFI_ERROR (Status)) {\r
928 return Status;\r
929 }\r
adec1f5d 930\r
48555339 931 //\r
adec1f5d
AM
932 // Set to High Speed timing and set the clock frequency to a value less than or equal to 52MHz.\r
933 // This step is necessary to be able to switch Bus into 8 bit DDR mode which is unsupported in HS200.\r
48555339 934 //\r
adec1f5d
AM
935 HsFreq = BusMode->ClockFreq < 52 ? BusMode->ClockFreq : 52;\r
936 Status = EmmcSwitchBusTiming (PciIo, PassThru, Slot, Rca, BusMode->DriverStrength, SdMmcMmcHsSdr, HsFreq);\r
48555339
FT
937 if (EFI_ERROR (Status)) {\r
938 return Status;\r
939 }\r
a4708009 940\r
adec1f5d
AM
941 Status = EmmcSwitchBusWidth (PciIo, PassThru, Slot, Rca, TRUE, BusMode->BusWidth);\r
942 if (EFI_ERROR (Status)) {\r
943 return Status;\r
944 }\r
a4708009 945\r
adec1f5d
AM
946 return EmmcSwitchBusTiming (PciIo, PassThru, Slot, Rca, BusMode->DriverStrength, BusMode->BusTiming, BusMode->ClockFreq);\r
947}\r
48555339 948\r
adec1f5d
AM
949/**\r
950 Check if passed BusTiming is supported in both controller and card.\r
951\r
952 @param[in] Private Pointer to controller private data\r
953 @param[in] SlotIndex Index of the slot in the controller\r
954 @param[in] ExtCsd Pointer to the card's extended CSD\r
955 @param[in] BusTiming Bus timing to check\r
956\r
957 @retval TRUE Both card and controller support given BusTiming\r
958 @retval FALSE Card or controller doesn't support given BusTiming\r
959**/\r
960BOOLEAN\r
961EmmcIsBusTimingSupported (\r
962 IN SD_MMC_HC_PRIVATE_DATA *Private,\r
963 IN UINT8 SlotIndex,\r
964 IN EMMC_EXT_CSD *ExtCsd,\r
965 IN SD_MMC_BUS_MODE BusTiming\r
966 )\r
967{\r
968 BOOLEAN Supported;\r
969 SD_MMC_HC_SLOT_CAP *Capabilities;\r
970\r
971 Capabilities = &Private->Capability[SlotIndex];\r
972\r
973 Supported = FALSE;\r
974 switch (BusTiming) {\r
975 case SdMmcMmcHs400:\r
976 if ((((ExtCsd->DeviceType & (BIT6 | BIT7)) != 0) && (Capabilities->Hs400 != 0)) && Capabilities->BusWidth8 != 0) {\r
977 Supported = TRUE;\r
978 }\r
979 break;\r
980 case SdMmcMmcHs200:\r
981 if ((((ExtCsd->DeviceType & (BIT4 | BIT5)) != 0) && (Capabilities->Sdr104 != 0))) {\r
982 Supported = TRUE;\r
983 }\r
984 break;\r
985 case SdMmcMmcHsDdr:\r
986 if ((((ExtCsd->DeviceType & (BIT2 | BIT3)) != 0) && (Capabilities->Ddr50 != 0))) {\r
987 Supported = TRUE;\r
988 }\r
989 break;\r
990 case SdMmcMmcHsSdr:\r
991 if ((((ExtCsd->DeviceType & BIT1) != 0) && (Capabilities->HighSpeed != 0))) {\r
992 Supported = TRUE;\r
993 }\r
994 break;\r
995 case SdMmcMmcLegacy:\r
996 if ((ExtCsd->DeviceType & BIT0) != 0) {\r
997 Supported = TRUE;\r
998 }\r
999 break;\r
1000 default:\r
1001 ASSERT (FALSE);\r
1002 }\r
1003\r
1004 return Supported;\r
1005}\r
1006\r
1007/**\r
1008 Get the target bus timing to set on the link. This function\r
1009 will try to select highest bus timing supported by card, controller\r
1010 and the driver.\r
1011\r
1012 @param[in] Private Pointer to controller private data\r
1013 @param[in] SlotIndex Index of the slot in the controller\r
1014 @param[in] ExtCsd Pointer to the card's extended CSD\r
1015\r
1016 @return Bus timing value that should be set on link\r
1017**/\r
1018SD_MMC_BUS_MODE\r
1019EmmcGetTargetBusTiming (\r
1020 IN SD_MMC_HC_PRIVATE_DATA *Private,\r
1021 IN UINT8 SlotIndex,\r
1022 IN EMMC_EXT_CSD *ExtCsd\r
1023 )\r
1024{\r
1025 SD_MMC_BUS_MODE BusTiming;\r
1026\r
1027 //\r
1028 // We start with highest bus timing that this driver currently supports and\r
1029 // return as soon as we find supported timing.\r
1030 //\r
1031 BusTiming = SdMmcMmcHs400;\r
1032 while (BusTiming > SdMmcMmcLegacy) {\r
1033 if (EmmcIsBusTimingSupported (Private, SlotIndex, ExtCsd, BusTiming)) {\r
1034 break;\r
1035 }\r
1036 BusTiming--;\r
1037 }\r
1038\r
1039 return BusTiming;\r
1040}\r
1041\r
1042/**\r
1043 Check if the passed bus width is supported by controller and card.\r
1044\r
1045 @param[in] Private Pointer to controller private data\r
1046 @param[in] SlotIndex Index of the slot in the controller\r
1047 @param[in] BusTiming Bus timing set on the link\r
1048 @param[in] BusWidth Bus width to check\r
1049\r
1050 @retval TRUE Passed bus width is supported in current bus configuration\r
1051 @retval FALSE Passed bus width is not supported in current bus configuration\r
1052**/\r
1053BOOLEAN\r
1054EmmcIsBusWidthSupported (\r
1055 IN SD_MMC_HC_PRIVATE_DATA *Private,\r
1056 IN UINT8 SlotIndex,\r
1057 IN SD_MMC_BUS_MODE BusTiming,\r
1058 IN UINT16 BusWidth\r
1059 )\r
1060{\r
1061 if (BusWidth == 8 && Private->Capability[SlotIndex].BusWidth8 != 0) {\r
1062 return TRUE;\r
1063 } else if (BusWidth == 4 && BusTiming != SdMmcMmcHs400) {\r
1064 return TRUE;\r
1065 } else if (BusWidth == 1 && (BusTiming == SdMmcMmcHsSdr || BusTiming == SdMmcMmcLegacy)) {\r
1066 return TRUE;\r
1067 }\r
1068\r
1069 return FALSE;\r
1070}\r
1071\r
1072/**\r
1073 Get the target bus width to be set on the bus.\r
1074\r
1075 @param[in] Private Pointer to controller private data\r
1076 @param[in] SlotIndex Index of the slot in the controller\r
1077 @param[in] ExtCsd Pointer to card's extended CSD\r
1078 @param[in] BusTiming Bus timing set on the bus\r
1079\r
1080 @return Bus width to be set on the bus\r
1081**/\r
1082UINT8\r
1083EmmcGetTargetBusWidth (\r
1084 IN SD_MMC_HC_PRIVATE_DATA *Private,\r
1085 IN UINT8 SlotIndex,\r
1086 IN EMMC_EXT_CSD *ExtCsd,\r
1087 IN SD_MMC_BUS_MODE BusTiming\r
1088 )\r
1089{\r
1090 UINT8 BusWidth;\r
1091 UINT8 PreferredBusWidth;\r
1092\r
1093 PreferredBusWidth = Private->Slot[SlotIndex].OperatingParameters.BusWidth;\r
1094\r
1095 if (PreferredBusWidth != EDKII_SD_MMC_BUS_WIDTH_IGNORE &&\r
1096 EmmcIsBusWidthSupported (Private, SlotIndex, BusTiming, PreferredBusWidth)) {\r
1097 BusWidth = PreferredBusWidth;\r
1098 } else if (EmmcIsBusWidthSupported (Private, SlotIndex, BusTiming, 8)) {\r
1099 BusWidth = 8;\r
1100 } else if (EmmcIsBusWidthSupported (Private, SlotIndex, BusTiming, 4)) {\r
1101 BusWidth = 4;\r
1102 } else {\r
1103 BusWidth = 1;\r
1104 }\r
1105\r
1106 return BusWidth;\r
1107}\r
1108\r
1109/**\r
1110 Get the target clock frequency to be set on the bus.\r
1111\r
1112 @param[in] Private Pointer to controller private data\r
1113 @param[in] SlotIndex Index of the slot in the controller\r
1114 @param[in] ExtCsd Pointer to card's extended CSD\r
1115 @param[in] BusTiming Bus timing to be set on the bus\r
1116\r
1117 @return Value of the clock frequency to be set on bus in MHz\r
1118**/\r
1119UINT32\r
1120EmmcGetTargetClockFreq (\r
1121 IN SD_MMC_HC_PRIVATE_DATA *Private,\r
1122 IN UINT8 SlotIndex,\r
1123 IN EMMC_EXT_CSD *ExtCsd,\r
1124 IN SD_MMC_BUS_MODE BusTiming\r
1125 )\r
1126{\r
1127 UINT32 PreferredClockFreq;\r
1128 UINT32 MaxClockFreq;\r
1129\r
1130 PreferredClockFreq = Private->Slot[SlotIndex].OperatingParameters.ClockFreq;\r
1131\r
1132 switch (BusTiming) {\r
1133 case SdMmcMmcHs400:\r
1134 case SdMmcMmcHs200:\r
1135 MaxClockFreq = 200;\r
1136 break;\r
1137 case SdMmcMmcHsSdr:\r
1138 case SdMmcMmcHsDdr:\r
1139 MaxClockFreq = 52;\r
1140 break;\r
1141 default:\r
1142 MaxClockFreq = 26;\r
1143 break;\r
1144 }\r
1145\r
1146 if (PreferredClockFreq != EDKII_SD_MMC_CLOCK_FREQ_IGNORE && PreferredClockFreq < MaxClockFreq) {\r
1147 return PreferredClockFreq;\r
1148 } else {\r
1149 return MaxClockFreq;\r
1150 }\r
1151}\r
1152\r
1153/**\r
1154 Get the driver strength to be set on bus.\r
1155\r
1156 @param[in] Private Pointer to controller private data\r
1157 @param[in] SlotIndex Index of the slot in the controller\r
1158 @param[in] ExtCsd Pointer to card's extended CSD\r
1159 @param[in] BusTiming Bus timing set on the bus\r
1160\r
1161 @return Value of the driver strength to be set on the bus\r
1162**/\r
1163EDKII_SD_MMC_DRIVER_STRENGTH\r
1164EmmcGetTargetDriverStrength (\r
1165 IN SD_MMC_HC_PRIVATE_DATA *Private,\r
1166 IN UINT8 SlotIndex,\r
1167 IN EMMC_EXT_CSD *ExtCsd,\r
1168 IN SD_MMC_BUS_MODE BusTiming\r
1169 )\r
1170{\r
1171 EDKII_SD_MMC_DRIVER_STRENGTH PreferredDriverStrength;\r
1172 EDKII_SD_MMC_DRIVER_STRENGTH DriverStrength;\r
1173\r
1174 PreferredDriverStrength = Private->Slot[SlotIndex].OperatingParameters.DriverStrength;\r
1175 DriverStrength.Emmc = EmmcDriverStrengthType0;\r
1176\r
1177 if (PreferredDriverStrength.Emmc != EDKII_SD_MMC_DRIVER_STRENGTH_IGNORE &&\r
1178 (ExtCsd->DriverStrength & (BIT0 << PreferredDriverStrength.Emmc))) {\r
1179 DriverStrength.Emmc = PreferredDriverStrength.Emmc;\r
1180 }\r
1181\r
1182 return DriverStrength;\r
1183}\r
1184\r
1185/**\r
1186 Get the target settings for the bus mode.\r
1187\r
1188 @param[in] Private Pointer to controller private data\r
1189 @param[in] SlotIndex Index of the slot in the controller\r
1190 @param[in] ExtCsd Pointer to card's extended CSD\r
1191 @param[out] BusMode Target configuration of the bus\r
1192**/\r
1193VOID\r
1194EmmcGetTargetBusMode (\r
1195 IN SD_MMC_HC_PRIVATE_DATA *Private,\r
1196 IN UINT8 SlotIndex,\r
1197 IN EMMC_EXT_CSD *ExtCsd,\r
1198 OUT SD_MMC_BUS_SETTINGS *BusMode\r
1199 )\r
1200{\r
1201 BusMode->BusTiming = EmmcGetTargetBusTiming (Private, SlotIndex, ExtCsd);\r
1202 BusMode->BusWidth = EmmcGetTargetBusWidth (Private, SlotIndex, ExtCsd, BusMode->BusTiming);\r
1203 BusMode->ClockFreq = EmmcGetTargetClockFreq (Private, SlotIndex, ExtCsd, BusMode->BusTiming);\r
1204 BusMode->DriverStrength = EmmcGetTargetDriverStrength (Private, SlotIndex, ExtCsd, BusMode->BusTiming);\r
48555339
FT
1205}\r
1206\r
1207/**\r
1208 Switch the high speed timing according to request.\r
1209\r
1210 Refer to EMMC Electrical Standard Spec 5.1 Section 6.6.8 and SD Host Controller\r
1211 Simplified Spec 3.0 Figure 2-29 for details.\r
1212\r
1213 @param[in] PciIo A pointer to the EFI_PCI_IO_PROTOCOL instance.\r
1214 @param[in] PassThru A pointer to the EFI_SD_MMC_PASS_THRU_PROTOCOL instance.\r
1215 @param[in] Slot The slot number of the SD card to send the command to.\r
1216 @param[in] Rca The relative device address to be assigned.\r
1217\r
1218 @retval EFI_SUCCESS The operation is done correctly.\r
1219 @retval Others The operation fails.\r
1220\r
1221**/\r
1222EFI_STATUS\r
1223EmmcSetBusMode (\r
1224 IN EFI_PCI_IO_PROTOCOL *PciIo,\r
1225 IN EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru,\r
1226 IN UINT8 Slot,\r
1227 IN UINT16 Rca\r
1228 )\r
1229{\r
1230 EFI_STATUS Status;\r
1231 EMMC_CSD Csd;\r
1232 EMMC_EXT_CSD ExtCsd;\r
adec1f5d 1233 SD_MMC_BUS_SETTINGS BusMode;\r
48555339
FT
1234 SD_MMC_HC_PRIVATE_DATA *Private;\r
1235\r
1236 Private = SD_MMC_HC_PRIVATE_FROM_THIS (PassThru);\r
1237\r
1238 Status = EmmcGetCsd (PassThru, Slot, Rca, &Csd);\r
1239 if (EFI_ERROR (Status)) {\r
e27ccaba 1240 DEBUG ((DEBUG_ERROR, "EmmcSetBusMode: GetCsd fails with %r\n", Status));\r
48555339
FT
1241 return Status;\r
1242 }\r
1243\r
1244 Status = EmmcSelect (PassThru, Slot, Rca);\r
1245 if (EFI_ERROR (Status)) {\r
e27ccaba 1246 DEBUG ((DEBUG_ERROR, "EmmcSetBusMode: Select fails with %r\n", Status));\r
48555339
FT
1247 return Status;\r
1248 }\r
1249\r
7f3b0bad 1250 ASSERT (Private->BaseClkFreq[Slot] != 0);\r
adec1f5d 1251\r
48555339 1252 //\r
adec1f5d 1253 // Get Device_Type from EXT_CSD register.\r
48555339
FT
1254 //\r
1255 Status = EmmcGetExtCsd (PassThru, Slot, &ExtCsd);\r
1256 if (EFI_ERROR (Status)) {\r
e27ccaba 1257 DEBUG ((DEBUG_ERROR, "EmmcSetBusMode: GetExtCsd fails with %r\n", Status));\r
48555339
FT
1258 return Status;\r
1259 }\r
48555339 1260\r
adec1f5d 1261 EmmcGetTargetBusMode (Private, Slot, &ExtCsd, &BusMode);\r
48555339 1262\r
adec1f5d
AM
1263 DEBUG ((DEBUG_INFO, "EmmcSetBusMode: Target bus mode: timing = %d, width = %d, clock freq = %d, driver strength = %d\n",\r
1264 BusMode.BusTiming, BusMode.BusWidth, BusMode.ClockFreq, BusMode.DriverStrength.Emmc));\r
48555339 1265\r
adec1f5d
AM
1266 if (BusMode.BusTiming == SdMmcMmcHs400) {\r
1267 Status = EmmcSwitchToHS400 (PciIo, PassThru, Slot, Rca, &BusMode);\r
1268 } else if (BusMode.BusTiming == SdMmcMmcHs200) {\r
1269 Status = EmmcSwitchToHS200 (PciIo, PassThru, Slot, Rca, &BusMode);\r
48555339 1270 } else {\r
76e1e563
AM
1271 //\r
1272 // Note that EmmcSwitchToHighSpeed is also called for SdMmcMmcLegacy\r
1273 // bus timing. This is because even though we might not want to\r
1274 // change the timing itself we still want to allow customization of\r
1275 // bus parameters such as clock frequency and bus width.\r
1276 //\r
adec1f5d 1277 Status = EmmcSwitchToHighSpeed (PciIo, PassThru, Slot, Rca, &BusMode);\r
48555339
FT
1278 }\r
1279\r
adec1f5d 1280 DEBUG ((DEBUG_INFO, "EmmcSetBusMode: Switch to %a %r\n", (BusMode.BusTiming == SdMmcMmcHs400) ? "HS400" : ((BusMode.BusTiming == SdMmcMmcHs200) ? "HS200" : "HighSpeed"), Status));\r
48555339
FT
1281\r
1282 return Status;\r
1283}\r
1284\r
1285/**\r
1286 Execute EMMC device identification procedure.\r
1287\r
1288 Refer to EMMC Electrical Standard Spec 5.1 Section 6.4 for details.\r
1289\r
1290 @param[in] Private A pointer to the SD_MMC_HC_PRIVATE_DATA instance.\r
1291 @param[in] Slot The slot number of the SD card to send the command to.\r
1292\r
1293 @retval EFI_SUCCESS There is a EMMC card.\r
1294 @retval Others There is not a EMMC card.\r
1295\r
1296**/\r
1297EFI_STATUS\r
1298EmmcIdentification (\r
1299 IN SD_MMC_HC_PRIVATE_DATA *Private,\r
1300 IN UINT8 Slot\r
1301 )\r
1302{\r
1303 EFI_STATUS Status;\r
1304 EFI_PCI_IO_PROTOCOL *PciIo;\r
1305 EFI_SD_MMC_PASS_THRU_PROTOCOL *PassThru;\r
1306 UINT32 Ocr;\r
1307 UINT16 Rca;\r
ec86d285 1308 UINTN Retry;\r
48555339
FT
1309\r
1310 PciIo = Private->PciIo;\r
1311 PassThru = &Private->PassThru;\r
1312\r
1313 Status = EmmcReset (PassThru, Slot);\r
1314 if (EFI_ERROR (Status)) {\r
e27ccaba 1315 DEBUG ((DEBUG_VERBOSE, "EmmcIdentification: Executing Cmd0 fails with %r\n", Status));\r
48555339
FT
1316 return Status;\r
1317 }\r
1318\r
ec86d285
FT
1319 Ocr = 0;\r
1320 Retry = 0;\r
48555339
FT
1321 do {\r
1322 Status = EmmcGetOcr (PassThru, Slot, &Ocr);\r
1323 if (EFI_ERROR (Status)) {\r
e27ccaba 1324 DEBUG ((DEBUG_VERBOSE, "EmmcIdentification: Executing Cmd1 fails with %r\n", Status));\r
48555339
FT
1325 return Status;\r
1326 }\r
1327 Ocr |= BIT30;\r
ec86d285
FT
1328\r
1329 if (Retry++ == 100) {\r
1330 DEBUG ((DEBUG_VERBOSE, "EmmcIdentification: Executing Cmd1 fails too many times\n"));\r
1331 return EFI_DEVICE_ERROR;\r
1332 }\r
1333 gBS->Stall(10 * 1000);\r
48555339
FT
1334 } while ((Ocr & BIT31) == 0);\r
1335\r
1336 Status = EmmcGetAllCid (PassThru, Slot);\r
1337 if (EFI_ERROR (Status)) {\r
e27ccaba 1338 DEBUG ((DEBUG_VERBOSE, "EmmcIdentification: Executing Cmd2 fails with %r\n", Status));\r
48555339
FT
1339 return Status;\r
1340 }\r
1341 //\r
1342 // Slot starts from 0 and valid RCA starts from 1.\r
1343 // Here we takes a simple formula to calculate the RCA.\r
1344 // Don't support multiple devices on the slot, that is\r
1345 // shared bus slot feature.\r
1346 //\r
1347 Rca = Slot + 1;\r
1348 Status = EmmcSetRca (PassThru, Slot, Rca);\r
1349 if (EFI_ERROR (Status)) {\r
e27ccaba 1350 DEBUG ((DEBUG_ERROR, "EmmcIdentification: Executing Cmd3 fails with %r\n", Status));\r
48555339
FT
1351 return Status;\r
1352 }\r
1353 //\r
1354 // Enter Data Tranfer Mode.\r
1355 //\r
e27ccaba 1356 DEBUG ((DEBUG_INFO, "EmmcIdentification: Found a EMMC device at slot [%d], RCA [%d]\n", Slot, Rca));\r
48555339
FT
1357 Private->Slot[Slot].CardType = EmmcCardType;\r
1358\r
1359 Status = EmmcSetBusMode (PciIo, PassThru, Slot, Rca);\r
1360\r
1361 return Status;\r
1362}\r
1363\r