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[mirror_edk2.git] / MdeModulePkg / Bus / Pci / UhciDxe / Uhci.h
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913cb9dc 1/** @file\r
2\r
ab6495ea 3 The definition for UHCI driver model and HC protocol routines.\r
4\r
0428a6cb 5Copyright (c) 2004 - 2009, Intel Corporation\r
913cb9dc 6All rights reserved. This program and the accompanying materials\r
7are licensed and made available under the terms and conditions of the BSD License\r
8which accompanies this distribution. The full text of the license may be found at\r
9http://opensource.org/licenses/bsd-license.php\r
10\r
11THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
12WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
13\r
913cb9dc 14**/\r
15\r
ab6495ea 16#ifndef _EFI_UHCI_H_\r
17#define _EFI_UHCI_H_\r
913cb9dc 18\r
ed7748fe 19\r
60c93673 20#include <Uefi.h>\r
ed7748fe 21\r
913cb9dc 22#include <Protocol/Usb2HostController.h>\r
23#include <Protocol/UsbHostController.h>\r
24#include <Protocol/PciIo.h>\r
ed7748fe 25\r
0428a6cb 26#include <Guid/EventGroup.h>\r
27\r
913cb9dc 28#include <Library/DebugLib.h>\r
29#include <Library/BaseMemoryLib.h>\r
30#include <Library/UefiDriverEntryPoint.h>\r
31#include <Library/UefiBootServicesTableLib.h>\r
32#include <Library/UefiLib.h>\r
33#include <Library/BaseLib.h>\r
34#include <Library/MemoryAllocationLib.h>\r
dd4047a5 35#include <Library/PcdLib.h>\r
913cb9dc 36\r
a261044c 37#include <IndustryStandard/Pci.h>\r
913cb9dc 38\r
39typedef struct _USB_HC_DEV USB_HC_DEV;\r
40\r
41#include "UsbHcMem.h"\r
42#include "UhciQueue.h"\r
43#include "UhciReg.h"\r
44#include "UhciSched.h"\r
45#include "UhciDebug.h"\r
aa79b0b3 46#include "ComponentName.h"\r
913cb9dc 47\r
ab6495ea 48typedef enum {\r
41e8ff27 49 UHC_1_MICROSECOND = 1,\r
50 UHC_1_MILLISECOND = 1000 * UHC_1_MICROSECOND,\r
51 UHC_1_SECOND = 1000 * UHC_1_MILLISECOND,\r
52\r
53 //\r
54 // UHCI register operation timeout, set by experience\r
913cb9dc 55 //\r
41e8ff27 56 UHC_GENERIC_TIMEOUT = UHC_1_SECOND,\r
68246fa8 57\r
913cb9dc 58 //\r
41e8ff27 59 // Wait for force global resume(FGR) complete, refers to\r
60 // specification[UHCI11-2.1.1]\r
68246fa8 61 //\r
41e8ff27 62 UHC_FORCE_GLOBAL_RESUME_STALL = 20 * UHC_1_MILLISECOND,\r
913cb9dc 63\r
41e8ff27 64 //\r
65 // Wait for roothub port reset and recovery, reset stall\r
68246fa8 66 // is set by experience, and recovery stall refers to\r
41e8ff27 67 // specification[UHCI11-2.1.1]\r
68 //\r
69 UHC_ROOT_PORT_RESET_STALL = 50 * UHC_1_MILLISECOND,\r
70 UHC_ROOT_PORT_RECOVERY_STALL = 10 * UHC_1_MILLISECOND,\r
913cb9dc 71\r
41e8ff27 72 //\r
68246fa8 73 // Sync and Async transfer polling interval, set by experience,\r
41e8ff27 74 // and the unit of Async is 100us.\r
75 //\r
9420fc14 76 UHC_SYNC_POLL_INTERVAL = 1 * UHC_1_MILLISECOND,\r
ab6495ea 77 UHC_ASYNC_POLL_INTERVAL = 50 * 10000UL\r
78}UHC_TIMEOUT_EXPERIENCE_VALUE;\r
68246fa8 79\r
913cb9dc 80\r
ab6495ea 81//\r
82// UHC raises TPL to TPL_NOTIFY to serialize all its operations\r
83// to protect shared data structures.\r
84//\r
85#define UHCI_TPL TPL_NOTIFY\r
86\r
f3f2e05d 87#define USB_HC_DEV_SIGNATURE SIGNATURE_32 ('u', 'h', 'c', 'i')\r
913cb9dc 88\r
89#pragma pack(1)\r
90typedef struct {\r
91 UINT8 PI;\r
92 UINT8 SubClassCode;\r
93 UINT8 BaseCode;\r
94} USB_CLASSC;\r
95#pragma pack()\r
96\r
913cb9dc 97#define UHC_FROM_USB2_HC_PROTO(This) CR(This, USB_HC_DEV, Usb2Hc, USB_HC_DEV_SIGNATURE)\r
98\r
99//\r
100// USB_HC_DEV support the UHCI hardware controller. It schedules\r
101// the asynchronous interrupt transfer with the same method as\r
102// EHCI: a reversed tree structure. For synchronous interrupt,\r
103// control and bulk transfer, it uses three static queue head to\r
104// schedule them. SyncIntQh is for interrupt transfer. LsCtrlQh is\r
105// for LOW speed control transfer, and FsCtrlBulkQh is for FULL\r
106// speed control or bulk transfer. This is because FULL speed contrl\r
107// or bulk transfer can reclaim the unused bandwidth. Some USB\r
108// device requires this bandwidth reclamation capability.\r
109//\r
c52fa98c 110struct _USB_HC_DEV {\r
913cb9dc 111 UINT32 Signature;\r
913cb9dc 112 EFI_USB2_HC_PROTOCOL Usb2Hc;\r
113 EFI_PCI_IO_PROTOCOL *PciIo;\r
68246fa8 114 UINT64 OriginalPciAttributes;\r
913cb9dc 115\r
116 //\r
117 // Schedule data structures\r
118 //\r
119 UINT32 *FrameBase;\r
3af875e2 120 UINT32 *FrameBasePciMemAddr;\r
913cb9dc 121 UHCI_QH_SW *SyncIntQh;\r
122 UHCI_QH_SW *CtrlQh;\r
123 UHCI_QH_SW *BulkQh;\r
124\r
125 //\r
126 // Structures to maintain asynchronus interrupt transfers.\r
127 // When asynchronous interrutp transfer is unlinked from\r
128 // the frame list, the hardware may still hold a pointer\r
129 // to it. To synchronize with hardware, its resoureces are\r
130 // released in two steps using Recycle and RecycleWait.\r
131 // Check the asynchronous interrupt management routines.\r
132 //\r
133 LIST_ENTRY AsyncIntList;\r
134 EFI_EVENT AsyncIntMonitor;\r
135 UHCI_ASYNC_REQUEST *Recycle;\r
136 UHCI_ASYNC_REQUEST *RecycleWait;\r
137\r
138\r
139 UINTN RootPorts;\r
140 USBHC_MEM_POOL *MemPool;\r
141 EFI_UNICODE_STRING_TABLE *CtrlNameTable;\r
142 VOID *FrameMapping;\r
0428a6cb 143\r
144 //\r
145 // ExitBootServicesEvent is used to stop the EHC DMA operation \r
146 // after exit boot service.\r
147 //\r
148 EFI_EVENT ExitBootServiceEvent;\r
c52fa98c 149};\r
913cb9dc 150\r
f527bce3 151extern EFI_DRIVER_BINDING_PROTOCOL gUhciDriverBinding;\r
152extern EFI_COMPONENT_NAME_PROTOCOL gUhciComponentName;\r
153extern EFI_COMPONENT_NAME2_PROTOCOL gUhciComponentName2;\r
913cb9dc 154\r
aa79b0b3 155/**\r
156 Test to see if this driver supports ControllerHandle. Any\r
157 ControllerHandle that has UsbHcProtocol installed will be supported.\r
158\r
159 @param This Protocol instance pointer.\r
160 @param Controller Handle of device to test.\r
161 @param RemainingDevicePath Not used.\r
162\r
163 @return EFI_SUCCESS This driver supports this device.\r
164 @return EFI_UNSUPPORTED This driver does not support this device.\r
165\r
166**/\r
167EFI_STATUS\r
168EFIAPI\r
169UhciDriverBindingSupported (\r
170 IN EFI_DRIVER_BINDING_PROTOCOL *This,\r
171 IN EFI_HANDLE Controller,\r
172 IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath\r
173 );\r
174\r
175/**\r
176 Starting the Usb UHCI Driver.\r
177\r
178 @param This Protocol instance pointer.\r
179 @param Controller Handle of device to test.\r
180 @param RemainingDevicePath Not used.\r
181\r
182 @retval EFI_SUCCESS This driver supports this device.\r
183 @retval EFI_UNSUPPORTED This driver does not support this device.\r
184 @retval EFI_DEVICE_ERROR This driver cannot be started due to device Error.\r
185 EFI_OUT_OF_RESOURCES- Failed due to resource shortage.\r
186\r
187**/\r
188EFI_STATUS\r
189EFIAPI\r
190UhciDriverBindingStart (\r
191 IN EFI_DRIVER_BINDING_PROTOCOL *This,\r
192 IN EFI_HANDLE Controller,\r
193 IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath\r
194 );\r
195\r
196/**\r
197 Stop this driver on ControllerHandle. Support stoping any child handles\r
198 created by this driver.\r
199\r
200 @param This Protocol instance pointer.\r
201 @param Controller Handle of device to stop driver on.\r
202 @param NumberOfChildren Number of Children in the ChildHandleBuffer.\r
203 @param ChildHandleBuffer List of handles for the children we need to stop.\r
204\r
205 @return EFI_SUCCESS\r
206 @return others\r
207\r
208**/\r
209EFI_STATUS\r
210EFIAPI\r
211UhciDriverBindingStop (\r
212 IN EFI_DRIVER_BINDING_PROTOCOL *This,\r
213 IN EFI_HANDLE Controller,\r
214 IN UINTN NumberOfChildren,\r
215 IN EFI_HANDLE *ChildHandleBuffer\r
216 );\r
217\r
913cb9dc 218#endif\r