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913cb9dc 1/** @file\r
2\r
ab6495ea 3 The definition for UHCI driver model and HC protocol routines.\r
4\r
d1102dba 5Copyright (c) 2004 - 2018, Intel Corporation. All rights reserved.<BR>\r
9d510e61 6SPDX-License-Identifier: BSD-2-Clause-Patent\r
913cb9dc 7\r
913cb9dc 8**/\r
9\r
ab6495ea 10#ifndef _EFI_UHCI_H_\r
11#define _EFI_UHCI_H_\r
913cb9dc 12\r
ed7748fe 13\r
60c93673 14#include <Uefi.h>\r
ed7748fe 15\r
913cb9dc 16#include <Protocol/Usb2HostController.h>\r
17#include <Protocol/UsbHostController.h>\r
18#include <Protocol/PciIo.h>\r
ed7748fe 19\r
0428a6cb 20#include <Guid/EventGroup.h>\r
21\r
913cb9dc 22#include <Library/DebugLib.h>\r
23#include <Library/BaseMemoryLib.h>\r
24#include <Library/UefiDriverEntryPoint.h>\r
25#include <Library/UefiBootServicesTableLib.h>\r
26#include <Library/UefiLib.h>\r
27#include <Library/BaseLib.h>\r
28#include <Library/MemoryAllocationLib.h>\r
dd4047a5 29#include <Library/PcdLib.h>\r
37623a5c 30#include <Library/ReportStatusCodeLib.h>\r
913cb9dc 31\r
a261044c 32#include <IndustryStandard/Pci.h>\r
913cb9dc 33\r
34typedef struct _USB_HC_DEV USB_HC_DEV;\r
35\r
36#include "UsbHcMem.h"\r
37#include "UhciQueue.h"\r
38#include "UhciReg.h"\r
39#include "UhciSched.h"\r
40#include "UhciDebug.h"\r
aa79b0b3 41#include "ComponentName.h"\r
913cb9dc 42\r
1ccdbf2a 43//\r
44// UHC timeout experience values\r
45//\r
46\r
47#define UHC_1_MICROSECOND 1\r
48#define UHC_1_MILLISECOND (1000 * UHC_1_MICROSECOND)\r
49#define UHC_1_SECOND (1000 * UHC_1_MILLISECOND)\r
50\r
51//\r
52// UHCI register operation timeout, set by experience\r
53//\r
54#define UHC_GENERIC_TIMEOUT UHC_1_SECOND\r
55\r
56//\r
57// Wait for force global resume(FGR) complete, refers to\r
58// specification[UHCI11-2.1.1]\r
59//\r
60#define UHC_FORCE_GLOBAL_RESUME_STALL (20 * UHC_1_MILLISECOND)\r
68246fa8 61\r
1ccdbf2a 62//\r
63// Wait for roothub port reset and recovery, reset stall\r
64// is set by experience, and recovery stall refers to\r
65// specification[UHCI11-2.1.1]\r
66//\r
67#define UHC_ROOT_PORT_RESET_STALL (50 * UHC_1_MILLISECOND)\r
68#define UHC_ROOT_PORT_RECOVERY_STALL (10 * UHC_1_MILLISECOND)\r
69\r
70//\r
71// Sync and Async transfer polling interval, set by experience,\r
72// and the unit of Async is 100us.\r
73//\r
74#define UHC_SYNC_POLL_INTERVAL (1 * UHC_1_MILLISECOND)\r
5a127aba 75#define UHC_ASYNC_POLL_INTERVAL EFI_TIMER_PERIOD_MILLISECONDS(1)\r
913cb9dc 76\r
ab6495ea 77//\r
78// UHC raises TPL to TPL_NOTIFY to serialize all its operations\r
79// to protect shared data structures.\r
80//\r
81#define UHCI_TPL TPL_NOTIFY\r
82\r
f3f2e05d 83#define USB_HC_DEV_SIGNATURE SIGNATURE_32 ('u', 'h', 'c', 'i')\r
913cb9dc 84\r
85#pragma pack(1)\r
86typedef struct {\r
1ccdbf2a 87 UINT8 ProgInterface;\r
913cb9dc 88 UINT8 SubClassCode;\r
89 UINT8 BaseCode;\r
90} USB_CLASSC;\r
91#pragma pack()\r
92\r
913cb9dc 93#define UHC_FROM_USB2_HC_PROTO(This) CR(This, USB_HC_DEV, Usb2Hc, USB_HC_DEV_SIGNATURE)\r
94\r
95//\r
96// USB_HC_DEV support the UHCI hardware controller. It schedules\r
97// the asynchronous interrupt transfer with the same method as\r
98// EHCI: a reversed tree structure. For synchronous interrupt,\r
99// control and bulk transfer, it uses three static queue head to\r
100// schedule them. SyncIntQh is for interrupt transfer. LsCtrlQh is\r
101// for LOW speed control transfer, and FsCtrlBulkQh is for FULL\r
102// speed control or bulk transfer. This is because FULL speed contrl\r
103// or bulk transfer can reclaim the unused bandwidth. Some USB\r
104// device requires this bandwidth reclamation capability.\r
105//\r
c52fa98c 106struct _USB_HC_DEV {\r
913cb9dc 107 UINT32 Signature;\r
913cb9dc 108 EFI_USB2_HC_PROTOCOL Usb2Hc;\r
109 EFI_PCI_IO_PROTOCOL *PciIo;\r
37623a5c 110 EFI_DEVICE_PATH_PROTOCOL *DevicePath;\r
68246fa8 111 UINT64 OriginalPciAttributes;\r
913cb9dc 112\r
113 //\r
114 // Schedule data structures\r
115 //\r
aa91de05 116 UINT32 *FrameBase; // the buffer pointed by this pointer is used to store pci bus address of the QH descriptor.\r
117 UINT32 *FrameBaseHostAddr; // the buffer pointed by this pointer is used to store host memory address of the QH descriptor.\r
913cb9dc 118 UHCI_QH_SW *SyncIntQh;\r
119 UHCI_QH_SW *CtrlQh;\r
120 UHCI_QH_SW *BulkQh;\r
121\r
122 //\r
123 // Structures to maintain asynchronus interrupt transfers.\r
124 // When asynchronous interrutp transfer is unlinked from\r
125 // the frame list, the hardware may still hold a pointer\r
126 // to it. To synchronize with hardware, its resoureces are\r
127 // released in two steps using Recycle and RecycleWait.\r
128 // Check the asynchronous interrupt management routines.\r
129 //\r
130 LIST_ENTRY AsyncIntList;\r
131 EFI_EVENT AsyncIntMonitor;\r
132 UHCI_ASYNC_REQUEST *Recycle;\r
133 UHCI_ASYNC_REQUEST *RecycleWait;\r
134\r
135\r
136 UINTN RootPorts;\r
137 USBHC_MEM_POOL *MemPool;\r
138 EFI_UNICODE_STRING_TABLE *CtrlNameTable;\r
139 VOID *FrameMapping;\r
0428a6cb 140\r
141 //\r
d1102dba 142 // ExitBootServicesEvent is used to stop the EHC DMA operation\r
0428a6cb 143 // after exit boot service.\r
144 //\r
145 EFI_EVENT ExitBootServiceEvent;\r
c52fa98c 146};\r
913cb9dc 147\r
f527bce3 148extern EFI_DRIVER_BINDING_PROTOCOL gUhciDriverBinding;\r
149extern EFI_COMPONENT_NAME_PROTOCOL gUhciComponentName;\r
150extern EFI_COMPONENT_NAME2_PROTOCOL gUhciComponentName2;\r
913cb9dc 151\r
aa79b0b3 152/**\r
153 Test to see if this driver supports ControllerHandle. Any\r
154 ControllerHandle that has UsbHcProtocol installed will be supported.\r
155\r
156 @param This Protocol instance pointer.\r
157 @param Controller Handle of device to test.\r
158 @param RemainingDevicePath Not used.\r
159\r
160 @return EFI_SUCCESS This driver supports this device.\r
161 @return EFI_UNSUPPORTED This driver does not support this device.\r
162\r
163**/\r
164EFI_STATUS\r
165EFIAPI\r
166UhciDriverBindingSupported (\r
167 IN EFI_DRIVER_BINDING_PROTOCOL *This,\r
168 IN EFI_HANDLE Controller,\r
169 IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath\r
170 );\r
171\r
172/**\r
173 Starting the Usb UHCI Driver.\r
174\r
175 @param This Protocol instance pointer.\r
176 @param Controller Handle of device to test.\r
177 @param RemainingDevicePath Not used.\r
178\r
179 @retval EFI_SUCCESS This driver supports this device.\r
180 @retval EFI_UNSUPPORTED This driver does not support this device.\r
181 @retval EFI_DEVICE_ERROR This driver cannot be started due to device Error.\r
182 EFI_OUT_OF_RESOURCES- Failed due to resource shortage.\r
183\r
184**/\r
185EFI_STATUS\r
186EFIAPI\r
187UhciDriverBindingStart (\r
188 IN EFI_DRIVER_BINDING_PROTOCOL *This,\r
189 IN EFI_HANDLE Controller,\r
190 IN EFI_DEVICE_PATH_PROTOCOL *RemainingDevicePath\r
191 );\r
192\r
193/**\r
ed356b9e 194 Stop this driver on ControllerHandle. Support stopping any child handles\r
aa79b0b3 195 created by this driver.\r
196\r
197 @param This Protocol instance pointer.\r
198 @param Controller Handle of device to stop driver on.\r
199 @param NumberOfChildren Number of Children in the ChildHandleBuffer.\r
200 @param ChildHandleBuffer List of handles for the children we need to stop.\r
201\r
202 @return EFI_SUCCESS\r
203 @return others\r
204\r
205**/\r
206EFI_STATUS\r
207EFIAPI\r
208UhciDriverBindingStop (\r
209 IN EFI_DRIVER_BINDING_PROTOCOL *This,\r
210 IN EFI_HANDLE Controller,\r
211 IN UINTN NumberOfChildren,\r
212 IN EFI_HANDLE *ChildHandleBuffer\r
213 );\r
214\r
913cb9dc 215#endif\r