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913cb9dc | 1 | /** @file\r |
2 | \r | |
ab6495ea | 3 | This file contains the definination for host controller memory management routines\r |
4 | \r | |
cd5ebaa0 | 5 | Copyright (c) 2007 - 2010, Intel Corporation. All rights reserved.<BR>\r |
9d510e61 | 6 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
913cb9dc | 7 | \r |
913cb9dc | 8 | **/\r |
9 | \r | |
10 | #ifndef _EFI_EHCI_MEM_H_\r | |
11 | #define _EFI_EHCI_MEM_H_\r | |
12 | \r | |
913cb9dc | 13 | #define USB_HC_BIT(a) ((UINTN)(1 << (a)))\r |
14 | \r | |
15 | #define USB_HC_BIT_IS_SET(Data, Bit) \\r | |
16 | ((BOOLEAN)(((Data) & USB_HC_BIT(Bit)) == USB_HC_BIT(Bit)))\r | |
17 | \r | |
18 | #define USB_HC_HIGH_32BIT(Addr64) \\r | |
19 | ((UINT32)(RShiftU64((UINTN)(Addr64), 32) & 0XFFFFFFFF))\r | |
20 | \r | |
913cb9dc | 21 | \r |
1ccdbf2a | 22 | typedef struct _USBHC_MEM_BLOCK USBHC_MEM_BLOCK;\r |
23 | struct _USBHC_MEM_BLOCK {\r | |
913cb9dc | 24 | UINT8 *Bits; // Bit array to record which unit is allocated\r |
25 | UINTN BitsLen;\r | |
26 | UINT8 *Buf;\r | |
27 | UINT8 *BufHost;\r | |
28 | UINTN BufLen; // Memory size in bytes\r | |
29 | VOID *Mapping;\r | |
1ccdbf2a | 30 | USBHC_MEM_BLOCK *Next;\r |
31 | };\r | |
913cb9dc | 32 | \r |
33 | //\r | |
34 | // USBHC_MEM_POOL is used to manage the memory used by USB\r | |
35 | // host controller. EHCI requires the control memory and transfer\r | |
36 | // data to be on the same 4G memory.\r | |
37 | //\r | |
38 | typedef struct _USBHC_MEM_POOL {\r | |
39 | EFI_PCI_IO_PROTOCOL *PciIo;\r | |
40 | BOOLEAN Check4G;\r | |
41 | UINT32 Which4G;\r | |
42 | USBHC_MEM_BLOCK *Head;\r | |
43 | } USBHC_MEM_POOL;\r | |
44 | \r | |
1ccdbf2a | 45 | //\r |
46 | // Memory allocation unit, must be 2^n, n>4\r | |
47 | //\r | |
48 | #define USBHC_MEM_UNIT 64\r | |
913cb9dc | 49 | \r |
1ccdbf2a | 50 | #define USBHC_MEM_UNIT_MASK (USBHC_MEM_UNIT - 1)\r |
51 | #define USBHC_MEM_DEFAULT_PAGES 16\r | |
913cb9dc | 52 | \r |
53 | #define USBHC_MEM_ROUND(Len) (((Len) + USBHC_MEM_UNIT_MASK) & (~USBHC_MEM_UNIT_MASK))\r | |
54 | \r | |
55 | //\r | |
56 | // Advance the byte and bit to the next bit, adjust byte accordingly.\r | |
57 | //\r | |
58 | #define NEXT_BIT(Byte, Bit) \\r | |
59 | do { \\r | |
60 | (Bit)++; \\r | |
61 | if ((Bit) > 7) { \\r | |
62 | (Byte)++; \\r | |
63 | (Bit) = 0; \\r | |
64 | } \\r | |
65 | } while (0)\r | |
66 | \r | |
67 | \r | |
ab6495ea | 68 | /**\r |
69 | Initialize the memory management pool for the host controller.\r | |
70 | \r | |
71 | @param PciIo The PciIo that can be used to access the host controller.\r | |
72 | @param Check4G Whether the host controller requires allocated memory\r | |
73 | from one 4G address space.\r | |
74 | @param Which4G The 4G memory area each memory allocated should be from.\r | |
913cb9dc | 75 | \r |
ab6495ea | 76 | @retval EFI_SUCCESS The memory pool is initialized.\r |
77 | @retval EFI_OUT_OF_RESOURCE Fail to init the memory pool.\r | |
78 | \r | |
79 | **/\r | |
913cb9dc | 80 | USBHC_MEM_POOL *\r |
81 | UsbHcInitMemPool (\r | |
82 | IN EFI_PCI_IO_PROTOCOL *PciIo,\r | |
83 | IN BOOLEAN Check4G,\r | |
84 | IN UINT32 Which4G\r | |
ed66e1bc | 85 | );\r |
913cb9dc | 86 | \r |
87 | \r | |
913cb9dc | 88 | /**\r |
ab6495ea | 89 | Release the memory management pool.\r |
913cb9dc | 90 | \r |
ab6495ea | 91 | @param Pool The USB memory pool to free.\r |
913cb9dc | 92 | \r |
ab6495ea | 93 | @return EFI_SUCCESS The memory pool is freed.\r |
94 | @return EFI_DEVICE_ERROR Failed to free the memory pool.\r | |
913cb9dc | 95 | \r |
96 | **/\r | |
97 | EFI_STATUS\r | |
98 | UsbHcFreeMemPool (\r | |
99 | IN USBHC_MEM_POOL *Pool\r | |
ed66e1bc | 100 | );\r |
913cb9dc | 101 | \r |
102 | \r | |
103 | \r | |
104 | /**\r | |
105 | Allocate some memory from the host controller's memory pool\r | |
106 | which can be used to communicate with host controller.\r | |
107 | \r | |
ab6495ea | 108 | @param Pool The host controller's memory pool.\r |
109 | @param Size Size of the memory to allocate.\r | |
913cb9dc | 110 | \r |
ab6495ea | 111 | @return The allocated memory or NULL.\r |
913cb9dc | 112 | \r |
113 | **/\r | |
114 | VOID *\r | |
115 | UsbHcAllocateMem (\r | |
116 | IN USBHC_MEM_POOL *Pool,\r | |
117 | IN UINTN Size\r | |
ed66e1bc | 118 | );\r |
913cb9dc | 119 | \r |
120 | \r | |
121 | \r | |
122 | /**\r | |
ab6495ea | 123 | Free the allocated memory back to the memory pool.\r |
913cb9dc | 124 | \r |
ab6495ea | 125 | @param Pool The memory pool of the host controller.\r |
126 | @param Mem The memory to free.\r | |
127 | @param Size The size of the memory to free.\r | |
913cb9dc | 128 | \r |
ab6495ea | 129 | @return None.\r |
913cb9dc | 130 | \r |
131 | **/\r | |
132 | VOID\r | |
133 | UsbHcFreeMem (\r | |
134 | IN USBHC_MEM_POOL *Pool,\r | |
135 | IN VOID *Mem,\r | |
136 | IN UINTN Size\r | |
ed66e1bc | 137 | );\r |
aa91de05 | 138 | \r |
139 | /**\r | |
140 | Calculate the corresponding pci bus address according to the Mem parameter.\r | |
141 | \r | |
142 | @param Pool The memory pool of the host controller.\r | |
143 | @param Mem The pointer to host memory.\r | |
144 | @param Size The size of the memory region.\r | |
145 | \r | |
146 | @return the pci memory address\r | |
147 | **/\r | |
148 | EFI_PHYSICAL_ADDRESS\r | |
149 | UsbHcGetPciAddressForHostMem (\r | |
150 | IN USBHC_MEM_POOL *Pool,\r | |
151 | IN VOID *Mem,\r | |
152 | IN UINTN Size\r | |
153 | );\r | |
154 | \r | |
913cb9dc | 155 | #endif\r |