IntelSiliconPkg: Replace BSD License with BSD+Patent License

[mirror_edk2.git] / MdeModulePkg / Bus / Pci / UhciPei / UhcPeim.c

/** @file\r
PEIM to produce gPeiUsbHostControllerPpiGuid based on gPeiUsbControllerPpiGuid\r
which is used to enable recovery function from USB Drivers.\r
\r
Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved. <BR>\r
\r
This program and the accompanying materials\r
are licensed and made available under the terms and conditions\r
of the BSD License which accompanies this distribution.  The\r
full text of the license may be found at\r
http://opensource.org/licenses/bsd-license.php\r
\r
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
**/\r
\r
#include "UhcPeim.h"\r
\r
/**\r
  Stop the host controller.\r
\r
  @param  Uhc           The UHCI device.\r
  @param  Timeout       Max time allowed.\r
\r
  @retval EFI_SUCCESS   The host controller is stopped.\r
  @retval EFI_TIMEOUT   Failed to stop the host controller.\r
\r
**/\r
EFI_STATUS\r
UhciStopHc (\r
  IN USB_UHC_DEV        *Uhc,\r
  IN UINTN              Timeout\r
  )\r
{\r
  UINT16                CommandContent;\r
  UINT16                UsbSts;\r
  UINTN                 Index;\r
\r
  CommandContent = USBReadPortW (Uhc, Uhc->UsbHostControllerBaseAddress + USBCMD);\r
  CommandContent &= USBCMD_RS;\r
  USBWritePortW (Uhc, Uhc->UsbHostControllerBaseAddress + USBCMD, CommandContent);\r
\r
  //\r
  // ensure the HC is in halt status after send the stop command\r
  // Timeout is in us unit.\r
  //\r
  for (Index = 0; Index < (Timeout / 50) + 1; Index++) {\r
    UsbSts = USBReadPortW (Uhc, Uhc->UsbHostControllerBaseAddress + USBSTS);\r
\r
    if ((UsbSts & USBSTS_HCH) == USBSTS_HCH) {\r
      return EFI_SUCCESS;\r
    }\r
\r
    MicroSecondDelay (50);\r
  }\r
\r
  return EFI_TIMEOUT;\r
}\r
\r
/**\r
  One notified function to stop the Host Controller at the end of PEI\r
\r
  @param[in]  PeiServices        Pointer to PEI Services Table.\r
  @param[in]  NotifyDescriptor   Pointer to the descriptor for the Notification event that\r
                                 caused this function to execute.\r
  @param[in]  Ppi                Pointer to the PPI data associated with this function.\r
\r
  @retval     EFI_SUCCESS  The function completes successfully\r
  @retval     others\r
**/\r
EFI_STATUS\r
EFIAPI\r
UhcEndOfPei (\r
  IN EFI_PEI_SERVICES           **PeiServices,\r
  IN EFI_PEI_NOTIFY_DESCRIPTOR  *NotifyDescriptor,\r
  IN VOID                       *Ppi\r
  )\r
{\r
  USB_UHC_DEV   *Uhc;\r
\r
  Uhc = PEI_RECOVERY_USB_UHC_DEV_FROM_THIS_NOTIFY (NotifyDescriptor);\r
\r
  //\r
  // Stop the Host Controller\r
  //\r
  UhciStopHc (Uhc, 1000 * 1000);\r
\r
  return EFI_SUCCESS;\r
}\r
\r
/**\r
  Initializes Usb Host Controller.\r
\r
  @param  FileHandle  Handle of the file being invoked.\r
  @param  PeiServices Describes the list of possible PEI Services.\r
\r
  @retval EFI_SUCCESS            PPI successfully installed.\r
  @retval EFI_OUT_OF_RESOURCES   Can't allocate memory resource.\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
UhcPeimEntry (\r
  IN EFI_PEI_FILE_HANDLE        FileHandle,\r
  IN CONST EFI_PEI_SERVICES     **PeiServices\r
  )\r
{\r
  PEI_USB_CONTROLLER_PPI      *ChipSetUsbControllerPpi;\r
  EFI_STATUS                  Status;\r
  UINT8                       Index;\r
  UINTN                       ControllerType;\r
  UINTN                       BaseAddress;\r
  UINTN                       MemPages;\r
  USB_UHC_DEV                 *UhcDev;\r
  EFI_PHYSICAL_ADDRESS        TempPtr;\r
\r
  //\r
  // Shadow this PEIM to run from memory\r
  //\r
  if (!EFI_ERROR (PeiServicesRegisterForShadow (FileHandle))) {\r
    return EFI_SUCCESS;\r
  }\r
\r
  Status = PeiServicesLocatePpi (\r
             &gPeiUsbControllerPpiGuid,\r
             0,\r
             NULL,\r
             (VOID **) &ChipSetUsbControllerPpi\r
             );\r
  //\r
  // If failed to locate, it is a bug in dispather as depex has gPeiUsbControllerPpiGuid.\r
  //\r
  ASSERT_EFI_ERROR (Status);\r
\r
  Index = 0;\r
  while (TRUE) {\r
    Status = ChipSetUsbControllerPpi->GetUsbController (\r
                                        (EFI_PEI_SERVICES **) PeiServices,\r
                                        ChipSetUsbControllerPpi,\r
                                        Index,\r
                                        &ControllerType,\r
                                        &BaseAddress\r
                                        );\r
    //\r
    // When status is error, meant no controller is found\r
    //\r
    if (EFI_ERROR (Status)) {\r
      break;\r
    }\r
\r
    //\r
    // This PEIM is for UHC type controller.\r
    //\r
    if (ControllerType != PEI_UHCI_CONTROLLER) {\r
      Index++;\r
      continue;\r
    }\r
\r
    MemPages = sizeof (USB_UHC_DEV) / EFI_PAGE_SIZE + 1;\r
\r
    Status = PeiServicesAllocatePages (\r
               EfiBootServicesData,\r
               MemPages,\r
               &TempPtr\r
               );\r
    if (EFI_ERROR (Status)) {\r
      return EFI_OUT_OF_RESOURCES;\r
    }\r
\r
    UhcDev = (USB_UHC_DEV *) ((UINTN) TempPtr);\r
    UhcDev->Signature   = USB_UHC_DEV_SIGNATURE;\r
    IoMmuInit (&UhcDev->IoMmu);\r
    UhcDev->UsbHostControllerBaseAddress = (UINT32) BaseAddress;\r
\r
    //\r
    // Init local memory management service\r
    //\r
    Status = InitializeMemoryManagement (UhcDev);\r
    if (EFI_ERROR (Status)) {\r
      return Status;\r
    }\r
\r
    //\r
    // Initialize Uhc's hardware\r
    //\r
    Status = InitializeUsbHC (UhcDev);\r
    if (EFI_ERROR (Status)) {\r
      return Status;\r
    }\r
\r
    UhcDev->UsbHostControllerPpi.ControlTransfer          = UhcControlTransfer;\r
    UhcDev->UsbHostControllerPpi.BulkTransfer             = UhcBulkTransfer;\r
    UhcDev->UsbHostControllerPpi.GetRootHubPortNumber     = UhcGetRootHubPortNumber;\r
    UhcDev->UsbHostControllerPpi.GetRootHubPortStatus     = UhcGetRootHubPortStatus;\r
    UhcDev->UsbHostControllerPpi.SetRootHubPortFeature    = UhcSetRootHubPortFeature;\r
    UhcDev->UsbHostControllerPpi.ClearRootHubPortFeature  = UhcClearRootHubPortFeature;\r
\r
    UhcDev->PpiDescriptor.Flags = (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST);\r
    UhcDev->PpiDescriptor.Guid  = &gPeiUsbHostControllerPpiGuid;\r
    UhcDev->PpiDescriptor.Ppi   = &UhcDev->UsbHostControllerPpi;\r
\r
    Status = PeiServicesInstallPpi (&UhcDev->PpiDescriptor);\r
    if (EFI_ERROR (Status)) {\r
      Index++;\r
      continue;\r
    }\r
\r
    UhcDev->EndOfPeiNotifyList.Flags = (EFI_PEI_PPI_DESCRIPTOR_NOTIFY_CALLBACK | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST);\r
    UhcDev->EndOfPeiNotifyList.Guid = &gEfiEndOfPeiSignalPpiGuid;\r
    UhcDev->EndOfPeiNotifyList.Notify = UhcEndOfPei;\r
\r
    PeiServicesNotifyPpi (&UhcDev->EndOfPeiNotifyList);\r
\r
    Index++;\r
  }\r
\r
  return EFI_SUCCESS;\r
}\r
\r
/**\r
  Submits control transfer to a target USB device.\r
\r
  @param  PeiServices            The pointer of EFI_PEI_SERVICES.\r
  @param  This                   The pointer of PEI_USB_HOST_CONTROLLER_PPI.\r
  @param  DeviceAddress          The target device address.\r
  @param  DeviceSpeed            Target device speed.\r
  @param  MaximumPacketLength    Maximum packet size the default control transfer\r
                                 endpoint is capable of sending or receiving.\r
  @param  Request                USB device request to send.\r
  @param  TransferDirection      Specifies the data direction for the data stage.\r
  @param  Data                   Data buffer to be transmitted or received from USB device.\r
  @param  DataLength             The size (in bytes) of the data buffer.\r
  @param  TimeOut                Indicates the maximum timeout, in millisecond.\r
                                 If Timeout is 0, then the caller must wait for the function\r
                                 to be completed until EFI_SUCCESS or EFI_DEVICE_ERROR is returned.\r
  @param  TransferResult         Return the result of this control transfer.\r
\r
  @retval EFI_SUCCESS            Transfer was completed successfully.\r
  @retval EFI_OUT_OF_RESOURCES   The transfer failed due to lack of resources.\r
  @retval EFI_INVALID_PARAMETER  Some parameters are invalid.\r
  @retval EFI_TIMEOUT            Transfer failed due to timeout.\r
  @retval EFI_DEVICE_ERROR       Transfer failed due to host controller or device error.\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
UhcControlTransfer (\r
  IN     EFI_PEI_SERVICES               **PeiServices,\r
  IN     PEI_USB_HOST_CONTROLLER_PPI    *This,\r
  IN     UINT8                          DeviceAddress,\r
  IN     UINT8                          DeviceSpeed,\r
  IN     UINT8                          MaximumPacketLength,\r
  IN     EFI_USB_DEVICE_REQUEST         *Request,\r
  IN     EFI_USB_DATA_DIRECTION         TransferDirection,\r
  IN OUT VOID                           *Data                 OPTIONAL,\r
  IN OUT UINTN                          *DataLength           OPTIONAL,\r
  IN     UINTN                          TimeOut,\r
  OUT    UINT32                         *TransferResult\r
  )\r
{\r
  USB_UHC_DEV *UhcDev;\r
  UINT32      StatusReg;\r
  UINT8       PktID;\r
  QH_STRUCT   *PtrQH;\r
  TD_STRUCT   *PtrTD;\r
  TD_STRUCT   *PtrPreTD;\r
  TD_STRUCT   *PtrSetupTD;\r
  TD_STRUCT   *PtrStatusTD;\r
  EFI_STATUS  Status;\r
  UINT32      DataLen;\r
  UINT8       DataToggle;\r
  UINT8       *RequestPhy;\r
  VOID        *RequestMap;\r
  UINT8       *DataPhy;\r
  VOID        *DataMap;\r
\r
  UhcDev      = PEI_RECOVERY_USB_UHC_DEV_FROM_UHCI_THIS (This);\r
\r
  StatusReg   = UhcDev->UsbHostControllerBaseAddress + USBSTS;\r
\r
  PktID       = INPUT_PACKET_ID;\r
\r
  if (Request == NULL || TransferResult == NULL) {\r
    return EFI_INVALID_PARAMETER;\r
  }\r
  //\r
  // if errors exist that cause host controller halt,\r
  // then return EFI_DEVICE_ERROR.\r
  //\r
\r
  if (!IsStatusOK (UhcDev, StatusReg)) {\r
    ClearStatusReg (UhcDev, StatusReg);\r
    *TransferResult = EFI_USB_ERR_SYSTEM;\r
    return EFI_DEVICE_ERROR;\r
  }\r
\r
  ClearStatusReg (UhcDev, StatusReg);\r
\r
  //\r
  // Map the Request and data for bus master access,\r
  // then create a list of TD for this transfer\r
  //\r
  Status = UhciMapUserRequest (UhcDev, Request, &RequestPhy, &RequestMap);\r
  if (EFI_ERROR (Status)) {\r
    return Status;\r
  }\r
\r
  Status = UhciMapUserData (UhcDev, TransferDirection, Data, DataLength, &PktID, &DataPhy, &DataMap);\r
\r
  if (EFI_ERROR (Status)) {\r
    if (RequestMap != NULL) {\r
      IoMmuUnmap (UhcDev->IoMmu, RequestMap);\r
    }\r
    return Status;\r
  }\r
\r
  //\r
  // generate Setup Stage TD\r
  //\r
\r
  PtrQH = UhcDev->ConfigQH;\r
\r
  GenSetupStageTD (\r
    UhcDev,\r
    DeviceAddress,\r
    0,\r
    DeviceSpeed,\r
    (UINT8 *) Request,\r
    RequestPhy,\r
    (UINT8) sizeof (EFI_USB_DEVICE_REQUEST),\r
    &PtrSetupTD\r
    );\r
\r
  //\r
  // link setup TD structures to QH structure\r
  //\r
  LinkTDToQH (PtrQH, PtrSetupTD);\r
\r
  PtrPreTD = PtrSetupTD;\r
\r
  //\r
  //  Data Stage of Control Transfer\r
  //\r
\r
  if (TransferDirection == EfiUsbNoData) {\r
    DataLen = 0;\r
  } else {\r
    DataLen = (UINT32) *DataLength;\r
  }\r
\r
  DataToggle  = 1;\r
\r
  PtrTD       = PtrSetupTD;\r
  while (DataLen > 0) {\r
    //\r
    // create TD structures and link together\r
    //\r
    UINT8 PacketSize;\r
\r
    //\r
    // PacketSize is the data load size of each TD carries.\r
    //\r
    PacketSize = (UINT8) DataLen;\r
    if (DataLen > MaximumPacketLength) {\r
      PacketSize = MaximumPacketLength;\r
    }\r
\r
    GenDataTD (\r
      UhcDev,\r
      DeviceAddress,\r
      0,\r
      Data,\r
      DataPhy,\r
      PacketSize,\r
      PktID,\r
      DataToggle,\r
      DeviceSpeed,\r
      &PtrTD\r
      );\r
\r
    //\r
    // Link two TDs in vertical depth\r
    //\r
    LinkTDToTD (PtrPreTD, PtrTD);\r
    PtrPreTD = PtrTD;\r
\r
    DataToggle ^= 1;\r
    Data = (VOID *) ((UINT8 *) Data + PacketSize);\r
    DataPhy += PacketSize;\r
    DataLen -= PacketSize;\r
  }\r
\r
  //\r
  // PtrPreTD points to the last TD before the Setup-Stage TD.\r
  //\r
  PtrPreTD = PtrTD;\r
\r
  //\r
  // Status Stage of Control Transfer\r
  //\r
  if (PktID == OUTPUT_PACKET_ID) {\r
    PktID = INPUT_PACKET_ID;\r
  } else {\r
    PktID = OUTPUT_PACKET_ID;\r
  }\r
  //\r
  // create Status Stage TD structure\r
  //\r
  CreateStatusTD (\r
    UhcDev,\r
    DeviceAddress,\r
    0,\r
    PktID,\r
    DeviceSpeed,\r
    &PtrStatusTD\r
    );\r
\r
  LinkTDToTD (PtrPreTD, PtrStatusTD);\r
\r
  //\r
  // Poll QH-TDs execution and get result.\r
  // detail status is returned\r
  //\r
  Status = ExecuteControlTransfer (\r
            UhcDev,\r
            PtrSetupTD,\r
            DataLength,\r
            TimeOut,\r
            TransferResult\r
            );\r
\r
  //\r
  // TRUE means must search other framelistindex\r
  //\r
  SetQHVerticalValidorInvalid(PtrQH, FALSE);\r
  DeleteQueuedTDs (UhcDev, PtrSetupTD);\r
\r
  //\r
  // if has errors that cause host controller halt, then return EFI_DEVICE_ERROR directly.\r
  //\r
  if (!IsStatusOK (UhcDev, StatusReg)) {\r
    *TransferResult |= EFI_USB_ERR_SYSTEM;\r
    Status = EFI_DEVICE_ERROR;\r
  }\r
\r
  ClearStatusReg (UhcDev, StatusReg);\r
\r
  if (DataMap != NULL) {\r
    IoMmuUnmap (UhcDev->IoMmu, DataMap);\r
  }\r
  if (RequestMap != NULL) {\r
    IoMmuUnmap (UhcDev->IoMmu, RequestMap);\r
  }\r
\r
  return Status;\r
}\r
\r
/**\r
  Submits bulk transfer to a bulk endpoint of a USB device.\r
\r
  @param  PeiServices           The pointer of EFI_PEI_SERVICES.\r
  @param  This                  The pointer of PEI_USB_HOST_CONTROLLER_PPI.\r
  @param  DeviceAddress         Target device address.\r
  @param  EndPointAddress       Endpoint number and its direction in bit 7.\r
  @param  MaximumPacketLength   Maximum packet size the endpoint is capable of\r
                                sending or receiving.\r
  @param  Data                  Array of pointers to the buffers of data to transmit\r
                                from or receive into.\r
  @param  DataLength            The lenght of the data buffer.\r
  @param  DataToggle            On input, the initial data toggle for the transfer;\r
                                On output, it is updated to to next data toggle to use of\r
                                the subsequent bulk transfer.\r
  @param  TimeOut               Indicates the maximum time, in millisecond, which the\r
                                transfer is allowed to complete.\r
                                If Timeout is 0, then the caller must wait for the function\r
                                to be completed until EFI_SUCCESS or EFI_DEVICE_ERROR is returned.\r
  @param  TransferResult        A pointer to the detailed result information of the\r
                                bulk transfer.\r
\r
  @retval EFI_SUCCESS           The transfer was completed successfully.\r
  @retval EFI_OUT_OF_RESOURCES  The transfer failed due to lack of resource.\r
  @retval EFI_INVALID_PARAMETER Parameters are invalid.\r
  @retval EFI_TIMEOUT           The transfer failed due to timeout.\r
  @retval EFI_DEVICE_ERROR      The transfer failed due to host controller error.\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
UhcBulkTransfer (\r
  IN     EFI_PEI_SERVICES               **PeiServices,\r
  IN     PEI_USB_HOST_CONTROLLER_PPI    *This,\r
  IN     UINT8                          DeviceAddress,\r
  IN     UINT8                          EndPointAddress,\r
  IN     UINT8                          MaximumPacketLength,\r
  IN OUT VOID                           *Data,\r
  IN OUT UINTN                          *DataLength,\r
  IN OUT UINT8                          *DataToggle,\r
  IN     UINTN                          TimeOut,\r
  OUT    UINT32                         *TransferResult\r
  )\r
{\r
  USB_UHC_DEV             *UhcDev;\r
  UINT32                  StatusReg;\r
\r
  UINT32                  DataLen;\r
\r
  QH_STRUCT               *PtrQH;\r
  TD_STRUCT               *PtrFirstTD;\r
  TD_STRUCT               *PtrTD;\r
  TD_STRUCT               *PtrPreTD;\r
\r
  UINT8                   PktID;\r
\r
  BOOLEAN                 IsFirstTD;\r
\r
  EFI_STATUS              Status;\r
\r
  EFI_USB_DATA_DIRECTION  TransferDirection;\r
\r
  BOOLEAN                 ShortPacketEnable;\r
\r
  UINT16                  CommandContent;\r
\r
  UINT8                   *DataPhy;\r
  VOID                    *DataMap;\r
\r
  UhcDev = PEI_RECOVERY_USB_UHC_DEV_FROM_UHCI_THIS (This);\r
\r
  //\r
  // Enable the maximum packet size (64bytes)\r
  // that can be used for full speed bandwidth reclamation\r
  // at the end of a frame.\r
  //\r
  CommandContent = USBReadPortW (UhcDev, UhcDev->UsbHostControllerBaseAddress + USBCMD);\r
  if ((CommandContent & USBCMD_MAXP) != USBCMD_MAXP) {\r
    CommandContent |= USBCMD_MAXP;\r
    USBWritePortW (UhcDev, UhcDev->UsbHostControllerBaseAddress + USBCMD, CommandContent);\r
  }\r
\r
  StatusReg   = UhcDev->UsbHostControllerBaseAddress + USBSTS;\r
\r
  //\r
  // these code lines are added here per complier's strict demand\r
  //\r
  PktID             = INPUT_PACKET_ID;\r
  PtrTD             = NULL;\r
  PtrFirstTD        = NULL;\r
  PtrPreTD          = NULL;\r
  DataLen           = 0;\r
\r
  ShortPacketEnable = FALSE;\r
\r
  if ((DataLength == 0) || (Data == NULL) || (TransferResult == NULL)) {\r
    return EFI_INVALID_PARAMETER;\r
  }\r
\r
  if ((*DataToggle != 1) && (*DataToggle != 0)) {\r
    return EFI_INVALID_PARAMETER;\r
  }\r
\r
  if (MaximumPacketLength != 8 && MaximumPacketLength != 16\r
      && MaximumPacketLength != 32 && MaximumPacketLength != 64) {\r
    return EFI_INVALID_PARAMETER;\r
  }\r
  //\r
  // if has errors that cause host controller halt, then return EFI_DEVICE_ERROR directly.\r
  //\r
  if (!IsStatusOK (UhcDev, StatusReg)) {\r
\r
    ClearStatusReg (UhcDev, StatusReg);\r
    *TransferResult = EFI_USB_ERR_SYSTEM;\r
    return EFI_DEVICE_ERROR;\r
  }\r
\r
  ClearStatusReg (UhcDev, StatusReg);\r
\r
  //\r
  // Map the source data buffer for bus master access,\r
  // then create a list of TDs\r
  //\r
  if ((EndPointAddress & 0x80) != 0) {\r
    TransferDirection = EfiUsbDataIn;\r
  } else {\r
    TransferDirection = EfiUsbDataOut;\r
  }\r
\r
  Status = UhciMapUserData (UhcDev, TransferDirection, Data, DataLength, &PktID, &DataPhy, &DataMap);\r
\r
  if (EFI_ERROR (Status)) {\r
    return Status;\r
  }\r
\r
  DataLen = (UINT32) *DataLength;\r
\r
  PtrQH = UhcDev->BulkQH;\r
\r
  IsFirstTD = TRUE;\r
  while (DataLen > 0) {\r
    //\r
    // create TD structures and link together\r
    //\r
    UINT8 PacketSize;\r
\r
    PacketSize = (UINT8) DataLen;\r
    if (DataLen > MaximumPacketLength) {\r
      PacketSize = MaximumPacketLength;\r
    }\r
\r
    GenDataTD (\r
      UhcDev,\r
      DeviceAddress,\r
      EndPointAddress,\r
      Data,\r
      DataPhy,\r
      PacketSize,\r
      PktID,\r
      *DataToggle,\r
      USB_FULL_SPEED_DEVICE,\r
      &PtrTD\r
      );\r
\r
    //\r
    // Enable short packet detection.\r
    // (default action is disabling short packet detection)\r
    //\r
    if (ShortPacketEnable) {\r
      EnableorDisableTDShortPacket (PtrTD, TRUE);\r
    }\r
\r
    if (IsFirstTD) {\r
      PtrFirstTD            = PtrTD;\r
      PtrFirstTD->PtrNextTD = NULL;\r
      IsFirstTD             = FALSE;\r
    } else {\r
      //\r
      // Link two TDs in vertical depth\r
      //\r
      LinkTDToTD (PtrPreTD, PtrTD);\r
    }\r
\r
    PtrPreTD = PtrTD;\r
\r
    *DataToggle ^= 1;\r
    Data = (VOID *) ((UINT8 *) Data + PacketSize);\r
    DataPhy += PacketSize;\r
    DataLen -= PacketSize;\r
  }\r
  //\r
  // link TD structures to QH structure\r
  //\r
  LinkTDToQH (PtrQH, PtrFirstTD);\r
\r
  //\r
  // Execute QH-TD and get result\r
  //\r
  //\r
  // detail status is put into the Result field in the pIRP\r
  // the Data Toggle value is also re-updated to the value\r
  // of the last successful TD\r
  //\r
  Status = ExecBulkTransfer (\r
            UhcDev,\r
            PtrFirstTD,\r
            DataLength,\r
            DataToggle,\r
            TimeOut,\r
            TransferResult\r
            );\r
\r
  //\r
  // Delete Bulk transfer TD structure\r
  //\r
  DeleteQueuedTDs (UhcDev, PtrFirstTD);\r
\r
  //\r
  // if has errors that cause host controller halt, then return EFI_DEVICE_ERROR directly.\r
  //\r
  if (!IsStatusOK (UhcDev, StatusReg)) {\r
    *TransferResult |= EFI_USB_ERR_SYSTEM;\r
    Status = EFI_DEVICE_ERROR;\r
  }\r
\r
  ClearStatusReg (UhcDev, StatusReg);\r
\r
  if (DataMap != NULL) {\r
    IoMmuUnmap (UhcDev->IoMmu, DataMap);\r
  }\r
\r
  return Status;\r
}\r
\r
/**\r
  Retrieves the number of root hub ports.\r
\r
  @param[in]  PeiServices   The pointer to the PEI Services Table.\r
  @param[in]  This          The pointer to this instance of the\r
                            PEI_USB_HOST_CONTROLLER_PPI.\r
  @param[out] PortNumber    The pointer to the number of the root hub ports.\r
\r
  @retval EFI_SUCCESS           The port number was retrieved successfully.\r
  @retval EFI_INVALID_PARAMETER PortNumber is NULL.\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
UhcGetRootHubPortNumber (\r
  IN EFI_PEI_SERVICES               **PeiServices,\r
  IN PEI_USB_HOST_CONTROLLER_PPI    *This,\r
  OUT UINT8                         *PortNumber\r
  )\r
{\r
  USB_UHC_DEV *UhcDev;\r
  UINT32      PSAddr;\r
  UINT16      RHPortControl;\r
  UINT32      Index;\r
\r
  UhcDev = PEI_RECOVERY_USB_UHC_DEV_FROM_UHCI_THIS (This);\r
\r
  if (PortNumber == NULL) {\r
    return EFI_INVALID_PARAMETER;\r
  }\r
\r
  *PortNumber = 0;\r
\r
  for (Index = 0; Index < 2; Index++) {\r
    PSAddr = UhcDev->UsbHostControllerBaseAddress + USBPORTSC1 + Index * 2;\r
    RHPortControl = USBReadPortW (UhcDev, PSAddr);\r
    //\r
    // Port Register content is valid\r
    //\r
    if (RHPortControl != 0xff) {\r
      (*PortNumber)++;\r
    }\r
  }\r
\r
  return EFI_SUCCESS;\r
}\r
\r
/**\r
  Retrieves the current status of a USB root hub port.\r
\r
  @param  PeiServices            The pointer of EFI_PEI_SERVICES.\r
  @param  This                   The pointer of PEI_USB_HOST_CONTROLLER_PPI.\r
  @param  PortNumber             The root hub port to retrieve the state from.\r
  @param  PortStatus             Variable to receive the port state.\r
\r
  @retval EFI_SUCCESS            The status of the USB root hub port specified.\r
                                 by PortNumber was returned in PortStatus.\r
  @retval EFI_INVALID_PARAMETER  PortNumber is invalid.\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
UhcGetRootHubPortStatus (\r
  IN EFI_PEI_SERVICES               **PeiServices,\r
  IN PEI_USB_HOST_CONTROLLER_PPI    *This,\r
  IN  UINT8                         PortNumber,\r
  OUT EFI_USB_PORT_STATUS           *PortStatus\r
  )\r
{\r
  USB_UHC_DEV *UhcDev;\r
  UINT32      PSAddr;\r
  UINT16      RHPortStatus;\r
  UINT8       TotalPortNumber;\r
\r
  if (PortStatus == NULL) {\r
    return EFI_INVALID_PARAMETER;\r
  }\r
\r
  UhcGetRootHubPortNumber (PeiServices, This, &TotalPortNumber);\r
  if (PortNumber > TotalPortNumber) {\r
    return EFI_INVALID_PARAMETER;\r
  }\r
\r
  UhcDev                        = PEI_RECOVERY_USB_UHC_DEV_FROM_UHCI_THIS (This);\r
  PSAddr                        = UhcDev->UsbHostControllerBaseAddress + USBPORTSC1 + PortNumber * 2;\r
\r
  PortStatus->PortStatus        = 0;\r
  PortStatus->PortChangeStatus  = 0;\r
\r
  RHPortStatus = USBReadPortW (UhcDev, PSAddr);\r
\r
  //\r
  // Current Connect Status\r
  //\r
  if ((RHPortStatus & USBPORTSC_CCS) != 0) {\r
    PortStatus->PortStatus |= USB_PORT_STAT_CONNECTION;\r
  }\r
  //\r
  // Port Enabled/Disabled\r
  //\r
  if ((RHPortStatus & USBPORTSC_PED) != 0) {\r
    PortStatus->PortStatus |= USB_PORT_STAT_ENABLE;\r
  }\r
  //\r
  // Port Suspend\r
  //\r
  if ((RHPortStatus & USBPORTSC_SUSP) != 0) {\r
    PortStatus->PortStatus |= USB_PORT_STAT_SUSPEND;\r
  }\r
  //\r
  // Port Reset\r
  //\r
  if ((RHPortStatus & USBPORTSC_PR) != 0) {\r
    PortStatus->PortStatus |= USB_PORT_STAT_RESET;\r
  }\r
  //\r
  // Low Speed Device Attached\r
  //\r
  if ((RHPortStatus & USBPORTSC_LSDA) != 0) {\r
    PortStatus->PortStatus |= USB_PORT_STAT_LOW_SPEED;\r
  }\r
  //\r
  //   Fill Port Status Change bits\r
  //\r
  //\r
  // Connect Status Change\r
  //\r
  if ((RHPortStatus & USBPORTSC_CSC) != 0) {\r
    PortStatus->PortChangeStatus |= USB_PORT_STAT_C_CONNECTION;\r
  }\r
  //\r
  // Port Enabled/Disabled Change\r
  //\r
  if ((RHPortStatus & USBPORTSC_PEDC) != 0) {\r
    PortStatus->PortChangeStatus |= USB_PORT_STAT_C_ENABLE;\r
  }\r
\r
  return EFI_SUCCESS;\r
}\r
\r
/**\r
  Sets a feature for the specified root hub port.\r
\r
  @param  PeiServices           The pointer of EFI_PEI_SERVICES\r
  @param  This                  The pointer of PEI_USB_HOST_CONTROLLER_PPI\r
  @param  PortNumber            Root hub port to set.\r
  @param  PortFeature           Feature to set.\r
\r
  @retval EFI_SUCCESS            The feature specified by PortFeature was set.\r
  @retval EFI_INVALID_PARAMETER  PortNumber is invalid or PortFeature is invalid.\r
  @retval EFI_TIMEOUT            The time out occurred.\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
UhcSetRootHubPortFeature (\r
  IN EFI_PEI_SERVICES               **PeiServices,\r
  IN PEI_USB_HOST_CONTROLLER_PPI    *This,\r
  IN UINT8                          PortNumber,\r
  IN EFI_USB_PORT_FEATURE           PortFeature\r
  )\r
{\r
  USB_UHC_DEV *UhcDev;\r
  UINT32      PSAddr;\r
  UINT32      CommandRegAddr;\r
  UINT16      RHPortControl;\r
  UINT8       TotalPortNumber;\r
\r
  UhcGetRootHubPortNumber (PeiServices, This, &TotalPortNumber);\r
  if (PortNumber > TotalPortNumber) {\r
    return EFI_INVALID_PARAMETER;\r
  }\r
\r
  UhcDev          = PEI_RECOVERY_USB_UHC_DEV_FROM_UHCI_THIS (This);\r
  PSAddr          = UhcDev->UsbHostControllerBaseAddress + USBPORTSC1 + PortNumber * 2;\r
  CommandRegAddr  = UhcDev->UsbHostControllerBaseAddress + USBCMD;\r
\r
  RHPortControl = USBReadPortW (UhcDev, PSAddr);\r
\r
  switch (PortFeature) {\r
\r
  case EfiUsbPortSuspend:\r
    if ((USBReadPortW (UhcDev, CommandRegAddr) & USBCMD_EGSM) == 0) {\r
      //\r
      // if global suspend is not active, can set port suspend\r
      //\r
      RHPortControl &= 0xfff5;\r
      RHPortControl |= USBPORTSC_SUSP;\r
    }\r
    break;\r
\r
  case EfiUsbPortReset:\r
    RHPortControl &= 0xfff5;\r
    RHPortControl |= USBPORTSC_PR;\r
    //\r
    // Set the reset bit\r
    //\r
    break;\r
\r
  case EfiUsbPortPower:\r
    break;\r
\r
  case EfiUsbPortEnable:\r
    RHPortControl &= 0xfff5;\r
    RHPortControl |= USBPORTSC_PED;\r
    break;\r
\r
  default:\r
    return EFI_INVALID_PARAMETER;\r
  }\r
\r
  USBWritePortW (UhcDev, PSAddr, RHPortControl);\r
\r
  return EFI_SUCCESS;\r
}\r
\r
/**\r
  Clears a feature for the specified root hub port.\r
\r
  @param  PeiServices           The pointer of EFI_PEI_SERVICES.\r
  @param  This                  The pointer of PEI_USB_HOST_CONTROLLER_PPI.\r
  @param  PortNumber            Specifies the root hub port whose feature\r
                                is requested to be cleared.\r
  @param  PortFeature           Indicates the feature selector associated with the\r
                                feature clear request.\r
\r
  @retval EFI_SUCCESS            The feature specified by PortFeature was cleared\r
                                 for the USB root hub port specified by PortNumber.\r
  @retval EFI_INVALID_PARAMETER  PortNumber is invalid or PortFeature is invalid.\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
UhcClearRootHubPortFeature (\r
  IN EFI_PEI_SERVICES               **PeiServices,\r
  IN PEI_USB_HOST_CONTROLLER_PPI    *This,\r
  IN UINT8                          PortNumber,\r
  IN EFI_USB_PORT_FEATURE           PortFeature\r
  )\r
{\r
  USB_UHC_DEV *UhcDev;\r
  UINT32      PSAddr;\r
  UINT16      RHPortControl;\r
  UINT8       TotalPortNumber;\r
\r
  UhcGetRootHubPortNumber (PeiServices, This, &TotalPortNumber);\r
\r
  if (PortNumber > TotalPortNumber) {\r
    return EFI_INVALID_PARAMETER;\r
  }\r
\r
  UhcDev  = PEI_RECOVERY_USB_UHC_DEV_FROM_UHCI_THIS (This);\r
  PSAddr  = UhcDev->UsbHostControllerBaseAddress + USBPORTSC1 + PortNumber * 2;\r
\r
  RHPortControl = USBReadPortW (UhcDev, PSAddr);\r
\r
  switch (PortFeature) {\r
  //\r
  // clear PORT_ENABLE feature means disable port.\r
  //\r
  case EfiUsbPortEnable:\r
    RHPortControl &= 0xfff5;\r
    RHPortControl &= ~USBPORTSC_PED;\r
    break;\r
\r
  //\r
  // clear PORT_SUSPEND feature means resume the port.\r
  // (cause a resume on the specified port if in suspend mode)\r
  //\r
  case EfiUsbPortSuspend:\r
    RHPortControl &= 0xfff5;\r
    RHPortControl &= ~USBPORTSC_SUSP;\r
    break;\r
\r
  //\r
  // no operation\r
  //\r
  case EfiUsbPortPower:\r
    break;\r
\r
  //\r
  // clear PORT_RESET means clear the reset signal.\r
  //\r
  case EfiUsbPortReset:\r
    RHPortControl &= 0xfff5;\r
    RHPortControl &= ~USBPORTSC_PR;\r
    break;\r
\r
  //\r
  // clear connect status change\r
  //\r
  case EfiUsbPortConnectChange:\r
    RHPortControl &= 0xfff5;\r
    RHPortControl |= USBPORTSC_CSC;\r
    break;\r
\r
  //\r
  // clear enable/disable status change\r
  //\r
  case EfiUsbPortEnableChange:\r
    RHPortControl &= 0xfff5;\r
    RHPortControl |= USBPORTSC_PEDC;\r
    break;\r
\r
  //\r
  // root hub does not support this request\r
  //\r
  case EfiUsbPortSuspendChange:\r
    break;\r
\r
  //\r
  // root hub does not support this request\r
  //\r
  case EfiUsbPortOverCurrentChange:\r
    break;\r
\r
  //\r
  // root hub does not support this request\r
  //\r
  case EfiUsbPortResetChange:\r
    break;\r
\r
  default:\r
    return EFI_INVALID_PARAMETER;\r
  }\r
\r
  USBWritePortW (UhcDev, PSAddr, RHPortControl);\r
\r
  return EFI_SUCCESS;\r
}\r
\r
/**\r
  Initialize UHCI.\r
\r
  @param  UhcDev                 UHCI Device.\r
\r
  @retval EFI_SUCCESS            UHCI successfully initialized.\r
  @retval EFI_OUT_OF_RESOURCES   Resource can not be allocated.\r
\r
**/\r
EFI_STATUS\r
InitializeUsbHC (\r
  IN USB_UHC_DEV          *UhcDev\r
  )\r
{\r
  EFI_STATUS  Status;\r
  UINT32      FrameListBaseAddrReg;\r
  UINT32      CommandReg;\r
  UINT16      Command;\r
\r
  //\r
  // Create and Initialize Frame List For the Host Controller.\r
  //\r
  Status = CreateFrameList (UhcDev);\r
  if (EFI_ERROR (Status)) {\r
    return Status;\r
  }\r
\r
  FrameListBaseAddrReg  = UhcDev->UsbHostControllerBaseAddress + USBFLBASEADD;\r
  CommandReg            = UhcDev->UsbHostControllerBaseAddress + USBCMD;\r
\r
  //\r
  // Set Frame List Base Address to the specific register to inform the hardware.\r
  //\r
  SetFrameListBaseAddress (UhcDev, FrameListBaseAddrReg, (UINT32) (UINTN) (UhcDev->FrameListEntry));\r
\r
  Command = USBReadPortW (UhcDev, CommandReg);\r
  Command |= USBCMD_GRESET;\r
  USBWritePortW (UhcDev, CommandReg, Command);\r
\r
  MicroSecondDelay (50 * 1000);\r
\r
\r
  Command &= ~USBCMD_GRESET;\r
\r
  USBWritePortW (UhcDev, CommandReg, Command);\r
\r
  //\r
  //UHCI spec page120 reset recovery time\r
  //\r
  MicroSecondDelay (20 * 1000);\r
\r
  //\r
  // Set Run/Stop bit to 1.\r
  //\r
  Command = USBReadPortW (UhcDev, CommandReg);\r
  Command |= USBCMD_RS | USBCMD_MAXP;\r
  USBWritePortW (UhcDev, CommandReg, Command);\r
\r
  return EFI_SUCCESS;\r
}\r
\r
/**\r
  Create Frame List Structure.\r
\r
  @param  UhcDev                 UHCI device.\r
\r
  @retval EFI_OUT_OF_RESOURCES   Can't allocate memory resources.\r
  @retval EFI_SUCCESS            Success.\r
\r
**/\r
EFI_STATUS\r
CreateFrameList (\r
  USB_UHC_DEV             *UhcDev\r
  )\r
{\r
  EFI_STATUS            Status;\r
  EFI_PHYSICAL_ADDRESS  FrameListBaseAddr;\r
  FRAMELIST_ENTRY       *FrameListPtr;\r
  UINTN                 Index;\r
\r
  //\r
  // The Frame List ocupies 4K bytes,\r
  // and must be aligned on 4-Kbyte boundaries.\r
  //\r
  Status = PeiServicesAllocatePages (\r
             EfiBootServicesData,\r
             1,\r
             &FrameListBaseAddr\r
             );\r
\r
  if (Status != EFI_SUCCESS) {\r
    return EFI_OUT_OF_RESOURCES;\r
  }\r
\r
  //\r
  //Create Control QH and Bulk QH and link them into Framelist Entry\r
  //\r
  Status = CreateQH(UhcDev, &UhcDev->ConfigQH);\r
  if (Status != EFI_SUCCESS) {\r
    return EFI_OUT_OF_RESOURCES;\r
  }\r
  ASSERT (UhcDev->ConfigQH != NULL);\r
\r
  Status = CreateQH(UhcDev, &UhcDev->BulkQH);\r
  if (Status != EFI_SUCCESS) {\r
    return EFI_OUT_OF_RESOURCES;\r
  }\r
  ASSERT (UhcDev->BulkQH != NULL);\r
\r
  //\r
  //Set the corresponding QH pointer\r
  //\r
  SetQHHorizontalLinkPtr(UhcDev->ConfigQH, UhcDev->BulkQH);\r
  SetQHHorizontalQHorTDSelect (UhcDev->ConfigQH, TRUE);\r
  SetQHHorizontalValidorInvalid (UhcDev->ConfigQH, TRUE);\r
\r
  UhcDev->FrameListEntry = (FRAMELIST_ENTRY *) ((UINTN) FrameListBaseAddr);\r
\r
  FrameListPtr = UhcDev->FrameListEntry;\r
\r
  for (Index = 0; Index < 1024; Index++) {\r
    FrameListPtr->FrameListPtrTerminate = 0;\r
    FrameListPtr->FrameListPtr          = (UINT32)(UINTN)UhcDev->ConfigQH >> 4;\r
    FrameListPtr->FrameListPtrQSelect   = 1;\r
    FrameListPtr->FrameListRsvd         = 0;\r
    FrameListPtr ++;\r
  }\r
\r
  return EFI_SUCCESS;\r
}\r
\r
/**\r
  Read a 16bit width data from Uhc HC IO space register.\r
\r
  @param  UhcDev  The UHCI device.\r
  @param  Port    The IO space address of the register.\r
\r
  @retval the register content read.\r
\r
**/\r
UINT16\r
USBReadPortW (\r
  IN  USB_UHC_DEV   *UhcDev,\r
  IN  UINT32        Port\r
  )\r
{\r
  return IoRead16 (Port);\r
}\r
\r
/**\r
  Write a 16bit width data into Uhc HC IO space register.\r
\r
  @param  UhcDev  The UHCI device.\r
  @param  Port    The IO space address of the register.\r
  @param  Data    The data written into the register.\r
\r
**/\r
VOID\r
USBWritePortW (\r
  IN  USB_UHC_DEV   *UhcDev,\r
  IN  UINT32        Port,\r
  IN  UINT16        Data\r
  )\r
{\r
  IoWrite16 (Port, Data);\r
}\r
\r
/**\r
  Write a 32bit width data into Uhc HC IO space register.\r
\r
  @param  UhcDev  The UHCI device.\r
  @param  Port    The IO space address of the register.\r
  @param  Data    The data written into the register.\r
\r
**/\r
VOID\r
USBWritePortDW (\r
  IN  USB_UHC_DEV   *UhcDev,\r
  IN  UINT32        Port,\r
  IN  UINT32        Data\r
  )\r
{\r
  IoWrite32 (Port, Data);\r
}\r
\r
/**\r
  Clear the content of UHCI's Status Register.\r
\r
  @param  UhcDev       The UHCI device.\r
  @param  StatusAddr   The IO space address of the register.\r
\r
**/\r
VOID\r
ClearStatusReg (\r
  IN  USB_UHC_DEV   *UhcDev,\r
  IN  UINT32        StatusAddr\r
  )\r
{\r
  //\r
  // Clear the content of UHCI's Status Register\r
  //\r
  USBWritePortW (UhcDev, StatusAddr, 0x003F);\r
}\r
\r
/**\r
  Check whether the host controller operates well.\r
\r
  @param  UhcDev        The UHCI device.\r
  @param  StatusRegAddr The io address of status register.\r
\r
  @retval TRUE          Host controller is working.\r
  @retval FALSE         Host controller is halted or system error.\r
\r
**/\r
BOOLEAN\r
IsStatusOK (\r
  IN USB_UHC_DEV     *UhcDev,\r
  IN UINT32          StatusRegAddr\r
  )\r
{\r
  UINT16  StatusValue;\r
\r
  StatusValue = USBReadPortW (UhcDev, StatusRegAddr);\r
\r
  if ((StatusValue & (USBSTS_HCPE | USBSTS_HSE | USBSTS_HCH)) != 0) {\r
    return FALSE;\r
  } else {\r
    return TRUE;\r
  }\r
}\r
\r
\r
\r
/**\r
  Set Frame List Base Address.\r
\r
  @param  UhcDev           The UHCI device.\r
  @param  FrameListRegAddr The address of frame list register.\r
  @param  Addr             The address of frame list table.\r
\r
**/\r
VOID\r
SetFrameListBaseAddress (\r
  IN USB_UHC_DEV   *UhcDev,\r
  IN UINT32        FrameListRegAddr,\r
  IN UINT32        Addr\r
  )\r
{\r
  //\r
  // Sets value in the USB Frame List Base Address register.\r
  //\r
  USBWritePortDW (UhcDev, FrameListRegAddr, (UINT32) (Addr & 0xFFFFF000));\r
}\r
\r
/**\r
  Create QH and initialize.\r
\r
  @param  UhcDev               The UHCI device.\r
  @param  PtrQH                Place to store QH_STRUCT pointer.\r
\r
  @retval EFI_OUT_OF_RESOURCES Can't allocate memory resources.\r
  @retval EFI_SUCCESS        Success.\r
\r
**/\r
EFI_STATUS\r
CreateQH (\r
  IN  USB_UHC_DEV   *UhcDev,\r
  OUT QH_STRUCT     **PtrQH\r
  )\r
{\r
  EFI_STATUS  Status;\r
\r
  //\r
  // allocate align memory for QH_STRUCT\r
  //\r
  Status = AllocateTDorQHStruct (UhcDev, sizeof(QH_STRUCT), (void **)PtrQH);\r
  if (EFI_ERROR (Status)) {\r
    return EFI_OUT_OF_RESOURCES;\r
  }\r
  //\r
  // init each field of the QH_STRUCT\r
  //\r
  SetQHHorizontalValidorInvalid (*PtrQH, FALSE);\r
  SetQHVerticalValidorInvalid (*PtrQH, FALSE);\r
\r
  return EFI_SUCCESS;\r
}\r
\r
/**\r
  Set the horizontal link pointer in QH.\r
\r
  @param  PtrQH               Place to store QH_STRUCT pointer.\r
  @param  PtrNext             Place to the next QH_STRUCT.\r
\r
**/\r
VOID\r
SetQHHorizontalLinkPtr (\r
  IN QH_STRUCT  *PtrQH,\r
  IN VOID       *PtrNext\r
  )\r
{\r
  //\r
  // Since the QH_STRUCT is aligned on 16-byte boundaries,\r
  // Only the highest 28bit of the address is valid\r
  // (take 32bit address as an example).\r
  //\r
  PtrQH->QueueHead.QHHorizontalPtr = (UINT32) (UINTN) PtrNext >> 4;\r
}\r
\r
\r
\r
/**\r
  Set a QH or TD horizontally to be connected with a specific QH.\r
\r
  @param  PtrQH      Place to store QH_STRUCT pointer.\r
  @param  IsQH       Specify QH or TD is connected.\r
\r
**/\r
VOID\r
SetQHHorizontalQHorTDSelect (\r
  IN QH_STRUCT  *PtrQH,\r
  IN BOOLEAN    IsQH\r
  )\r
{\r
  //\r
  // if QH is connected, the specified bit is set,\r
  // if TD is connected, the specified bit is cleared.\r
  //\r
  PtrQH->QueueHead.QHHorizontalQSelect = IsQH ? 1 : 0;\r
}\r
\r
/**\r
  Set the horizontal validor bit in QH.\r
\r
  @param  PtrQH      Place to store QH_STRUCT pointer.\r
  @param  IsValid    Specify the horizontal linker is valid or not.\r
\r
**/\r
VOID\r
SetQHHorizontalValidorInvalid (\r
  IN QH_STRUCT  *PtrQH,\r
  IN BOOLEAN    IsValid\r
  )\r
{\r
  //\r
  // Valid means the horizontal link pointer is valid,\r
  // else, it's invalid.\r
  //\r
  PtrQH->QueueHead.QHHorizontalTerminate = IsValid ? 0 : 1;\r
}\r
\r
/**\r
  Set the vertical link pointer in QH.\r
\r
  @param  PtrQH       Place to store QH_STRUCT pointer.\r
  @param  PtrNext     Place to the next QH_STRUCT.\r
\r
**/\r
VOID\r
SetQHVerticalLinkPtr (\r
  IN QH_STRUCT  *PtrQH,\r
  IN VOID       *PtrNext\r
  )\r
{\r
  //\r
  // Since the QH_STRUCT is aligned on 16-byte boundaries,\r
  // Only the highest 28bit of the address is valid\r
  // (take 32bit address as an example).\r
  //\r
  PtrQH->QueueHead.QHVerticalPtr = (UINT32) (UINTN) PtrNext >> 4;\r
}\r
\r
/**\r
  Set a QH or TD vertically to be connected with a specific QH.\r
\r
  @param  PtrQH      Place to store QH_STRUCT pointer.\r
  @param  IsQH       Specify QH or TD is connected.\r
\r
**/\r
VOID\r
SetQHVerticalQHorTDSelect (\r
  IN QH_STRUCT  *PtrQH,\r
  IN BOOLEAN    IsQH\r
  )\r
{\r
  //\r
  // Set the specified bit if the Vertical Link Pointer pointing to a QH,\r
  // Clear the specified bit if the Vertical Link Pointer pointing to a TD.\r
  //\r
  PtrQH->QueueHead.QHVerticalQSelect = IsQH ? 1 : 0;\r
}\r
\r
/**\r
  Set the vertical validor bit in QH.\r
\r
  @param  PtrQH      Place to store QH_STRUCT pointer.\r
  @param  IsValid    Specify the vertical linker is valid or not.\r
\r
**/\r
VOID\r
SetQHVerticalValidorInvalid (\r
  IN QH_STRUCT  *PtrQH,\r
  IN BOOLEAN    IsValid\r
  )\r
{\r
  //\r
  // If TRUE, meaning the Vertical Link Pointer field is valid,\r
  // else, the field is invalid.\r
  //\r
  PtrQH->QueueHead.QHVerticalTerminate = IsValid ? 0 : 1;\r
}\r
\r
\r
\r
/**\r
  Allocate TD or QH Struct.\r
\r
  @param  UhcDev                 The UHCI device.\r
  @param  Size                   The size of allocation.\r
  @param  PtrStruct              Place to store TD_STRUCT pointer.\r
\r
  @return EFI_SUCCESS            Allocate successfully.\r
  @retval EFI_OUT_OF_RESOURCES   Can't allocate memory resource.\r
\r
**/\r
EFI_STATUS\r
AllocateTDorQHStruct (\r
  IN  USB_UHC_DEV     *UhcDev,\r
  IN  UINT32          Size,\r
  OUT VOID            **PtrStruct\r
  )\r
{\r
  EFI_STATUS  Status;\r
\r
  Status      = EFI_SUCCESS;\r
  *PtrStruct  = NULL;\r
\r
  Status = UhcAllocatePool (\r
            UhcDev,\r
            (UINT8 **) PtrStruct,\r
            Size\r
            );\r
  if (EFI_ERROR (Status)) {\r
    return Status;\r
  }\r
\r
  ZeroMem (*PtrStruct, Size);\r
\r
  return Status;\r
}\r
\r
/**\r
  Create a TD Struct.\r
\r
  @param  UhcDev                 The UHCI device.\r
  @param  PtrTD                  Place to store TD_STRUCT pointer.\r
\r
  @return EFI_SUCCESS            Allocate successfully.\r
  @retval EFI_OUT_OF_RESOURCES   Can't allocate memory resource.\r
\r
**/\r
EFI_STATUS\r
CreateTD (\r
  IN  USB_UHC_DEV     *UhcDev,\r
  OUT TD_STRUCT       **PtrTD\r
  )\r
{\r
  EFI_STATUS  Status;\r
  //\r
  // create memory for TD_STRUCT, and align the memory.\r
  //\r
  Status = AllocateTDorQHStruct (UhcDev, sizeof(TD_STRUCT), (void **)PtrTD);\r
  if (EFI_ERROR (Status)) {\r
    return Status;\r
  }\r
\r
  //\r
  // Make TD ready.\r
  //\r
  SetTDLinkPtrValidorInvalid (*PtrTD, FALSE);\r
\r
  return EFI_SUCCESS;\r
}\r
\r
/**\r
  Generate Setup Stage TD.\r
\r
  @param  UhcDev       The UHCI device.\r
  @param  DevAddr      Device address.\r
  @param  Endpoint     Endpoint number.\r
  @param  DeviceSpeed  Device Speed.\r
  @param  DevRequest   CPU memory address of request structure buffer to transfer.\r
  @param  RequestPhy   PCI memory address of request structure buffer to transfer.\r
  @param  RequestLen   Request length.\r
  @param  PtrTD        TD_STRUCT generated.\r
\r
  @return EFI_SUCCESS            Generate setup stage TD successfully.\r
  @retval EFI_OUT_OF_RESOURCES   Can't allocate memory resource.\r
\r
**/\r
EFI_STATUS\r
GenSetupStageTD (\r
  IN  USB_UHC_DEV     *UhcDev,\r
  IN  UINT8           DevAddr,\r
  IN  UINT8           Endpoint,\r
  IN  UINT8           DeviceSpeed,\r
  IN  UINT8           *DevRequest,\r
  IN  UINT8           *RequestPhy,\r
  IN  UINT8           RequestLen,\r
  OUT TD_STRUCT       **PtrTD\r
  )\r
{\r
  TD_STRUCT   *TdStruct;\r
  EFI_STATUS  Status;\r
\r
  Status = CreateTD (UhcDev, &TdStruct);\r
  if (EFI_ERROR (Status)) {\r
    return Status;\r
  }\r
\r
  SetTDLinkPtr (TdStruct, NULL);\r
\r
  //\r
  // Depth first fashion\r
  //\r
  SetTDLinkPtrDepthorBreadth (TdStruct, TRUE);\r
\r
  //\r
  // initialize as the last TD in the QH context,\r
  // this field will be updated in the TD linkage process.\r
  //\r
  SetTDLinkPtrValidorInvalid (TdStruct, FALSE);\r
\r
  //\r
  // Disable Short Packet Detection by default\r
  //\r
  EnableorDisableTDShortPacket (TdStruct, FALSE);\r
\r
  //\r
  // Max error counter is 3, retry 3 times when error encountered.\r
  //\r
  SetTDControlErrorCounter (TdStruct, 3);\r
\r
  //\r
  // set device speed attribute\r
  // (TRUE - Slow Device; FALSE - Full Speed Device)\r
  //\r
  switch (DeviceSpeed) {\r
  case USB_SLOW_SPEED_DEVICE:\r
    SetTDLoworFullSpeedDevice (TdStruct, TRUE);\r
    break;\r
\r
  case USB_FULL_SPEED_DEVICE:\r
    SetTDLoworFullSpeedDevice (TdStruct, FALSE);\r
    break;\r
  }\r
  //\r
  // Non isochronous transfer TD\r
  //\r
  SetTDControlIsochronousorNot (TdStruct, FALSE);\r
\r
  //\r
  // Interrupt On Complete bit be set to zero,\r
  // Disable IOC interrupt.\r
  //\r
  SetorClearTDControlIOC (TdStruct, FALSE);\r
\r
  //\r
  // Set TD Active bit\r
  //\r
  SetTDStatusActiveorInactive (TdStruct, TRUE);\r
\r
  SetTDTokenMaxLength (TdStruct, RequestLen);\r
\r
  SetTDTokenDataToggle0 (TdStruct);\r
\r
  SetTDTokenEndPoint (TdStruct, Endpoint);\r
\r
  SetTDTokenDeviceAddress (TdStruct, DevAddr);\r
\r
  SetTDTokenPacketID (TdStruct, SETUP_PACKET_ID);\r
\r
  TdStruct->PtrTDBuffer      = (UINT8 *) DevRequest;\r
  TdStruct->TDBufferLength = RequestLen;\r
  //\r
  // Set the beginning address of the buffer that will be used\r
  // during the transaction.\r
  //\r
  TdStruct->TDData.TDBufferPtr = (UINT32) (UINTN) RequestPhy;\r
\r
  *PtrTD = TdStruct;\r
\r
  return EFI_SUCCESS;\r
}\r
\r
/**\r
  Generate Data Stage TD.\r
\r
  @param  UhcDev       The UHCI device.\r
  @param  DevAddr      Device address.\r
  @param  Endpoint     Endpoint number.\r
  @param  PtrData      CPU memory address of user data buffer to transfer.\r
  @param  DataPhy      PCI memory address of user data buffer to transfer.\r
  @param  Len          Data length.\r
  @param  PktID        PacketID.\r
  @param  Toggle       Data toggle value.\r
  @param  DeviceSpeed  Device Speed.\r
  @param  PtrTD        TD_STRUCT generated.\r
\r
  @return EFI_SUCCESS            Generate data stage TD successfully.\r
  @retval EFI_OUT_OF_RESOURCES   Can't allocate memory resource.\r
\r
**/\r
EFI_STATUS\r
GenDataTD (\r
  IN  USB_UHC_DEV     *UhcDev,\r
  IN  UINT8           DevAddr,\r
  IN  UINT8           Endpoint,\r
  IN  UINT8           *PtrData,\r
  IN  UINT8           *DataPhy,\r
  IN  UINT8           Len,\r
  IN  UINT8           PktID,\r
  IN  UINT8           Toggle,\r
  IN  UINT8           DeviceSpeed,\r
  OUT TD_STRUCT       **PtrTD\r
  )\r
{\r
  TD_STRUCT   *TdStruct;\r
  EFI_STATUS  Status;\r
\r
  Status = CreateTD (UhcDev, &TdStruct);\r
  if (EFI_ERROR (Status)) {\r
    return Status;\r
  }\r
\r
  SetTDLinkPtr (TdStruct, NULL);\r
\r
  //\r
  // Depth first fashion\r
  //\r
  SetTDLinkPtrDepthorBreadth (TdStruct, TRUE);\r
\r
  //\r
  // Link pointer pointing to TD struct\r
  //\r
  SetTDLinkPtrQHorTDSelect (TdStruct, FALSE);\r
\r
  //\r
  // initialize as the last TD in the QH context,\r
  // this field will be updated in the TD linkage process.\r
  //\r
  SetTDLinkPtrValidorInvalid (TdStruct, FALSE);\r
\r
  //\r
  // Disable short packet detect\r
  //\r
  EnableorDisableTDShortPacket (TdStruct, FALSE);\r
  //\r
  // Max error counter is 3\r
  //\r
  SetTDControlErrorCounter (TdStruct, 3);\r
\r
  //\r
  // set device speed attribute\r
  // (TRUE - Slow Device; FALSE - Full Speed Device)\r
  //\r
  switch (DeviceSpeed) {\r
  case USB_SLOW_SPEED_DEVICE:\r
    SetTDLoworFullSpeedDevice (TdStruct, TRUE);\r
    break;\r
\r
  case USB_FULL_SPEED_DEVICE:\r
    SetTDLoworFullSpeedDevice (TdStruct, FALSE);\r
    break;\r
  }\r
  //\r
  // Non isochronous transfer TD\r
  //\r
  SetTDControlIsochronousorNot (TdStruct, FALSE);\r
\r
  //\r
  // Disable Interrupt On Complete\r
  // Disable IOC interrupt.\r
  //\r
  SetorClearTDControlIOC (TdStruct, FALSE);\r
\r
  //\r
  // Set Active bit\r
  //\r
  SetTDStatusActiveorInactive (TdStruct, TRUE);\r
\r
  SetTDTokenMaxLength (TdStruct, Len);\r
\r
  if (Toggle != 0) {\r
    SetTDTokenDataToggle1 (TdStruct);\r
  } else {\r
    SetTDTokenDataToggle0 (TdStruct);\r
  }\r
\r
  SetTDTokenEndPoint (TdStruct, Endpoint);\r
\r
  SetTDTokenDeviceAddress (TdStruct, DevAddr);\r
\r
  SetTDTokenPacketID (TdStruct, PktID);\r
\r
  TdStruct->PtrTDBuffer      = (UINT8 *) PtrData;\r
  TdStruct->TDBufferLength = Len;\r
  //\r
  // Set the beginning address of the buffer that will be used\r
  // during the transaction.\r
  //\r
  TdStruct->TDData.TDBufferPtr = (UINT32) (UINTN) DataPhy;\r
\r
  *PtrTD = TdStruct;\r
\r
  return EFI_SUCCESS;\r
}\r
\r
/**\r
  Generate Status Stage TD.\r
\r
  @param  UhcDev       The UHCI device.\r
  @param  DevAddr      Device address.\r
  @param  Endpoint     Endpoint number.\r
  @param  PktID        PacketID.\r
  @param  DeviceSpeed  Device Speed.\r
  @param  PtrTD        TD_STRUCT generated.\r
\r
  @return EFI_SUCCESS            Generate status stage TD successfully.\r
  @retval EFI_OUT_OF_RESOURCES   Can't allocate memory resource.\r
\r
**/\r
EFI_STATUS\r
CreateStatusTD (\r
  IN  USB_UHC_DEV     *UhcDev,\r
  IN  UINT8           DevAddr,\r
  IN  UINT8           Endpoint,\r
  IN  UINT8           PktID,\r
  IN  UINT8           DeviceSpeed,\r
  OUT TD_STRUCT       **PtrTD\r
  )\r
{\r
  TD_STRUCT   *PtrTDStruct;\r
  EFI_STATUS  Status;\r
\r
  Status = CreateTD (UhcDev, &PtrTDStruct);\r
  if (EFI_ERROR (Status)) {\r
    return Status;\r
  }\r
\r
  SetTDLinkPtr (PtrTDStruct, NULL);\r
\r
  //\r
  // Depth first fashion\r
  //\r
  SetTDLinkPtrDepthorBreadth (PtrTDStruct, TRUE);\r
\r
  //\r
  // initialize as the last TD in the QH context,\r
  // this field will be updated in the TD linkage process.\r
  //\r
  SetTDLinkPtrValidorInvalid (PtrTDStruct, FALSE);\r
\r
  //\r
  // Disable short packet detect\r
  //\r
  EnableorDisableTDShortPacket (PtrTDStruct, FALSE);\r
\r
  //\r
  // Max error counter is 3\r
  //\r
  SetTDControlErrorCounter (PtrTDStruct, 3);\r
\r
  //\r
  // set device speed attribute\r
  // (TRUE - Slow Device; FALSE - Full Speed Device)\r
  //\r
  switch (DeviceSpeed) {\r
  case USB_SLOW_SPEED_DEVICE:\r
    SetTDLoworFullSpeedDevice (PtrTDStruct, TRUE);\r
    break;\r
\r
  case USB_FULL_SPEED_DEVICE:\r
    SetTDLoworFullSpeedDevice (PtrTDStruct, FALSE);\r
    break;\r
  }\r
  //\r
  // Non isochronous transfer TD\r
  //\r
  SetTDControlIsochronousorNot (PtrTDStruct, FALSE);\r
\r
  //\r
  // Disable Interrupt On Complete\r
  // Disable IOC interrupt.\r
  //\r
  SetorClearTDControlIOC (PtrTDStruct, FALSE);\r
\r
  //\r
  // Set TD Active bit\r
  //\r
  SetTDStatusActiveorInactive (PtrTDStruct, TRUE);\r
\r
  SetTDTokenMaxLength (PtrTDStruct, 0);\r
\r
  SetTDTokenDataToggle1 (PtrTDStruct);\r
\r
  SetTDTokenEndPoint (PtrTDStruct, Endpoint);\r
\r
  SetTDTokenDeviceAddress (PtrTDStruct, DevAddr);\r
\r
  SetTDTokenPacketID (PtrTDStruct, PktID);\r
\r
  PtrTDStruct->PtrTDBuffer      = NULL;\r
  PtrTDStruct->TDBufferLength = 0;\r
  //\r
  // Set the beginning address of the buffer that will be used\r
  // during the transaction.\r
  //\r
  PtrTDStruct->TDData.TDBufferPtr = 0;\r
\r
  *PtrTD = PtrTDStruct;\r
\r
  return EFI_SUCCESS;\r
}\r
\r
/**\r
  Set the link pointer validor bit in TD.\r
\r
  @param  PtrTDStruct  Place to store TD_STRUCT pointer.\r
  @param  IsValid      Specify the linker pointer is valid or not.\r
\r
**/\r
VOID\r
SetTDLinkPtrValidorInvalid (\r
  IN  TD_STRUCT *PtrTDStruct,\r
  IN  BOOLEAN   IsValid\r
  )\r
{\r
  //\r
  // Valid means the link pointer is valid,\r
  // else, it's invalid.\r
  //\r
  PtrTDStruct->TDData.TDLinkPtrTerminate = (IsValid ? 0 : 1);\r
}\r
\r
/**\r
  Set the Link Pointer pointing to a QH or TD.\r
\r
  @param  PtrTDStruct   Place to store TD_STRUCT pointer.\r
  @param  IsQH          Specify QH or TD is connected.\r
\r
**/\r
VOID\r
SetTDLinkPtrQHorTDSelect (\r
  IN  TD_STRUCT *PtrTDStruct,\r
  IN  BOOLEAN   IsQH\r
  )\r
{\r
  //\r
  // Indicate whether the Link Pointer pointing to a QH or TD\r
  //\r
  PtrTDStruct->TDData.TDLinkPtrQSelect = (IsQH ? 1 : 0);\r
}\r
\r
/**\r
  Set the traverse is depth-first or breadth-first.\r
\r
  @param  PtrTDStruct   Place to store TD_STRUCT pointer.\r
  @param  IsDepth       Specify the traverse is depth-first or breadth-first.\r
\r
**/\r
VOID\r
SetTDLinkPtrDepthorBreadth (\r
  IN  TD_STRUCT *PtrTDStruct,\r
  IN  BOOLEAN   IsDepth\r
  )\r
{\r
  //\r
  // If TRUE, indicating the host controller should process in depth first fashion,\r
  // else, the host controller should process in breadth first fashion\r
  //\r
  PtrTDStruct->TDData.TDLinkPtrDepthSelect = (IsDepth ? 1 : 0);\r
}\r
\r
/**\r
  Set TD Link Pointer in TD.\r
\r
  @param  PtrTDStruct  Place to store TD_STRUCT pointer.\r
  @param  PtrNext      Place to the next TD_STRUCT.\r
\r
**/\r
VOID\r
SetTDLinkPtr (\r
  IN  TD_STRUCT *PtrTDStruct,\r
  IN  VOID      *PtrNext\r
  )\r
{\r
  //\r
  // Set TD Link Pointer. Since QH,TD align on 16-byte boundaries,\r
  // only the highest 28 bits are valid. (if take 32bit address as an example)\r
  //\r
  PtrTDStruct->TDData.TDLinkPtr = (UINT32) (UINTN) PtrNext >> 4;\r
}\r
\r
/**\r
  Get TD Link Pointer.\r
\r
  @param  PtrTDStruct     Place to store TD_STRUCT pointer.\r
\r
  @retval Get TD Link Pointer in TD.\r
\r
**/\r
VOID *\r
GetTDLinkPtr (\r
  IN  TD_STRUCT *PtrTDStruct\r
  )\r
{\r
  //\r
  // Get TD Link Pointer. Restore it back to 32bit\r
  // (if take 32bit address as an example)\r
  //\r
  return (VOID *) (UINTN) ((PtrTDStruct->TDData.TDLinkPtr) << 4);\r
}\r
\r
\r
\r
/**\r
  Enable/Disable short packet detection mechanism.\r
\r
  @param  PtrTDStruct  Place to store TD_STRUCT pointer.\r
  @param  IsEnable     Enable or disable short packet detection mechanism.\r
\r
**/\r
VOID\r
EnableorDisableTDShortPacket (\r
  IN  TD_STRUCT *PtrTDStruct,\r
  IN  BOOLEAN   IsEnable\r
  )\r
{\r
  //\r
  // TRUE means enable short packet detection mechanism.\r
  //\r
  PtrTDStruct->TDData.TDStatusSPD = (IsEnable ? 1 : 0);\r
}\r
\r
/**\r
  Set the max error counter in TD.\r
\r
  @param  PtrTDStruct  Place to store TD_STRUCT pointer.\r
  @param  MaxErrors    The number of allowable error.\r
\r
**/\r
VOID\r
SetTDControlErrorCounter (\r
  IN  TD_STRUCT *PtrTDStruct,\r
  IN  UINT8     MaxErrors\r
  )\r
{\r
  //\r
  // valid value of MaxErrors is 0,1,2,3\r
  //\r
  if (MaxErrors > 3) {\r
    MaxErrors = 3;\r
  }\r
\r
  PtrTDStruct->TDData.TDStatusErr = MaxErrors;\r
}\r
\r
/**\r
  Set the TD is targeting a low-speed device or not.\r
\r
  @param  PtrTDStruct       Place to store TD_STRUCT pointer.\r
  @param  IsLowSpeedDevice  Whether The device is low-speed.\r
\r
**/\r
VOID\r
SetTDLoworFullSpeedDevice (\r
  IN  TD_STRUCT *PtrTDStruct,\r
  IN  BOOLEAN   IsLowSpeedDevice\r
  )\r
{\r
  //\r
  // TRUE means the TD is targeting at a Low-speed device\r
  //\r
  PtrTDStruct->TDData.TDStatusLS = (IsLowSpeedDevice ? 1 : 0);\r
}\r
\r
/**\r
  Set the TD is isochronous transfer type or not.\r
\r
  @param  PtrTDStruct       Place to store TD_STRUCT pointer.\r
  @param  IsIsochronous     Whether the transaction isochronous transfer type.\r
\r
**/\r
VOID\r
SetTDControlIsochronousorNot (\r
  IN  TD_STRUCT   *PtrTDStruct,\r
  IN  BOOLEAN     IsIsochronous\r
  )\r
{\r
  //\r
  // TRUE means the TD belongs to Isochronous transfer type.\r
  //\r
  PtrTDStruct->TDData.TDStatusIOS = (IsIsochronous ? 1 : 0);\r
}\r
\r
/**\r
  Set if UCHI should issue an interrupt on completion of the frame\r
  in which this TD is executed\r
\r
  @param  PtrTDStruct       Place to store TD_STRUCT pointer.\r
  @param  IsSet             Whether HC should issue an interrupt on completion.\r
\r
**/\r
VOID\r
SetorClearTDControlIOC (\r
  IN  TD_STRUCT *PtrTDStruct,\r
  IN  BOOLEAN   IsSet\r
  )\r
{\r
  //\r
  // If this bit is set, it indicates that the host controller should issue\r
  // an interrupt on completion of the frame in which this TD is executed.\r
  //\r
  PtrTDStruct->TDData.TDStatusIOC = IsSet ? 1 : 0;\r
}\r
\r
/**\r
  Set if the TD is active and can be executed.\r
\r
  @param  PtrTDStruct       Place to store TD_STRUCT pointer.\r
  @param  IsActive          Whether the TD is active and can be executed.\r
\r
**/\r
VOID\r
SetTDStatusActiveorInactive (\r
  IN  TD_STRUCT *PtrTDStruct,\r
  IN  BOOLEAN   IsActive\r
  )\r
{\r
  //\r
  // If this bit is set, it indicates that the TD is active and can be\r
  // executed.\r
  //\r
  if (IsActive) {\r
    PtrTDStruct->TDData.TDStatus |= 0x80;\r
  } else {\r
    PtrTDStruct->TDData.TDStatus &= 0x7F;\r
  }\r
}\r
\r
/**\r
  Specifies the maximum number of data bytes allowed for the transfer.\r
\r
  @param  PtrTDStruct   Place to store TD_STRUCT pointer.\r
  @param  MaxLen        The maximum number of data bytes allowed.\r
\r
  @retval The allowed maximum number of data.\r
**/\r
UINT16\r
SetTDTokenMaxLength (\r
  IN  TD_STRUCT *PtrTDStruct,\r
  IN  UINT16    MaxLen\r
  )\r
{\r
  //\r
  // Specifies the maximum number of data bytes allowed for the transfer.\r
  // the legal value extent is 0 ~ 0x500.\r
  //\r
  if (MaxLen > 0x500) {\r
    MaxLen = 0x500;\r
  }\r
\r
  PtrTDStruct->TDData.TDTokenMaxLen = MaxLen - 1;\r
\r
  return MaxLen;\r
}\r
\r
/**\r
  Set the data toggle bit to DATA1.\r
\r
  @param  PtrTDStruct   Place to store TD_STRUCT pointer.\r
\r
**/\r
VOID\r
SetTDTokenDataToggle1 (\r
  IN  TD_STRUCT *PtrTDStruct\r
  )\r
{\r
  //\r
  // Set the data toggle bit to DATA1\r
  //\r
  PtrTDStruct->TDData.TDTokenDataToggle = 1;\r
}\r
\r
/**\r
  Set the data toggle bit to DATA0.\r
\r
  @param  PtrTDStruct   Place to store TD_STRUCT pointer.\r
\r
**/\r
VOID\r
SetTDTokenDataToggle0 (\r
  IN  TD_STRUCT *PtrTDStruct\r
  )\r
{\r
  //\r
  // Set the data toggle bit to DATA0\r
  //\r
  PtrTDStruct->TDData.TDTokenDataToggle = 0;\r
}\r
\r
/**\r
  Set EndPoint Number the TD is targeting at.\r
\r
  @param  PtrTDStruct   Place to store TD_STRUCT pointer.\r
  @param  EndPoint      The Endport number of the target.\r
\r
**/\r
VOID\r
SetTDTokenEndPoint (\r
  IN  TD_STRUCT *PtrTDStruct,\r
  IN  UINTN     EndPoint\r
  )\r
{\r
  //\r
  // Set EndPoint Number the TD is targeting at.\r
  //\r
  PtrTDStruct->TDData.TDTokenEndPt = (UINT8) EndPoint;\r
}\r
\r
/**\r
  Set Device Address the TD is targeting at.\r
\r
  @param  PtrTDStruct   Place to store TD_STRUCT pointer.\r
  @param  DevAddr       The Device Address of the target.\r
\r
**/\r
VOID\r
SetTDTokenDeviceAddress (\r
  IN  TD_STRUCT *PtrTDStruct,\r
  IN  UINTN     DevAddr\r
  )\r
{\r
  //\r
  // Set Device Address the TD is targeting at.\r
  //\r
  PtrTDStruct->TDData.TDTokenDevAddr = (UINT8) DevAddr;\r
}\r
\r
/**\r
  Set Packet Identification the TD is targeting at.\r
\r
  @param  PtrTDStruct   Place to store TD_STRUCT pointer.\r
  @param  PacketID      The Packet Identification of the target.\r
\r
**/\r
VOID\r
SetTDTokenPacketID (\r
  IN  TD_STRUCT *PtrTDStruct,\r
  IN  UINT8     PacketID\r
  )\r
{\r
  //\r
  // Set the Packet Identification to be used for this transaction.\r
  //\r
  PtrTDStruct->TDData.TDTokenPID = PacketID;\r
}\r
\r
/**\r
  Detect whether the TD is active.\r
\r
  @param  PtrTDStruct   Place to store TD_STRUCT pointer.\r
\r
  @retval The TD is active or not.\r
\r
**/\r
BOOLEAN\r
IsTDStatusActive (\r
  IN  TD_STRUCT *PtrTDStruct\r
  )\r
{\r
  UINT8 TDStatus;\r
\r
  //\r
  // Detect whether the TD is active.\r
  //\r
  TDStatus = (UINT8) (PtrTDStruct->TDData.TDStatus);\r
  return (BOOLEAN) (TDStatus & 0x80);\r
}\r
\r
/**\r
  Detect whether the TD is stalled.\r
\r
  @param  PtrTDStruct   Place to store TD_STRUCT pointer.\r
\r
  @retval The TD is stalled or not.\r
\r
**/\r
BOOLEAN\r
IsTDStatusStalled (\r
  IN  TD_STRUCT *PtrTDStruct\r
  )\r
{\r
  UINT8 TDStatus;\r
\r
  //\r
  // Detect whether the device/endpoint addressed by this TD is stalled.\r
  //\r
  TDStatus = (UINT8) (PtrTDStruct->TDData.TDStatus);\r
  return (BOOLEAN) (TDStatus & 0x40);\r
}\r
\r
/**\r
  Detect whether Data Buffer Error is happened.\r
\r
  @param  PtrTDStruct   Place to store TD_STRUCT pointer.\r
\r
  @retval The Data Buffer Error is happened or not.\r
\r
**/\r
BOOLEAN\r
IsTDStatusBufferError (\r
  IN  TD_STRUCT *PtrTDStruct\r
  )\r
{\r
  UINT8 TDStatus;\r
\r
  //\r
  // Detect whether Data Buffer Error is happened.\r
  //\r
  TDStatus = (UINT8) (PtrTDStruct->TDData.TDStatus);\r
  return (BOOLEAN) (TDStatus & 0x20);\r
}\r
\r
/**\r
  Detect whether Babble Error is happened.\r
\r
  @param  PtrTDStruct   Place to store TD_STRUCT pointer.\r
\r
  @retval The Babble Error is happened or not.\r
\r
**/\r
BOOLEAN\r
IsTDStatusBabbleError (\r
  IN  TD_STRUCT *PtrTDStruct\r
  )\r
{\r
  UINT8 TDStatus;\r
\r
  //\r
  // Detect whether Babble Error is happened.\r
  //\r
  TDStatus = (UINT8) (PtrTDStruct->TDData.TDStatus);\r
  return (BOOLEAN) (TDStatus & 0x10);\r
}\r
\r
/**\r
  Detect whether NAK is received.\r
\r
  @param  PtrTDStruct   Place to store TD_STRUCT pointer.\r
\r
  @retval The NAK is received or not.\r
\r
**/\r
BOOLEAN\r
IsTDStatusNAKReceived (\r
  IN  TD_STRUCT *PtrTDStruct\r
  )\r
{\r
  UINT8 TDStatus;\r
\r
  //\r
  // Detect whether NAK is received.\r
  //\r
  TDStatus = (UINT8) (PtrTDStruct->TDData.TDStatus);\r
  return (BOOLEAN) (TDStatus & 0x08);\r
}\r
\r
/**\r
  Detect whether CRC/Time Out Error is encountered.\r
\r
  @param  PtrTDStruct   Place to store TD_STRUCT pointer.\r
\r
  @retval The CRC/Time Out Error is encountered or not.\r
\r
**/\r
BOOLEAN\r
IsTDStatusCRCTimeOutError (\r
  IN  TD_STRUCT *PtrTDStruct\r
  )\r
{\r
  UINT8 TDStatus;\r
\r
  //\r
  // Detect whether CRC/Time Out Error is encountered.\r
  //\r
  TDStatus = (UINT8) (PtrTDStruct->TDData.TDStatus);\r
  return (BOOLEAN) (TDStatus & 0x04);\r
}\r
\r
/**\r
  Detect whether Bitstuff Error is received.\r
\r
  @param  PtrTDStruct   Place to store TD_STRUCT pointer.\r
\r
  @retval The Bitstuff Error is received or not.\r
\r
**/\r
BOOLEAN\r
IsTDStatusBitStuffError (\r
  IN  TD_STRUCT *PtrTDStruct\r
  )\r
{\r
  UINT8 TDStatus;\r
\r
  //\r
  // Detect whether Bitstuff Error is received.\r
  //\r
  TDStatus = (UINT8) (PtrTDStruct->TDData.TDStatus);\r
  return (BOOLEAN) (TDStatus & 0x02);\r
}\r
\r
/**\r
  Retrieve the actual number of bytes that were tansferred.\r
\r
  @param  PtrTDStruct   Place to store TD_STRUCT pointer.\r
\r
  @retval The actual number of bytes that were tansferred.\r
\r
**/\r
UINT16\r
GetTDStatusActualLength (\r
  IN  TD_STRUCT *PtrTDStruct\r
  )\r
{\r
  //\r
  // Retrieve the actual number of bytes that were tansferred.\r
  // the value is encoded as n-1. so return the decoded value.\r
  //\r
  return (UINT16) ((PtrTDStruct->TDData.TDStatusActualLength) + 1);\r
}\r
\r
/**\r
  Retrieve the information of whether the Link Pointer field is valid or not.\r
\r
  @param  PtrTDStruct   Place to store TD_STRUCT pointer.\r
\r
  @retval The linker pointer field is valid or not.\r
\r
**/\r
BOOLEAN\r
GetTDLinkPtrValidorInvalid (\r
  IN  TD_STRUCT *PtrTDStruct\r
  )\r
{\r
  //\r
  // Retrieve the information of whether the Link Pointer field\r
  // is valid or not.\r
  //\r
  if ((PtrTDStruct->TDData.TDLinkPtrTerminate & BIT0) != 0) {\r
    return FALSE;\r
  } else {\r
    return TRUE;\r
  }\r
\r
}\r
\r
/**\r
  Count TD Number from PtrFirstTD.\r
\r
  @param  PtrFirstTD   Place to store TD_STRUCT pointer.\r
\r
  @retval The queued TDs number.\r
\r
**/\r
UINTN\r
CountTDsNumber (\r
  IN  TD_STRUCT *PtrFirstTD\r
  )\r
{\r
  UINTN     Number;\r
  TD_STRUCT *Ptr;\r
\r
  //\r
  // Count the queued TDs number.\r
  //\r
  Number  = 0;\r
  Ptr     = PtrFirstTD;\r
  while (Ptr != 0) {\r
    Ptr = (TD_STRUCT *) Ptr->PtrNextTD;\r
    Number++;\r
  }\r
\r
  return Number;\r
}\r
\r
/**\r
  Link TD To QH.\r
\r
  @param  PtrQH   Place to store QH_STRUCT pointer.\r
  @param  PtrTD   Place to store TD_STRUCT pointer.\r
\r
**/\r
VOID\r
LinkTDToQH (\r
  IN  QH_STRUCT *PtrQH,\r
  IN  TD_STRUCT *PtrTD\r
  )\r
{\r
  if (PtrQH == NULL || PtrTD == NULL) {\r
    return ;\r
  }\r
  //\r
  //  Validate QH Vertical Ptr field\r
  //\r
  SetQHVerticalValidorInvalid (PtrQH, TRUE);\r
\r
  //\r
  //  Vertical Ptr pointing to TD structure\r
  //\r
  SetQHVerticalQHorTDSelect (PtrQH, FALSE);\r
\r
  SetQHVerticalLinkPtr (PtrQH, (VOID *) PtrTD);\r
\r
  PtrQH->PtrDown = (VOID *) PtrTD;\r
}\r
\r
/**\r
  Link TD To TD.\r
\r
  @param  PtrPreTD  Place to store TD_STRUCT pointer.\r
  @param  PtrTD     Place to store TD_STRUCT pointer.\r
\r
**/\r
VOID\r
LinkTDToTD (\r
  IN  TD_STRUCT *PtrPreTD,\r
  IN  TD_STRUCT *PtrTD\r
  )\r
{\r
  if (PtrPreTD == NULL || PtrTD == NULL) {\r
    return ;\r
  }\r
  //\r
  // Depth first fashion\r
  //\r
  SetTDLinkPtrDepthorBreadth (PtrPreTD, TRUE);\r
\r
  //\r
  // Link pointer pointing to TD struct\r
  //\r
  SetTDLinkPtrQHorTDSelect (PtrPreTD, FALSE);\r
\r
  //\r
  // Validate the link pointer valid bit\r
  //\r
  SetTDLinkPtrValidorInvalid (PtrPreTD, TRUE);\r
\r
  SetTDLinkPtr (PtrPreTD, PtrTD);\r
\r
  PtrPreTD->PtrNextTD = (VOID *) PtrTD;\r
\r
  PtrTD->PtrNextTD    = NULL;\r
}\r
\r
/**\r
  Execute Control Transfer.\r
\r
  @param  UhcDev            The UCHI device.\r
  @param  PtrTD             A pointer to TD_STRUCT data.\r
  @param  ActualLen         Actual transfer Length.\r
  @param  TimeOut           TimeOut value.\r
  @param  TransferResult    Transfer Result.\r
\r
  @return EFI_DEVICE_ERROR  The transfer failed due to transfer error.\r
  @return EFI_TIMEOUT       The transfer failed due to time out.\r
  @return EFI_SUCCESS       The transfer finished OK.\r
\r
**/\r
EFI_STATUS\r
ExecuteControlTransfer (\r
  IN  USB_UHC_DEV *UhcDev,\r
  IN  TD_STRUCT   *PtrTD,\r
  OUT UINTN       *ActualLen,\r
  IN  UINTN       TimeOut,\r
  OUT UINT32      *TransferResult\r
  )\r
{\r
  UINTN   ErrTDPos;\r
  UINTN   Delay;\r
  BOOLEAN InfiniteLoop;\r
\r
  ErrTDPos          = 0;\r
  *TransferResult   = EFI_USB_NOERROR;\r
  *ActualLen        = 0;\r
  InfiniteLoop      = FALSE;\r
\r
  Delay = TimeOut * STALL_1_MILLI_SECOND;\r
  //\r
  // If Timeout is 0, then the caller must wait for the function to be completed\r
  // until EFI_SUCCESS or EFI_DEVICE_ERROR is returned.\r
  //\r
  if (TimeOut == 0) {\r
    InfiniteLoop = TRUE;\r
  }\r
\r
  do {\r
\r
    CheckTDsResults (PtrTD, TransferResult, &ErrTDPos, ActualLen);\r
\r
    //\r
    // TD is inactive, means the control transfer is end.\r
    //\r
    if ((*TransferResult & EFI_USB_ERR_NOTEXECUTE) != EFI_USB_ERR_NOTEXECUTE) {\r
      break;\r
    }\r
    MicroSecondDelay (STALL_1_MICRO_SECOND);\r
    Delay--;\r
\r
  } while (InfiniteLoop || (Delay != 0));\r
\r
  if (*TransferResult != EFI_USB_NOERROR) {\r
    return EFI_DEVICE_ERROR;\r
  }\r
\r
  return EFI_SUCCESS;\r
}\r
\r
/**\r
  Execute Bulk Transfer.\r
\r
  @param  UhcDev            The UCHI device.\r
  @param  PtrTD             A pointer to TD_STRUCT data.\r
  @param  ActualLen         Actual transfer Length.\r
  @param  DataToggle        DataToggle value.\r
  @param  TimeOut           TimeOut value.\r
  @param  TransferResult    Transfer Result.\r
\r
  @return EFI_DEVICE_ERROR  The transfer failed due to transfer error.\r
  @return EFI_TIMEOUT       The transfer failed due to time out.\r
  @return EFI_SUCCESS       The transfer finished OK.\r
\r
**/\r
EFI_STATUS\r
ExecBulkTransfer (\r
  IN     USB_UHC_DEV *UhcDev,\r
  IN     TD_STRUCT   *PtrTD,\r
  IN OUT UINTN       *ActualLen,\r
  IN     UINT8       *DataToggle,\r
  IN     UINTN       TimeOut,\r
  OUT    UINT32      *TransferResult\r
  )\r
{\r
  UINTN   ErrTDPos;\r
  UINTN   ScrollNum;\r
  UINTN   Delay;\r
  BOOLEAN InfiniteLoop;\r
\r
  ErrTDPos          = 0;\r
  *TransferResult   = EFI_USB_NOERROR;\r
  *ActualLen        = 0;\r
  InfiniteLoop      = FALSE;\r
\r
  Delay = TimeOut * STALL_1_MILLI_SECOND;\r
  //\r
  // If Timeout is 0, then the caller must wait for the function to be completed\r
  // until EFI_SUCCESS or EFI_DEVICE_ERROR is returned.\r
  //\r
  if (TimeOut == 0) {\r
    InfiniteLoop = TRUE;\r
  }\r
\r
  do {\r
\r
    CheckTDsResults (PtrTD, TransferResult, &ErrTDPos, ActualLen);\r
    //\r
    // TD is inactive, thus meaning bulk transfer's end.\r
    //\r
    if ((*TransferResult & EFI_USB_ERR_NOTEXECUTE) != EFI_USB_ERR_NOTEXECUTE) {\r
      break;\r
    }\r
    MicroSecondDelay (STALL_1_MICRO_SECOND);\r
    Delay--;\r
\r
  } while (InfiniteLoop || (Delay != 0));\r
\r
  //\r
  // has error\r
  //\r
  if (*TransferResult != EFI_USB_NOERROR) {\r
    //\r
    // scroll the Data Toggle back to the last success TD\r
    //\r
    ScrollNum = CountTDsNumber (PtrTD) - ErrTDPos;\r
    if ((ScrollNum % 2) != 0) {\r
      *DataToggle ^= 1;\r
    }\r
\r
  //\r
  // If error, wait 100ms to retry by upper layer\r
  //\r
    MicroSecondDelay (100 * 1000);\r
    return EFI_DEVICE_ERROR;\r
  }\r
\r
  return EFI_SUCCESS;\r
}\r
\r
/**\r
  Delete Queued TDs.\r
\r
  @param  UhcDev       The UCHI device.\r
  @param  PtrFirstTD   Place to store TD_STRUCT pointer.\r
\r
**/\r
VOID\r
DeleteQueuedTDs (\r
  IN USB_UHC_DEV     *UhcDev,\r
  IN TD_STRUCT       *PtrFirstTD\r
  )\r
{\r
  TD_STRUCT *Tptr1;\r
\r
  TD_STRUCT *Tptr2;\r
\r
  Tptr1 = PtrFirstTD;\r
  //\r
  // Delete all the TDs in a queue.\r
  //\r
  while (Tptr1 != NULL) {\r
\r
    Tptr2 = Tptr1;\r
\r
    if (!GetTDLinkPtrValidorInvalid (Tptr2)) {\r
      Tptr1 = NULL;\r
    } else {\r
      //\r
      // has more than one TD in the queue.\r
      //\r
      Tptr1 = GetTDLinkPtr (Tptr2);\r
    }\r
\r
    UhcFreePool (UhcDev, (UINT8 *) Tptr2, sizeof (TD_STRUCT));\r
  }\r
\r
  return ;\r
}\r
\r
/**\r
  Check TDs Results.\r
\r
  @param  PtrTD               A pointer to TD_STRUCT data.\r
  @param  Result              The result to return.\r
  @param  ErrTDPos            The Error TD position.\r
  @param  ActualTransferSize  Actual transfer size.\r
\r
  @retval The TD is executed successfully or not.\r
\r
**/\r
BOOLEAN\r
CheckTDsResults (\r
  IN  TD_STRUCT               *PtrTD,\r
  OUT UINT32                  *Result,\r
  OUT UINTN                   *ErrTDPos,\r
  OUT UINTN                   *ActualTransferSize\r
  )\r
{\r
  UINTN Len;\r
\r
  *Result   = EFI_USB_NOERROR;\r
  *ErrTDPos = 0;\r
\r
  //\r
  // Init to zero.\r
  //\r
  *ActualTransferSize = 0;\r
\r
  while (PtrTD != NULL) {\r
\r
    if (IsTDStatusActive (PtrTD)) {\r
      *Result |= EFI_USB_ERR_NOTEXECUTE;\r
    }\r
\r
    if (IsTDStatusStalled (PtrTD)) {\r
      *Result |= EFI_USB_ERR_STALL;\r
    }\r
\r
    if (IsTDStatusBufferError (PtrTD)) {\r
      *Result |= EFI_USB_ERR_BUFFER;\r
    }\r
\r
    if (IsTDStatusBabbleError (PtrTD)) {\r
      *Result |= EFI_USB_ERR_BABBLE;\r
    }\r
\r
    if (IsTDStatusNAKReceived (PtrTD)) {\r
      *Result |= EFI_USB_ERR_NAK;\r
    }\r
\r
    if (IsTDStatusCRCTimeOutError (PtrTD)) {\r
      *Result |= EFI_USB_ERR_TIMEOUT;\r
    }\r
\r
    if (IsTDStatusBitStuffError (PtrTD)) {\r
      *Result |= EFI_USB_ERR_BITSTUFF;\r
    }\r
    //\r
    // Accumulate actual transferred data length in each TD.\r
    //\r
    Len = GetTDStatusActualLength (PtrTD) & 0x7FF;\r
    *ActualTransferSize += Len;\r
\r
    //\r
    // if any error encountered, stop processing the left TDs.\r
    //\r
    if ((*Result) != 0) {\r
      return FALSE;\r
    }\r
\r
    PtrTD = (TD_STRUCT *) (PtrTD->PtrNextTD);\r
    //\r
    // Record the first Error TD's position in the queue,\r
    // this value is zero-based.\r
    //\r
    (*ErrTDPos)++;\r
  }\r
\r
  return TRUE;\r
}\r
\r
/**\r
  Create Memory Block.\r
\r
  @param  UhcDev                   The UCHI device.\r
  @param  MemoryHeader             The Pointer to allocated memory block.\r
  @param  MemoryBlockSizeInPages   The page size of memory block to be allocated.\r
\r
  @retval EFI_OUT_OF_RESOURCES   Can't allocate memory resources.\r
  @retval EFI_SUCCESS            Success.\r
\r
**/\r
EFI_STATUS\r
CreateMemoryBlock (\r
  IN  USB_UHC_DEV           *UhcDev,\r
  OUT MEMORY_MANAGE_HEADER  **MemoryHeader,\r
  IN  UINTN                 MemoryBlockSizeInPages\r
  )\r
{\r
  EFI_STATUS            Status;\r
  UINT8                 *TempPtr;\r
  UINTN                 MemPages;\r
  UINT8                 *Ptr;\r
  VOID                  *Mapping;\r
  EFI_PHYSICAL_ADDRESS  MappedAddr;\r
\r
  //\r
  // Memory Block uses MemoryBlockSizeInPages pages,\r
  // memory management header and bit array use 1 page\r
  //\r
  MemPages = MemoryBlockSizeInPages + 1;\r
  Status = IoMmuAllocateBuffer (\r
             UhcDev->IoMmu,\r
             MemPages,\r
             (VOID **) &TempPtr,\r
             &MappedAddr,\r
             &Mapping\r
             );\r
  if (EFI_ERROR (Status) || (TempPtr == NULL)) {\r
    return EFI_OUT_OF_RESOURCES;\r
  }\r
\r
  Ptr = TempPtr;\r
\r
  ZeroMem (Ptr, MemPages * EFI_PAGE_SIZE);\r
\r
  *MemoryHeader = (MEMORY_MANAGE_HEADER *) Ptr;\r
  //\r
  // adjust Ptr pointer to the next empty memory\r
  //\r
  Ptr += sizeof (MEMORY_MANAGE_HEADER);\r
  //\r
  // Set Bit Array initial address\r
  //\r
  (*MemoryHeader)->BitArrayPtr  = Ptr;\r
\r
  (*MemoryHeader)->Next         = NULL;\r
\r
  //\r
  // Memory block initial address\r
  //\r
  Ptr = TempPtr;\r
  Ptr += EFI_PAGE_SIZE;\r
  (*MemoryHeader)->MemoryBlockPtr = Ptr;\r
  //\r
  // set Memory block size\r
  //\r
  (*MemoryHeader)->MemoryBlockSizeInBytes = MemoryBlockSizeInPages * EFI_PAGE_SIZE;\r
  //\r
  // each bit in Bit Array will manage 32byte memory in memory block\r
  //\r
  (*MemoryHeader)->BitArraySizeInBytes = ((*MemoryHeader)->MemoryBlockSizeInBytes / 32) / 8;\r
\r
  return EFI_SUCCESS;\r
}\r
\r
/**\r
  Initialize UHCI memory management.\r
\r
  @param  UhcDev                 The UCHI device.\r
\r
  @retval EFI_OUT_OF_RESOURCES   Can't allocate memory resources.\r
  @retval EFI_SUCCESS            Success.\r
\r
**/\r
EFI_STATUS\r
InitializeMemoryManagement (\r
  IN USB_UHC_DEV           *UhcDev\r
  )\r
{\r
  MEMORY_MANAGE_HEADER  *MemoryHeader;\r
  EFI_STATUS            Status;\r
  UINTN                 MemPages;\r
\r
  MemPages  = NORMAL_MEMORY_BLOCK_UNIT_IN_PAGES;\r
  Status    = CreateMemoryBlock (UhcDev, &MemoryHeader, MemPages);\r
  if (EFI_ERROR (Status)) {\r
    return Status;\r
  }\r
\r
  UhcDev->Header1 = MemoryHeader;\r
\r
  return EFI_SUCCESS;\r
}\r
\r
/**\r
  Initialize UHCI memory management.\r
\r
  @param  UhcDev           The UCHI device.\r
  @param  Pool             Buffer pointer to store the buffer pointer.\r
  @param  AllocSize        The size of the pool to be allocated.\r
\r
  @retval EFI_OUT_OF_RESOURCES   Can't allocate memory resources.\r
  @retval EFI_SUCCESS            Success.\r
\r
**/\r
EFI_STATUS\r
UhcAllocatePool (\r
  IN  USB_UHC_DEV     *UhcDev,\r
  OUT UINT8           **Pool,\r
  IN  UINTN           AllocSize\r
  )\r
{\r
  MEMORY_MANAGE_HEADER  *MemoryHeader;\r
  MEMORY_MANAGE_HEADER  *TempHeaderPtr;\r
  MEMORY_MANAGE_HEADER  *NewMemoryHeader;\r
  UINTN                 RealAllocSize;\r
  UINTN                 MemoryBlockSizeInPages;\r
  EFI_STATUS            Status;\r
\r
  *Pool = NULL;\r
\r
  MemoryHeader = UhcDev->Header1;\r
\r
  //\r
  // allocate unit is 32 byte (align on 32 byte)\r
  //\r
  if ((AllocSize & 0x1F) != 0) {\r
    RealAllocSize = (AllocSize / 32 + 1) * 32;\r
  } else {\r
    RealAllocSize = AllocSize;\r
  }\r
\r
  Status = EFI_NOT_FOUND;\r
  for (TempHeaderPtr = MemoryHeader; TempHeaderPtr != NULL; TempHeaderPtr = TempHeaderPtr->Next) {\r
\r
    Status = AllocMemInMemoryBlock (\r
              TempHeaderPtr,\r
              (VOID **) Pool,\r
              RealAllocSize / 32\r
              );\r
    if (!EFI_ERROR (Status)) {\r
      return EFI_SUCCESS;\r
    }\r
  }\r
  //\r
  // There is no enough memory,\r
  // Create a new Memory Block\r
  //\r
  //\r
  // if pool size is larger than NORMAL_MEMORY_BLOCK_UNIT_IN_PAGES,\r
  // just allocate a large enough memory block.\r
  //\r
  if (RealAllocSize > (NORMAL_MEMORY_BLOCK_UNIT_IN_PAGES * EFI_PAGE_SIZE)) {\r
    MemoryBlockSizeInPages = RealAllocSize / EFI_PAGE_SIZE + 1;\r
  } else {\r
    MemoryBlockSizeInPages = NORMAL_MEMORY_BLOCK_UNIT_IN_PAGES;\r
  }\r
\r
  Status = CreateMemoryBlock (UhcDev, &NewMemoryHeader, MemoryBlockSizeInPages);\r
  if (EFI_ERROR (Status)) {\r
    return Status;\r
  }\r
  //\r
  // Link the new Memory Block to the Memory Header list\r
  //\r
  InsertMemoryHeaderToList (MemoryHeader, NewMemoryHeader);\r
\r
  Status = AllocMemInMemoryBlock (\r
            NewMemoryHeader,\r
            (VOID **) Pool,\r
            RealAllocSize / 32\r
            );\r
  return Status;\r
}\r
\r
/**\r
  Alloc Memory In MemoryBlock.\r
\r
  @param  MemoryHeader           The pointer to memory manage header.\r
  @param  Pool                   Buffer pointer to store the buffer pointer.\r
  @param  NumberOfMemoryUnit     The size of the pool to be allocated.\r
\r
  @retval EFI_OUT_OF_RESOURCES   Can't allocate memory resources.\r
  @retval EFI_SUCCESS            Success.\r
\r
**/\r
EFI_STATUS\r
AllocMemInMemoryBlock (\r
  IN  MEMORY_MANAGE_HEADER  *MemoryHeader,\r
  OUT VOID                  **Pool,\r
  IN  UINTN                 NumberOfMemoryUnit\r
  )\r
{\r
  UINTN TempBytePos;\r
  UINTN FoundBytePos;\r
  UINT8 Index;\r
  UINT8 FoundBitPos;\r
  UINT8 ByteValue;\r
  UINT8 BitValue;\r
  UINTN NumberOfZeros;\r
  UINTN Count;\r
\r
  FoundBytePos  = 0;\r
  FoundBitPos   = 0;\r
\r
  ByteValue     = MemoryHeader->BitArrayPtr[0];\r
  NumberOfZeros = 0;\r
  Index             = 0;\r
  for (TempBytePos = 0; TempBytePos < MemoryHeader->BitArraySizeInBytes;) {\r
    //\r
    // Pop out BitValue from a byte in TempBytePos.\r
    //\r
    BitValue = (UINT8)(ByteValue & 0x1);\r
\r
    if (BitValue == 0) {\r
      //\r
      // Found a free bit, the NumberOfZeros only record the number of those consecutive zeros\r
      //\r
      NumberOfZeros++;\r
      //\r
      // Found enough consecutive free space, break the loop\r
      //\r
      if (NumberOfZeros >= NumberOfMemoryUnit) {\r
        break;\r
      }\r
    } else {\r
      //\r
      // Encountering a '1', meant the bit is ocupied.\r
      //\r
      if (NumberOfZeros >= NumberOfMemoryUnit) {\r
        //\r
        // Found enough consecutive free space,break the loop\r
        //\r
        break;\r
      } else {\r
        //\r
        // the NumberOfZeros only record the number of those consecutive zeros,\r
        // so reset the NumberOfZeros to 0 when encountering '1' before finding\r
        // enough consecutive '0's\r
        //\r
        NumberOfZeros = 0;\r
        //\r
        // reset the (FoundBytePos,FoundBitPos) to the position of '1'\r
        //\r
        FoundBytePos  = TempBytePos;\r
        FoundBitPos   = Index;\r
      }\r
    }\r
    //\r
    // right shift the byte\r
    //\r
    ByteValue /= 2;\r
\r
    //\r
    // step forward a bit\r
    //\r
    Index++;\r
    if (Index == 8) {\r
      //\r
      // step forward a byte, getting the byte value,\r
      // and reset the bit pos.\r
      //\r
      TempBytePos += 1;\r
      ByteValue = MemoryHeader->BitArrayPtr[TempBytePos];\r
      Index     = 0;\r
    }\r
  }\r
\r
  if (NumberOfZeros < NumberOfMemoryUnit) {\r
    return EFI_NOT_FOUND;\r
  }\r
  //\r
  // Found enough free space.\r
  //\r
  //\r
  // The values recorded in (FoundBytePos,FoundBitPos) have two conditions:\r
  //  1)(FoundBytePos,FoundBitPos) record the position\r
  //    of the last '1' before the consecutive '0's, it must\r
  //    be adjusted to the start position of the consecutive '0's.\r
  //  2)the start address of the consecutive '0's is just the start of\r
  //    the bitarray. so no need to adjust the values of (FoundBytePos,FoundBitPos).\r
  //\r
  if ((MemoryHeader->BitArrayPtr[0] & BIT0) != 0) {\r
    FoundBitPos += 1;\r
  }\r
  //\r
  // Have the (FoundBytePos,FoundBitPos) make sense.\r
  //\r
  if (FoundBitPos > 7) {\r
    FoundBytePos += 1;\r
    FoundBitPos -= 8;\r
  }\r
  //\r
  // Set the memory as allocated\r
  //\r
  for (TempBytePos = FoundBytePos, Index = FoundBitPos, Count = 0; Count < NumberOfMemoryUnit; Count++) {\r
\r
    MemoryHeader->BitArrayPtr[TempBytePos] = (UINT8) (MemoryHeader->BitArrayPtr[TempBytePos] | (1 << Index));\r
    Index++;\r
    if (Index == 8) {\r
      TempBytePos += 1;\r
      Index = 0;\r
    }\r
  }\r
\r
  *Pool = MemoryHeader->MemoryBlockPtr + (FoundBytePos * 8 + FoundBitPos) * 32;\r
\r
  return EFI_SUCCESS;\r
}\r
\r
/**\r
  Uhci Free Pool.\r
\r
  @param  UhcDev                 The UHCI device.\r
  @param  Pool                   A pointer to store the buffer address.\r
  @param  AllocSize              The size of the pool to be freed.\r
\r
**/\r
VOID\r
UhcFreePool (\r
  IN USB_UHC_DEV     *UhcDev,\r
  IN UINT8           *Pool,\r
  IN UINTN           AllocSize\r
  )\r
{\r
  MEMORY_MANAGE_HEADER  *MemoryHeader;\r
  MEMORY_MANAGE_HEADER  *TempHeaderPtr;\r
  UINTN                 StartBytePos;\r
  UINTN                 Index;\r
  UINT8                 StartBitPos;\r
  UINT8                 Index2;\r
  UINTN                 Count;\r
  UINTN                 RealAllocSize;\r
\r
  MemoryHeader = UhcDev->Header1;\r
\r
  //\r
  // allocate unit is 32 byte (align on 32 byte)\r
  //\r
  if ((AllocSize & 0x1F) != 0) {\r
    RealAllocSize = (AllocSize / 32 + 1) * 32;\r
  } else {\r
    RealAllocSize = AllocSize;\r
  }\r
\r
  for (TempHeaderPtr = MemoryHeader; TempHeaderPtr != NULL;\r
       TempHeaderPtr = TempHeaderPtr->Next) {\r
\r
    if ((Pool >= TempHeaderPtr->MemoryBlockPtr) &&\r
        ((Pool + RealAllocSize) <= (TempHeaderPtr->MemoryBlockPtr +\r
                                    TempHeaderPtr->MemoryBlockSizeInBytes))) {\r
\r
      //\r
      // Pool is in the Memory Block area,\r
      // find the start byte and bit in the bit array\r
      //\r
      StartBytePos  = ((Pool - TempHeaderPtr->MemoryBlockPtr) / 32) / 8;\r
      StartBitPos   = (UINT8) (((Pool - TempHeaderPtr->MemoryBlockPtr) / 32) % 8);\r
\r
      //\r
      // reset associated bits in bit array\r
      //\r
      for (Index = StartBytePos, Index2 = StartBitPos, Count = 0; Count < (RealAllocSize / 32); Count++) {\r
\r
        TempHeaderPtr->BitArrayPtr[Index] = (UINT8) (TempHeaderPtr->BitArrayPtr[Index] ^ (1 << Index2));\r
        Index2++;\r
        if (Index2 == 8) {\r
          Index += 1;\r
          Index2 = 0;\r
        }\r
      }\r
      //\r
      // break the loop\r
      //\r
      break;\r
    }\r
  }\r
\r
}\r
\r
/**\r
  Insert a new memory header into list.\r
\r
  @param  MemoryHeader         A pointer to the memory header list.\r
  @param  NewMemoryHeader      A new memory header to be inserted into the list.\r
\r
**/\r
VOID\r
InsertMemoryHeaderToList (\r
  IN MEMORY_MANAGE_HEADER  *MemoryHeader,\r
  IN MEMORY_MANAGE_HEADER  *NewMemoryHeader\r
  )\r
{\r
  MEMORY_MANAGE_HEADER  *TempHeaderPtr;\r
\r
  for (TempHeaderPtr = MemoryHeader; TempHeaderPtr != NULL; TempHeaderPtr = TempHeaderPtr->Next) {\r
    if (TempHeaderPtr->Next == NULL) {\r
      TempHeaderPtr->Next = NewMemoryHeader;\r
      break;\r
    }\r
  }\r
}\r
\r
\r
\r
\r
\r
/**\r
  Map address of request structure buffer.\r
\r
  @param  Uhc                The UHCI device.\r
  @param  Request            The user request buffer.\r
  @param  MappedAddr         Mapped address of request.\r
  @param  Map                Identificaion of this mapping to return.\r
\r
  @return EFI_SUCCESS        Success.\r
  @return EFI_DEVICE_ERROR   Fail to map the user request.\r
\r
**/\r
EFI_STATUS\r
UhciMapUserRequest (\r
  IN  USB_UHC_DEV         *Uhc,\r
  IN  OUT VOID            *Request,\r
  OUT UINT8               **MappedAddr,\r
  OUT VOID                **Map\r
  )\r
{\r
  EFI_STATUS            Status;\r
  UINTN                 Len;\r
  EFI_PHYSICAL_ADDRESS  PhyAddr;\r
\r
  Len    = sizeof (EFI_USB_DEVICE_REQUEST);\r
  Status = IoMmuMap (\r
             Uhc->IoMmu,\r
             EdkiiIoMmuOperationBusMasterRead,\r
             Request,\r
             &Len,\r
             &PhyAddr,\r
             Map\r
             );\r
\r
  if (!EFI_ERROR (Status)) {\r
    *MappedAddr = (UINT8 *) (UINTN) PhyAddr;\r
  }\r
\r
  return Status;\r
}\r
\r
/**\r
  Map address of user data buffer.\r
\r
  @param  Uhc                The UHCI device.\r
  @param  Direction          Direction of the data transfer.\r
  @param  Data               The user data buffer.\r
  @param  Len                Length of the user data.\r
  @param  PktId              Packet identificaion.\r
  @param  MappedAddr         Mapped address to return.\r
  @param  Map                Identificaion of this mapping to return.\r
\r
  @return EFI_SUCCESS        Success.\r
  @return EFI_DEVICE_ERROR   Fail to map the user data.\r
\r
**/\r
EFI_STATUS\r
UhciMapUserData (\r
  IN  USB_UHC_DEV             *Uhc,\r
  IN  EFI_USB_DATA_DIRECTION  Direction,\r
  IN  VOID                    *Data,\r
  IN  OUT UINTN               *Len,\r
  OUT UINT8                   *PktId,\r
  OUT UINT8                   **MappedAddr,\r
  OUT VOID                    **Map\r
  )\r
{\r
  EFI_STATUS            Status;\r
  EFI_PHYSICAL_ADDRESS  PhyAddr;\r
\r
  Status = EFI_SUCCESS;\r
\r
  switch (Direction) {\r
  case EfiUsbDataIn:\r
    //\r
    // BusMasterWrite means cpu read\r
    //\r
    *PktId = INPUT_PACKET_ID;\r
    Status = IoMmuMap (\r
               Uhc->IoMmu,\r
               EdkiiIoMmuOperationBusMasterWrite,\r
               Data,\r
               Len,\r
               &PhyAddr,\r
               Map\r
               );\r
\r
    if (EFI_ERROR (Status)) {\r
      goto EXIT;\r
    }\r
\r
    *MappedAddr = (UINT8 *) (UINTN) PhyAddr;\r
    break;\r
\r
  case EfiUsbDataOut:\r
    *PktId = OUTPUT_PACKET_ID;\r
    Status = IoMmuMap (\r
               Uhc->IoMmu,\r
               EdkiiIoMmuOperationBusMasterRead,\r
               Data,\r
               Len,\r
               &PhyAddr,\r
               Map\r
               );\r
\r
    if (EFI_ERROR (Status)) {\r
      goto EXIT;\r
    }\r
\r
    *MappedAddr = (UINT8 *) (UINTN) PhyAddr;\r
    break;\r
\r
  case EfiUsbNoData:\r
    if ((Len != NULL) && (*Len != 0)) {\r
      Status    = EFI_INVALID_PARAMETER;\r
      goto EXIT;\r
    }\r
\r
    *PktId      = OUTPUT_PACKET_ID;\r
    *MappedAddr = NULL;\r
    *Map        = NULL;\r
    break;\r
\r
  default:\r
    Status      = EFI_INVALID_PARAMETER;\r
  }\r
\r
EXIT:\r
  return Status;\r
}\r
\r