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31f228cf 1/** @file\r
d1102dba
LG
2 ARM specifc functionality for DxeLoad.\r
3\r
4Copyright (c) 2006 - 2018, Intel Corporation. All rights reserved.<BR>\r
cd5ebaa0 5Portions copyright (c) 2008 - 2009, Apple Inc. All rights reserved.<BR>\r
31f228cf 6\r
9d510e61 7SPDX-License-Identifier: BSD-2-Clause-Patent\r
31f228cf 8\r
9**/\r
10\r
11#include "DxeIpl.h"\r
12\r
5db1cce1 13#include <Library/ArmMmuLib.h>\r
c82b8087 14\r
31f228cf 15/**\r
16 Transfers control to DxeCore.\r
17\r
18 This function performs a CPU architecture specific operations to execute\r
19 the entry point of DxeCore with the parameters of HobList.\r
20 It also installs EFI_END_OF_PEI_PPI to signal the end of PEI phase.\r
21\r
22 @param DxeCoreEntryPoint The entry point of DxeCore.\r
23 @param HobList The start of HobList passed to DxeCore.\r
24\r
25**/\r
26VOID\r
27HandOffToDxeCore (\r
1436aea4
MK
28 IN EFI_PHYSICAL_ADDRESS DxeCoreEntryPoint,\r
29 IN EFI_PEI_HOB_POINTERS HobList\r
31f228cf 30 )\r
31{\r
1436aea4
MK
32 VOID *BaseOfStack;\r
33 VOID *TopOfStack;\r
34 EFI_STATUS Status;\r
31f228cf 35\r
36 //\r
37 // Allocate 128KB for the Stack\r
38 //\r
39 BaseOfStack = AllocatePages (EFI_SIZE_TO_PAGES (STACK_SIZE));\r
40 ASSERT (BaseOfStack != NULL);\r
41\r
c82b8087
AB
42 if (PcdGetBool (PcdSetNxForStack)) {\r
43 Status = ArmSetMemoryRegionNoExec ((UINTN)BaseOfStack, STACK_SIZE);\r
44 ASSERT_EFI_ERROR (Status);\r
45 }\r
46\r
31f228cf 47 //\r
48 // Compute the top of the stack we were allocated. Pre-allocate a UINTN\r
49 // for safety.\r
50 //\r
1436aea4 51 TopOfStack = (VOID *)((UINTN)BaseOfStack + EFI_SIZE_TO_PAGES (STACK_SIZE) * EFI_PAGE_SIZE - CPU_STACK_ALIGNMENT);\r
31f228cf 52 TopOfStack = ALIGN_POINTER (TopOfStack, CPU_STACK_ALIGNMENT);\r
53\r
54 //\r
55 // End of PEI phase singal\r
56 //\r
57 Status = PeiServicesInstallPpi (&gEndOfPeiSignalPpi);\r
58 ASSERT_EFI_ERROR (Status);\r
59\r
60 //\r
61 // Update the contents of BSP stack HOB to reflect the real stack info passed to DxeCore.\r
d1102dba 62 //\r
1436aea4 63 UpdateStackHob ((EFI_PHYSICAL_ADDRESS)(UINTN)BaseOfStack, STACK_SIZE);\r
31f228cf 64\r
65 SwitchStack (\r
66 (SWITCH_STACK_ENTRY_POINT)(UINTN)DxeCoreEntryPoint,\r
67 HobList.Raw,\r
68 NULL,\r
69 TopOfStack\r
70 );\r
71}\r