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96226baa | 1 | /** @file\r |
48557c65 | 2 | Ia32-specific functionality for DxeLoad.\r |
95276127 | 3 | \r |
bdfbe63e | 4 | Copyright (c) 2006 - 2011, Intel Corporation. All rights reserved.<BR>\r |
cd5ebaa0 | 5 | This program and the accompanying materials\r |
95276127 | 6 | are licensed and made available under the terms and conditions of the BSD License\r |
7 | which accompanies this distribution. The full text of the license may be found at\r | |
8 | http://opensource.org/licenses/bsd-license.php\r | |
9 | \r | |
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r | |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r | |
12 | \r | |
96226baa | 13 | **/\r |
95276127 | 14 | \r |
95276127 | 15 | #include "DxeIpl.h"\r |
16 | #include "VirtualMemory.h"\r | |
17 | \r | |
df7aaeb9 | 18 | #define IDT_ENTRY_COUNT 32\r |
e7af83ae | 19 | \r |
bdfbe63e | 20 | typedef struct _X64_IDT_TABLE {\r |
21 | //\r | |
22 | // Reserved 4 bytes preceding PeiService and IdtTable,\r | |
23 | // since IDT base address should be 8-byte alignment.\r | |
24 | //\r | |
25 | UINT32 Reserved;\r | |
26 | CONST EFI_PEI_SERVICES **PeiService;\r | |
27 | X64_IDT_GATE_DESCRIPTOR IdtTable[IDT_ENTRY_COUNT];\r | |
28 | } X64_IDT_TABLE;\r | |
29 | \r | |
95276127 | 30 | //\r |
31 | // Global Descriptor Table (GDT)\r | |
32 | //\r | |
b98da1b1 | 33 | GLOBAL_REMOVE_IF_UNREFERENCED IA32_GDT gGdtEntries[] = {\r |
0cf27ce0 | 34 | /* selector { Global Segment Descriptor } */\r |
35 | /* 0x00 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, //null descriptor\r | |
95276127 | 36 | /* 0x08 */ {{0xffff, 0, 0, 0x2, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //linear data segment descriptor\r |
37 | /* 0x10 */ {{0xffff, 0, 0, 0xf, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //linear code segment descriptor\r | |
38 | /* 0x18 */ {{0xffff, 0, 0, 0x3, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //system data segment descriptor\r | |
39 | /* 0x20 */ {{0xffff, 0, 0, 0xa, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //system code segment descriptor\r | |
40 | /* 0x28 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, //spare segment descriptor\r | |
41 | /* 0x30 */ {{0xffff, 0, 0, 0x2, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //system data segment descriptor\r | |
42 | /* 0x38 */ {{0xffff, 0, 0, 0xa, 1, 0, 1, 0xf, 0, 1, 0, 1, 0}}, //system code segment descriptor\r | |
43 | /* 0x40 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, //spare segment descriptor\r | |
44 | };\r | |
45 | \r | |
46 | //\r | |
47 | // IA32 Gdt register\r | |
48 | //\r | |
49 | GLOBAL_REMOVE_IF_UNREFERENCED CONST IA32_DESCRIPTOR gGdt = {\r | |
50 | sizeof (gGdtEntries) - 1,\r | |
51 | (UINTN) gGdtEntries\r | |
52 | };\r | |
53 | \r | |
5d582956 | 54 | GLOBAL_REMOVE_IF_UNREFERENCED IA32_DESCRIPTOR gLidtDescriptor = {\r |
e7af83ae | 55 | sizeof (X64_IDT_GATE_DESCRIPTOR) * IDT_ENTRY_COUNT - 1,\r |
5d582956 | 56 | 0\r |
57 | };\r | |
58 | \r | |
91d92e25 | 59 | /**\r |
60 | Transfers control to DxeCore.\r | |
61 | \r | |
62 | This function performs a CPU architecture specific operations to execute\r | |
63 | the entry point of DxeCore with the parameters of HobList.\r | |
48557c65 | 64 | It also installs EFI_END_OF_PEI_PPI to signal the end of PEI phase.\r |
91d92e25 | 65 | \r |
48557c65 | 66 | @param DxeCoreEntryPoint The entry point of DxeCore.\r |
91d92e25 | 67 | @param HobList The start of HobList passed to DxeCore.\r |
91d92e25 | 68 | \r |
69 | **/\r | |
95276127 | 70 | VOID\r |
71 | HandOffToDxeCore (\r | |
72 | IN EFI_PHYSICAL_ADDRESS DxeCoreEntryPoint,\r | |
9b937a73 | 73 | IN EFI_PEI_HOB_POINTERS HobList\r |
95276127 | 74 | )\r |
75 | {\r | |
76 | EFI_STATUS Status;\r | |
77 | EFI_PHYSICAL_ADDRESS BaseOfStack;\r | |
78 | EFI_PHYSICAL_ADDRESS TopOfStack;\r | |
79 | UINTN PageTables;\r | |
5d582956 | 80 | X64_IDT_GATE_DESCRIPTOR *IdtTable;\r |
81 | UINTN SizeOfTemplate;\r | |
82 | VOID *TemplateBase;\r | |
83 | EFI_PHYSICAL_ADDRESS VectorAddress;\r | |
84 | UINT32 Index;\r | |
bdfbe63e | 85 | X64_IDT_TABLE *IdtTableForX64;\r |
95276127 | 86 | \r |
87 | Status = PeiServicesAllocatePages (EfiBootServicesData, EFI_SIZE_TO_PAGES (STACK_SIZE), &BaseOfStack);\r | |
88 | ASSERT_EFI_ERROR (Status);\r | |
0cf27ce0 | 89 | \r |
95276127 | 90 | if (FeaturePcdGet(PcdDxeIplSwitchToLongMode)) {\r |
91 | //\r | |
0cf27ce0 | 92 | // Compute the top of the stack we were allocated, which is used to load X64 dxe core.\r |
95276127 | 93 | // Pre-allocate a 32 bytes which confroms to x64 calling convention.\r |
94 | //\r | |
0cf27ce0 | 95 | // The first four parameters to a function are passed in rcx, rdx, r8 and r9.\r |
96 | // Any further parameters are pushed on the stack. Furthermore, space (4 * 8bytes) for the\r | |
97 | // register parameters is reserved on the stack, in case the called function\r | |
98 | // wants to spill them; this is important if the function is variadic.\r | |
95276127 | 99 | //\r |
100 | TopOfStack = BaseOfStack + EFI_SIZE_TO_PAGES (STACK_SIZE) * EFI_PAGE_SIZE - 32;\r | |
101 | \r | |
102 | //\r | |
b98da1b1 | 103 | // x64 Calling Conventions requires that the stack must be aligned to 16 bytes\r |
95276127 | 104 | //\r |
105 | TopOfStack = (EFI_PHYSICAL_ADDRESS) (UINTN) ALIGN_POINTER (TopOfStack, 16);\r | |
106 | \r | |
107 | //\r | |
108 | // Load the GDT of Go64. Since the GDT of 32-bit Tiano locates in the BS_DATA\r | |
0cf27ce0 | 109 | // memory, it may be corrupted when copying FV to high-end memory\r |
95276127 | 110 | //\r |
111 | AsmWriteGdtr (&gGdt);\r | |
112 | //\r | |
113 | // Create page table and save PageMapLevel4 to CR3\r | |
114 | //\r | |
115 | PageTables = CreateIdentityMappingPageTables ();\r | |
116 | \r | |
117 | //\r | |
48557c65 | 118 | // End of PEI phase signal\r |
95276127 | 119 | //\r |
9b937a73 | 120 | Status = PeiServicesInstallPpi (&gEndOfPeiSignalPpi);\r |
95276127 | 121 | ASSERT_EFI_ERROR (Status);\r |
0cf27ce0 | 122 | \r |
95276127 | 123 | AsmWriteCr3 (PageTables);\r |
5d582956 | 124 | \r |
30c8f861 | 125 | //\r |
126 | // Update the contents of BSP stack HOB to reflect the real stack info passed to DxeCore.\r | |
0cf27ce0 | 127 | //\r |
30c8f861 | 128 | UpdateStackHob (BaseOfStack, STACK_SIZE);\r |
5d582956 | 129 | \r |
4bfa7dc4 | 130 | SizeOfTemplate = AsmGetVectorTemplatInfo (&TemplateBase);\r |
131 | \r | |
132 | Status = PeiServicesAllocatePages (\r | |
0cf27ce0 | 133 | EfiBootServicesData,\r |
bdfbe63e | 134 | EFI_SIZE_TO_PAGES(sizeof (X64_IDT_TABLE) + SizeOfTemplate * IDT_ENTRY_COUNT),\r |
135 | (EFI_PHYSICAL_ADDRESS *) &IdtTableForX64\r | |
4bfa7dc4 | 136 | );\r |
137 | ASSERT_EFI_ERROR (Status);\r | |
138 | \r | |
bdfbe63e | 139 | //\r |
140 | // Store EFI_PEI_SERVICES** in the 4 bytes immediately preceding IDT to avoid that\r | |
141 | // it may not be gotten correctly after IDT register is re-written.\r | |
142 | //\r | |
143 | IdtTableForX64->PeiService = GetPeiServicesTablePointer ();\r | |
144 | \r | |
145 | VectorAddress = (EFI_PHYSICAL_ADDRESS) (UINTN) (IdtTableForX64 + 1);\r | |
146 | IdtTable = IdtTableForX64->IdtTable;\r | |
e7af83ae | 147 | for (Index = 0; Index < IDT_ENTRY_COUNT; Index++) {\r |
4bfa7dc4 | 148 | IdtTable[Index].Ia32IdtEntry.Bits.GateType = 0x8e;\r |
149 | IdtTable[Index].Ia32IdtEntry.Bits.Reserved_0 = 0;\r | |
150 | IdtTable[Index].Ia32IdtEntry.Bits.Selector = SYS_CODE64_SEL;\r | |
151 | \r | |
152 | IdtTable[Index].Ia32IdtEntry.Bits.OffsetLow = (UINT16) VectorAddress;\r | |
153 | IdtTable[Index].Ia32IdtEntry.Bits.OffsetHigh = (UINT16) (RShiftU64 (VectorAddress, 16));\r | |
154 | IdtTable[Index].Offset32To63 = (UINT32) (RShiftU64 (VectorAddress, 32));\r | |
155 | IdtTable[Index].Reserved = 0;\r | |
156 | \r | |
157 | CopyMem ((VOID *) (UINTN) VectorAddress, TemplateBase, SizeOfTemplate);\r | |
158 | AsmVectorFixup ((VOID *) (UINTN) VectorAddress, (UINT8) Index);\r | |
159 | \r | |
160 | VectorAddress += SizeOfTemplate;\r | |
5d582956 | 161 | }\r |
4bfa7dc4 | 162 | \r |
163 | gLidtDescriptor.Base = (UINTN) IdtTable;\r | |
0cf27ce0 | 164 | \r |
e7af83ae | 165 | //\r |
166 | // Disable interrupt of Debug timer, since new IDT table cannot handle it.\r | |
167 | //\r | |
168 | SaveAndSetDebugTimerInterrupt (FALSE);\r | |
169 | \r | |
4bfa7dc4 | 170 | AsmWriteIdtr (&gLidtDescriptor);\r |
171 | \r | |
5d582956 | 172 | //\r |
b98da1b1 | 173 | // Go to Long Mode and transfer control to DxeCore.\r |
174 | // Interrupts will not get turned on until the CPU AP is loaded.\r | |
95276127 | 175 | // Call x64 drivers passing in single argument, a pointer to the HOBs.\r |
0cf27ce0 | 176 | //\r |
95276127 | 177 | AsmEnablePaging64 (\r |
178 | SYS_CODE64_SEL,\r | |
179 | DxeCoreEntryPoint,\r | |
180 | (EFI_PHYSICAL_ADDRESS)(UINTN)(HobList.Raw),\r | |
181 | 0,\r | |
182 | TopOfStack\r | |
183 | );\r | |
184 | } else {\r | |
185 | //\r | |
186 | // Compute the top of the stack we were allocated. Pre-allocate a UINTN\r | |
187 | // for safety.\r | |
188 | //\r | |
189 | TopOfStack = BaseOfStack + EFI_SIZE_TO_PAGES (STACK_SIZE) * EFI_PAGE_SIZE - CPU_STACK_ALIGNMENT;\r | |
190 | TopOfStack = (EFI_PHYSICAL_ADDRESS) (UINTN) ALIGN_POINTER (TopOfStack, CPU_STACK_ALIGNMENT);\r | |
191 | \r | |
192 | //\r | |
48557c65 | 193 | // End of PEI phase signal\r |
95276127 | 194 | //\r |
9b937a73 | 195 | Status = PeiServicesInstallPpi (&gEndOfPeiSignalPpi);\r |
95276127 | 196 | ASSERT_EFI_ERROR (Status);\r |
197 | \r | |
30c8f861 | 198 | //\r |
199 | // Update the contents of BSP stack HOB to reflect the real stack info passed to DxeCore.\r | |
0cf27ce0 | 200 | //\r |
30c8f861 | 201 | UpdateStackHob (BaseOfStack, STACK_SIZE);\r |
0cf27ce0 | 202 | \r |
b98da1b1 | 203 | //\r |
204 | // Transfer the control to the entry point of DxeCore.\r | |
205 | //\r | |
95276127 | 206 | SwitchStack (\r |
207 | (SWITCH_STACK_ENTRY_POINT)(UINTN)DxeCoreEntryPoint,\r | |
208 | HobList.Raw,\r | |
209 | NULL,\r | |
210 | (VOID *) (UINTN) TopOfStack\r | |
211 | );\r | |
0cf27ce0 | 212 | }\r |
95276127 | 213 | }\r |
214 | \r |