[mirror_edk2.git] / MdeModulePkg / Core / DxeIplPeim / Ia32 / DxeLoadFunc.c

/** @file\r
  Ia32-specifc functionality for DxeLoad.\r
\r
Copyright (c) 2006 - 2008, Intel Corporation. <BR>\r
All rights reserved. This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution.  The full text of the license may be found at\r
http://opensource.org/licenses/bsd-license.php\r
\r
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
**/\r
\r
#include "DxeIpl.h"\r
#include "VirtualMemory.h"\r
\r
//\r
// Global Descriptor Table (GDT)\r
//\r
GLOBAL_REMOVE_IF_UNREFERENCED IA32_GDT gGdtEntries [] = {\r
/* selector { Global Segment Descriptor                              } */  \r
/* 0x00 */  {{0,      0,  0,  0,    0,  0,  0,  0,    0,  0, 0,  0,  0}}, //null descriptor \r
/* 0x08 */  {{0xffff, 0,  0,  0x2,  1,  0,  1,  0xf,  0,  0, 1,  1,  0}}, //linear data segment descriptor\r
/* 0x10 */  {{0xffff, 0,  0,  0xf,  1,  0,  1,  0xf,  0,  0, 1,  1,  0}}, //linear code segment descriptor\r
/* 0x18 */  {{0xffff, 0,  0,  0x3,  1,  0,  1,  0xf,  0,  0, 1,  1,  0}}, //system data segment descriptor\r
/* 0x20 */  {{0xffff, 0,  0,  0xa,  1,  0,  1,  0xf,  0,  0, 1,  1,  0}}, //system code segment descriptor\r
/* 0x28 */  {{0,      0,  0,  0,    0,  0,  0,  0,    0,  0, 0,  0,  0}}, //spare segment descriptor\r
/* 0x30 */  {{0xffff, 0,  0,  0x2,  1,  0,  1,  0xf,  0,  0, 1,  1,  0}}, //system data segment descriptor\r
/* 0x38 */  {{0xffff, 0,  0,  0xa,  1,  0,  1,  0xf,  0,  1, 0,  1,  0}}, //system code segment descriptor\r
/* 0x40 */  {{0,      0,  0,  0,    0,  0,  0,  0,    0,  0, 0,  0,  0}}, //spare segment descriptor\r
};\r
\r
//\r
// IA32 Gdt register\r
//\r
GLOBAL_REMOVE_IF_UNREFERENCED CONST IA32_DESCRIPTOR gGdt = {\r
  sizeof (gGdtEntries) - 1,\r
  (UINTN) gGdtEntries\r
  };\r
\r
GLOBAL_REMOVE_IF_UNREFERENCED  IA32_DESCRIPTOR gLidtDescriptor = {\r
  sizeof (X64_IDT_GATE_DESCRIPTOR) * 32 - 1,\r
  0\r
};\r
\r
\r
\r
\r
\r
/**\r
   Transfers control to DxeCore.\r
\r
   This function performs a CPU architecture specific operations to execute\r
   the entry point of DxeCore with the parameters of HobList.\r
   It also intalls EFI_END_OF_PEI_PPI to signal the end of PEI phase.\r
\r
   @param DxeCoreEntryPoint         The entrypoint of DxeCore.\r
   @param HobList                   The start of HobList passed to DxeCore.\r
   @param EndOfPeiSignal            The PPI descriptor for EFI_END_OF_PEI_PPI.\r
\r
**/\r
VOID\r
HandOffToDxeCore (\r
  IN EFI_PHYSICAL_ADDRESS   DxeCoreEntryPoint,\r
  IN EFI_PEI_HOB_POINTERS   HobList,\r
  IN EFI_PEI_PPI_DESCRIPTOR *EndOfPeiSignal\r
  )\r
{\r
  EFI_STATUS                Status;\r
  EFI_PHYSICAL_ADDRESS      BaseOfStack;\r
  EFI_PHYSICAL_ADDRESS      TopOfStack;\r
  UINTN                     PageTables;\r
  X64_IDT_GATE_DESCRIPTOR   *IdtTable;\r
  UINTN                     SizeOfTemplate;\r
  VOID                      *TemplateBase;\r
  EFI_PHYSICAL_ADDRESS      VectorAddress;\r
  UINT32                    Index;\r
\r
  Status = PeiServicesAllocatePages (EfiBootServicesData, EFI_SIZE_TO_PAGES (STACK_SIZE), &BaseOfStack);\r
  ASSERT_EFI_ERROR (Status);\r
  \r
  if (FeaturePcdGet(PcdDxeIplSwitchToLongMode)) {\r
    //\r
    // Compute the top of the stack we were allocated, which is used to load X64 dxe core. \r
    // Pre-allocate a 32 bytes which confroms to x64 calling convention.\r
    //\r
    // The first four parameters to a function are passed in rcx, rdx, r8 and r9. \r
    // Any further parameters are pushed on the stack. Furthermore, space (4 * 8bytes) for the \r
    // register parameters is reserved on the stack, in case the called function \r
    // wants to spill them; this is important if the function is variadic. \r
    //\r
    TopOfStack = BaseOfStack + EFI_SIZE_TO_PAGES (STACK_SIZE) * EFI_PAGE_SIZE - 32;\r
\r
    //\r
    //  X64 Calling Conventions requires that the stack must be aligned to 16 bytes\r
    //\r
    TopOfStack = (EFI_PHYSICAL_ADDRESS) (UINTN) ALIGN_POINTER (TopOfStack, 16);\r
\r
    //\r
    // Load the GDT of Go64. Since the GDT of 32-bit Tiano locates in the BS_DATA\r
    // memory, it may be corrupted when copying FV to high-end memory \r
    //\r
    AsmWriteGdtr (&gGdt);\r
    //\r
    // Create page table and save PageMapLevel4 to CR3\r
    //\r
    PageTables = CreateIdentityMappingPageTables ();\r
\r
    //\r
    // End of PEI phase singal\r
    //\r
    Status = PeiServicesInstallPpi (EndOfPeiSignal);\r
    ASSERT_EFI_ERROR (Status);\r
    \r
    AsmWriteCr3 (PageTables);\r
\r
    //\r
    // Update the contents of BSP stack HOB to reflect the real stack info passed to DxeCore.\r
    //    \r
    UpdateStackHob (BaseOfStack, STACK_SIZE);\r
\r
    if (FeaturePcdGet (PcdDxeIplEnableIdt)) {\r
      SizeOfTemplate = AsmGetVectorTemplatInfo (&TemplateBase);\r
  \r
      Status = PeiServicesAllocatePages (\r
                 EfiBootServicesData, \r
                 EFI_SIZE_TO_PAGES((SizeOfTemplate + sizeof (X64_IDT_GATE_DESCRIPTOR)) * 32), \r
                 &VectorAddress\r
                 );\r
  \r
      ASSERT_EFI_ERROR (Status);\r
  \r
      IdtTable      = (X64_IDT_GATE_DESCRIPTOR *) (UINTN) (VectorAddress + SizeOfTemplate * 32);\r
      for (Index = 0; Index < 32; Index++) {\r
        IdtTable[Index].Ia32IdtEntry.Bits.GateType    =  0x8e;\r
        IdtTable[Index].Ia32IdtEntry.Bits.Reserved_0  =  0;\r
        IdtTable[Index].Ia32IdtEntry.Bits.Selector    =  SYS_CODE64_SEL;\r
  \r
        IdtTable[Index].Ia32IdtEntry.Bits.OffsetLow   = (UINT16) VectorAddress;\r
        IdtTable[Index].Ia32IdtEntry.Bits.OffsetHigh  = (UINT16) (RShiftU64 (VectorAddress, 16));\r
        IdtTable[Index].Offset32To63                  = (UINT32) (RShiftU64 (VectorAddress, 32));\r
        IdtTable[Index].Reserved                      = 0;\r
  \r
        CopyMem ((VOID *) (UINTN) VectorAddress, TemplateBase, SizeOfTemplate);\r
        AsmVectorFixup ((VOID *) (UINTN) VectorAddress, (UINT8) Index);\r
  \r
        VectorAddress += SizeOfTemplate;\r
      }\r
  \r
      gLidtDescriptor.Base = (UINTN) IdtTable;\r
      AsmWriteIdtr (&gLidtDescriptor);\r
    }\r
    //\r
    // Go to Long Mode. Interrupts will not get turned on until the CPU AP is loaded.\r
    // Call x64 drivers passing in single argument, a pointer to the HOBs.\r
    // \r
    AsmEnablePaging64 (\r
      SYS_CODE64_SEL,\r
      DxeCoreEntryPoint,\r
      (EFI_PHYSICAL_ADDRESS)(UINTN)(HobList.Raw),\r
      0,\r
      TopOfStack\r
      );\r
  } else {\r
    //\r
    // Compute the top of the stack we were allocated. Pre-allocate a UINTN\r
    // for safety.\r
    //\r
    TopOfStack = BaseOfStack + EFI_SIZE_TO_PAGES (STACK_SIZE) * EFI_PAGE_SIZE - CPU_STACK_ALIGNMENT;\r
    TopOfStack = (EFI_PHYSICAL_ADDRESS) (UINTN) ALIGN_POINTER (TopOfStack, CPU_STACK_ALIGNMENT);\r
\r
    //\r
    // End of PEI phase singal\r
    //\r
    Status = PeiServicesInstallPpi (EndOfPeiSignal);\r
    ASSERT_EFI_ERROR (Status);\r
\r
    //\r
    // Update the contents of BSP stack HOB to reflect the real stack info passed to DxeCore.\r
    //    \r
    UpdateStackHob (BaseOfStack, STACK_SIZE);\r
\r
    SwitchStack (\r
      (SWITCH_STACK_ENTRY_POINT)(UINTN)DxeCoreEntryPoint,\r
      HobList.Raw,\r
      NULL,\r
      (VOID *) (UINTN) TopOfStack\r
      );\r
  } \r
}\r
\r
Commit	Line	Data
96226baa	1	/** @file\r
96226baa	2	Ia32-specifc functionality for DxeLoad.\r
95276127	3	\r
96226baa	4	Copyright (c) 2006 - 2008, Intel Corporation. <BR>\r
95276127	5	All rights reserved. This program and the accompanying materials\r
	6	are licensed and made available under the terms and conditions of the BSD License\r
	7	which accompanies this distribution. The full text of the license may be found at\r
	8	http://opensource.org/licenses/bsd-license.php\r
	9	\r
	10	THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
	11	WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
	12	\r
96226baa	13	**/\r
95276127	14	\r
95276127	15	#include "DxeIpl.h"\r
	16	#include "VirtualMemory.h"\r
	17	\r
	18	//\r
	19	// Global Descriptor Table (GDT)\r
	20	//\r
	21	GLOBAL_REMOVE_IF_UNREFERENCED IA32_GDT gGdtEntries [] = {\r
	22	/* selector { Global Segment Descriptor } */ \r
	23	/* 0x00 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, //null descriptor \r
	24	/* 0x08 */ {{0xffff, 0, 0, 0x2, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //linear data segment descriptor\r
	25	/* 0x10 */ {{0xffff, 0, 0, 0xf, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //linear code segment descriptor\r
	26	/* 0x18 */ {{0xffff, 0, 0, 0x3, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //system data segment descriptor\r
	27	/* 0x20 */ {{0xffff, 0, 0, 0xa, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //system code segment descriptor\r
	28	/* 0x28 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, //spare segment descriptor\r
	29	/* 0x30 */ {{0xffff, 0, 0, 0x2, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //system data segment descriptor\r
	30	/* 0x38 */ {{0xffff, 0, 0, 0xa, 1, 0, 1, 0xf, 0, 1, 0, 1, 0}}, //system code segment descriptor\r
	31	/* 0x40 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, //spare segment descriptor\r
	32	};\r
	33	\r
	34	//\r
	35	// IA32 Gdt register\r
	36	//\r
	37	GLOBAL_REMOVE_IF_UNREFERENCED CONST IA32_DESCRIPTOR gGdt = {\r
	38	sizeof (gGdtEntries) - 1,\r
	39	(UINTN) gGdtEntries\r
	40	};\r
	41	\r
5d582956	42	GLOBAL_REMOVE_IF_UNREFERENCED IA32_DESCRIPTOR gLidtDescriptor = {\r
	43	sizeof (X64_IDT_GATE_DESCRIPTOR) * 32 - 1,\r
	44	0\r
	45	};\r
	46	\r
91d92e25	47	\r
	48	\r
	49	\r
	50	\r
	51	/**\r
	52	Transfers control to DxeCore.\r
	53	\r
	54	This function performs a CPU architecture specific operations to execute\r
	55	the entry point of DxeCore with the parameters of HobList.\r
	56	It also intalls EFI_END_OF_PEI_PPI to signal the end of PEI phase.\r
	57	\r
	58	@param DxeCoreEntryPoint The entrypoint of DxeCore.\r
	59	@param HobList The start of HobList passed to DxeCore.\r
	60	@param EndOfPeiSignal The PPI descriptor for EFI_END_OF_PEI_PPI.\r
	61	\r
	62	**/\r
95276127	63	VOID\r
	64	HandOffToDxeCore (\r
	65	IN EFI_PHYSICAL_ADDRESS DxeCoreEntryPoint,\r
	66	IN EFI_PEI_HOB_POINTERS HobList,\r
	67	IN EFI_PEI_PPI_DESCRIPTOR *EndOfPeiSignal\r
	68	)\r
	69	{\r
	70	EFI_STATUS Status;\r
	71	EFI_PHYSICAL_ADDRESS BaseOfStack;\r
	72	EFI_PHYSICAL_ADDRESS TopOfStack;\r
	73	UINTN PageTables;\r
5d582956	74	X64_IDT_GATE_DESCRIPTOR *IdtTable;\r
	75	UINTN SizeOfTemplate;\r
	76	VOID *TemplateBase;\r
	77	EFI_PHYSICAL_ADDRESS VectorAddress;\r
	78	UINT32 Index;\r
95276127	79	\r
	80	Status = PeiServicesAllocatePages (EfiBootServicesData, EFI_SIZE_TO_PAGES (STACK_SIZE), &BaseOfStack);\r
	81	ASSERT_EFI_ERROR (Status);\r
	82	\r
	83	if (FeaturePcdGet(PcdDxeIplSwitchToLongMode)) {\r
	84	//\r
	85	// Compute the top of the stack we were allocated, which is used to load X64 dxe core. \r
	86	// Pre-allocate a 32 bytes which confroms to x64 calling convention.\r
	87	//\r
	88	// The first four parameters to a function are passed in rcx, rdx, r8 and r9. \r
	89	// Any further parameters are pushed on the stack. Furthermore, space (4 * 8bytes) for the \r
	90	// register parameters is reserved on the stack, in case the called function \r
	91	// wants to spill them; this is important if the function is variadic. \r
	92	//\r
	93	TopOfStack = BaseOfStack + EFI_SIZE_TO_PAGES (STACK_SIZE) * EFI_PAGE_SIZE - 32;\r
	94	\r
	95	//\r
	96	// X64 Calling Conventions requires that the stack must be aligned to 16 bytes\r
	97	//\r
	98	TopOfStack = (EFI_PHYSICAL_ADDRESS) (UINTN) ALIGN_POINTER (TopOfStack, 16);\r
	99	\r
	100	//\r
	101	// Load the GDT of Go64. Since the GDT of 32-bit Tiano locates in the BS_DATA\r
	102	// memory, it may be corrupted when copying FV to high-end memory \r
	103	//\r
	104	AsmWriteGdtr (&gGdt);\r
	105	//\r
	106	// Create page table and save PageMapLevel4 to CR3\r
	107	//\r
	108	PageTables = CreateIdentityMappingPageTables ();\r
	109	\r
	110	//\r
	111	// End of PEI phase singal\r
	112	//\r
	113	Status = PeiServicesInstallPpi (EndOfPeiSignal);\r
	114	ASSERT_EFI_ERROR (Status);\r
	115	\r
	116	AsmWriteCr3 (PageTables);\r
5d582956	117	\r
30c8f861	118	//\r
	119	// Update the contents of BSP stack HOB to reflect the real stack info passed to DxeCore.\r
	120	// \r
	121	UpdateStackHob (BaseOfStack, STACK_SIZE);\r
5d582956	122	\r
	123	if (FeaturePcdGet (PcdDxeIplEnableIdt)) {\r
	124	SizeOfTemplate = AsmGetVectorTemplatInfo (&TemplateBase);\r
	125	\r
	126	Status = PeiServicesAllocatePages (\r
	127	EfiBootServicesData, \r
	128	EFI_SIZE_TO_PAGES((SizeOfTemplate + sizeof (X64_IDT_GATE_DESCRIPTOR)) * 32), \r
	129	&VectorAddress\r
	130	);\r
	131	\r
	132	ASSERT_EFI_ERROR (Status);\r
	133	\r
	134	IdtTable = (X64_IDT_GATE_DESCRIPTOR ) (UINTN) (VectorAddress + SizeOfTemplate 32);\r
	135	for (Index = 0; Index < 32; Index++) {\r
	136	IdtTable[Index].Ia32IdtEntry.Bits.GateType = 0x8e;\r
	137	IdtTable[Index].Ia32IdtEntry.Bits.Reserved_0 = 0;\r
	138	IdtTable[Index].Ia32IdtEntry.Bits.Selector = SYS_CODE64_SEL;\r
	139	\r
	140	IdtTable[Index].Ia32IdtEntry.Bits.OffsetLow = (UINT16) VectorAddress;\r
f0a505a3	141	IdtTable[Index].Ia32IdtEntry.Bits.OffsetHigh = (UINT16) (RShiftU64 (VectorAddress, 16));\r
f0a505a3	142	IdtTable[Index].Offset32To63 = (UINT32) (RShiftU64 (VectorAddress, 32));\r
5d582956	143	IdtTable[Index].Reserved = 0;\r
	144	\r
	145	CopyMem ((VOID *) (UINTN) VectorAddress, TemplateBase, SizeOfTemplate);\r
	146	AsmVectorFixup ((VOID *) (UINTN) VectorAddress, (UINT8) Index);\r
	147	\r
	148	VectorAddress += SizeOfTemplate;\r
	149	}\r
	150	\r
	151	gLidtDescriptor.Base = (UINTN) IdtTable;\r
	152	AsmWriteIdtr (&gLidtDescriptor);\r
	153	}\r
	154	//\r
95276127	155	// Go to Long Mode. Interrupts will not get turned on until the CPU AP is loaded.\r
	156	// Call x64 drivers passing in single argument, a pointer to the HOBs.\r
	157	// \r
	158	AsmEnablePaging64 (\r
	159	SYS_CODE64_SEL,\r
	160	DxeCoreEntryPoint,\r
	161	(EFI_PHYSICAL_ADDRESS)(UINTN)(HobList.Raw),\r
	162	0,\r
	163	TopOfStack\r
	164	);\r
	165	} else {\r
	166	//\r
	167	// Compute the top of the stack we were allocated. Pre-allocate a UINTN\r
	168	// for safety.\r
	169	//\r
	170	TopOfStack = BaseOfStack + EFI_SIZE_TO_PAGES (STACK_SIZE) * EFI_PAGE_SIZE - CPU_STACK_ALIGNMENT;\r
	171	TopOfStack = (EFI_PHYSICAL_ADDRESS) (UINTN) ALIGN_POINTER (TopOfStack, CPU_STACK_ALIGNMENT);\r
	172	\r
	173	//\r
	174	// End of PEI phase singal\r
	175	//\r
	176	Status = PeiServicesInstallPpi (EndOfPeiSignal);\r
	177	ASSERT_EFI_ERROR (Status);\r
	178	\r
30c8f861	179	//\r
	180	// Update the contents of BSP stack HOB to reflect the real stack info passed to DxeCore.\r
	181	// \r
	182	UpdateStackHob (BaseOfStack, STACK_SIZE);\r
	183	\r
95276127	184	SwitchStack (\r
	185	(SWITCH_STACK_ENTRY_POINT)(UINTN)DxeCoreEntryPoint,\r
	186	HobList.Raw,\r
	187	NULL,\r
	188	(VOID *) (UINTN) TopOfStack\r
	189	);\r
	190	} \r
	191	}\r
	192	\r