[mirror_edk2.git] / MdeModulePkg / Core / DxeIplPeim / Ia32 / DxeLoadFunc.c

/** @file\r
  Ia32-specifc functionality for DxeLoad.\r
\r
Copyright (c) 2006 - 2008, Intel Corporation. <BR>\r
All rights reserved. This program and the accompanying materials\r
are licensed and made available under the terms and conditions of the BSD License\r
which accompanies this distribution.  The full text of the license may be found at\r
http://opensource.org/licenses/bsd-license.php\r
\r
THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
**/\r
\r
#include "DxeIpl.h"\r
#include "VirtualMemory.h"\r
\r
//\r
// Global Descriptor Table (GDT)\r
//\r
GLOBAL_REMOVE_IF_UNREFERENCED IA32_GDT gGdtEntries[] = {\r
/* selector { Global Segment Descriptor                              } */  \r
/* 0x00 */  {{0,      0,  0,  0,    0,  0,  0,  0,    0,  0, 0,  0,  0}}, //null descriptor \r
/* 0x08 */  {{0xffff, 0,  0,  0x2,  1,  0,  1,  0xf,  0,  0, 1,  1,  0}}, //linear data segment descriptor\r
/* 0x10 */  {{0xffff, 0,  0,  0xf,  1,  0,  1,  0xf,  0,  0, 1,  1,  0}}, //linear code segment descriptor\r
/* 0x18 */  {{0xffff, 0,  0,  0x3,  1,  0,  1,  0xf,  0,  0, 1,  1,  0}}, //system data segment descriptor\r
/* 0x20 */  {{0xffff, 0,  0,  0xa,  1,  0,  1,  0xf,  0,  0, 1,  1,  0}}, //system code segment descriptor\r
/* 0x28 */  {{0,      0,  0,  0,    0,  0,  0,  0,    0,  0, 0,  0,  0}}, //spare segment descriptor\r
/* 0x30 */  {{0xffff, 0,  0,  0x2,  1,  0,  1,  0xf,  0,  0, 1,  1,  0}}, //system data segment descriptor\r
/* 0x38 */  {{0xffff, 0,  0,  0xa,  1,  0,  1,  0xf,  0,  1, 0,  1,  0}}, //system code segment descriptor\r
/* 0x40 */  {{0,      0,  0,  0,    0,  0,  0,  0,    0,  0, 0,  0,  0}}, //spare segment descriptor\r
};\r
\r
//\r
// IA32 Gdt register\r
//\r
GLOBAL_REMOVE_IF_UNREFERENCED CONST IA32_DESCRIPTOR gGdt = {\r
  sizeof (gGdtEntries) - 1,\r
  (UINTN) gGdtEntries\r
  };\r
\r
GLOBAL_REMOVE_IF_UNREFERENCED  IA32_DESCRIPTOR gLidtDescriptor = {\r
  sizeof (X64_IDT_GATE_DESCRIPTOR) * 32 - 1,\r
  0\r
};\r
\r
/**\r
   Transfers control to DxeCore.\r
\r
   This function performs a CPU architecture specific operations to execute\r
   the entry point of DxeCore with the parameters of HobList.\r
   It also intalls EFI_END_OF_PEI_PPI to signal the end of PEI phase.\r
\r
   @param DxeCoreEntryPoint         The entrypoint of DxeCore.\r
   @param HobList                   The start of HobList passed to DxeCore.\r
   @param EndOfPeiSignal            The PPI descriptor for EFI_END_OF_PEI_PPI.\r
\r
**/\r
VOID\r
HandOffToDxeCore (\r
  IN EFI_PHYSICAL_ADDRESS   DxeCoreEntryPoint,\r
  IN EFI_PEI_HOB_POINTERS   HobList,\r
  IN EFI_PEI_PPI_DESCRIPTOR *EndOfPeiSignal\r
  )\r
{\r
  EFI_STATUS                Status;\r
  EFI_PHYSICAL_ADDRESS      BaseOfStack;\r
  EFI_PHYSICAL_ADDRESS      TopOfStack;\r
  UINTN                     PageTables;\r
  X64_IDT_GATE_DESCRIPTOR   *IdtTable;\r
  UINTN                     SizeOfTemplate;\r
  VOID                      *TemplateBase;\r
  EFI_PHYSICAL_ADDRESS      VectorAddress;\r
  UINT32                    Index;\r
\r
  Status = PeiServicesAllocatePages (EfiBootServicesData, EFI_SIZE_TO_PAGES (STACK_SIZE), &BaseOfStack);\r
  ASSERT_EFI_ERROR (Status);\r
  \r
  if (FeaturePcdGet(PcdDxeIplSwitchToLongMode)) {\r
    //\r
    // Compute the top of the stack we were allocated, which is used to load X64 dxe core. \r
    // Pre-allocate a 32 bytes which confroms to x64 calling convention.\r
    //\r
    // The first four parameters to a function are passed in rcx, rdx, r8 and r9. \r
    // Any further parameters are pushed on the stack. Furthermore, space (4 * 8bytes) for the \r
    // register parameters is reserved on the stack, in case the called function \r
    // wants to spill them; this is important if the function is variadic. \r
    //\r
    TopOfStack = BaseOfStack + EFI_SIZE_TO_PAGES (STACK_SIZE) * EFI_PAGE_SIZE - 32;\r
\r
    //\r
    //  x64 Calling Conventions requires that the stack must be aligned to 16 bytes\r
    //\r
    TopOfStack = (EFI_PHYSICAL_ADDRESS) (UINTN) ALIGN_POINTER (TopOfStack, 16);\r
\r
    //\r
    // Load the GDT of Go64. Since the GDT of 32-bit Tiano locates in the BS_DATA\r
    // memory, it may be corrupted when copying FV to high-end memory \r
    //\r
    AsmWriteGdtr (&gGdt);\r
    //\r
    // Create page table and save PageMapLevel4 to CR3\r
    //\r
    PageTables = CreateIdentityMappingPageTables ();\r
\r
    //\r
    // End of PEI phase singal\r
    //\r
    Status = PeiServicesInstallPpi (EndOfPeiSignal);\r
    ASSERT_EFI_ERROR (Status);\r
    \r
    AsmWriteCr3 (PageTables);\r
\r
    //\r
    // Update the contents of BSP stack HOB to reflect the real stack info passed to DxeCore.\r
    //    \r
    UpdateStackHob (BaseOfStack, STACK_SIZE);\r
\r
    if (FeaturePcdGet (PcdDxeIplEnableIdt)) {\r
      SizeOfTemplate = AsmGetVectorTemplatInfo (&TemplateBase);\r
  \r
      Status = PeiServicesAllocatePages (\r
                 EfiBootServicesData, \r
                 EFI_SIZE_TO_PAGES((SizeOfTemplate + sizeof (X64_IDT_GATE_DESCRIPTOR)) * 32), \r
                 &VectorAddress\r
                 );\r
      ASSERT_EFI_ERROR (Status);\r
  \r
      IdtTable      = (X64_IDT_GATE_DESCRIPTOR *) (UINTN) (VectorAddress + SizeOfTemplate * 32);\r
      for (Index = 0; Index < 32; Index++) {\r
        IdtTable[Index].Ia32IdtEntry.Bits.GateType    =  0x8e;\r
        IdtTable[Index].Ia32IdtEntry.Bits.Reserved_0  =  0;\r
        IdtTable[Index].Ia32IdtEntry.Bits.Selector    =  SYS_CODE64_SEL;\r
  \r
        IdtTable[Index].Ia32IdtEntry.Bits.OffsetLow   = (UINT16) VectorAddress;\r
        IdtTable[Index].Ia32IdtEntry.Bits.OffsetHigh  = (UINT16) (RShiftU64 (VectorAddress, 16));\r
        IdtTable[Index].Offset32To63                  = (UINT32) (RShiftU64 (VectorAddress, 32));\r
        IdtTable[Index].Reserved                      = 0;\r
  \r
        CopyMem ((VOID *) (UINTN) VectorAddress, TemplateBase, SizeOfTemplate);\r
        AsmVectorFixup ((VOID *) (UINTN) VectorAddress, (UINT8) Index);\r
  \r
        VectorAddress += SizeOfTemplate;\r
      }\r
  \r
      gLidtDescriptor.Base = (UINTN) IdtTable;\r
      AsmWriteIdtr (&gLidtDescriptor);\r
    }\r
    //\r
    // Go to Long Mode and transfer control to DxeCore.\r
    // Interrupts will not get turned on until the CPU AP is loaded.\r
    // Call x64 drivers passing in single argument, a pointer to the HOBs.\r
    // \r
    AsmEnablePaging64 (\r
      SYS_CODE64_SEL,\r
      DxeCoreEntryPoint,\r
      (EFI_PHYSICAL_ADDRESS)(UINTN)(HobList.Raw),\r
      0,\r
      TopOfStack\r
      );\r
  } else {\r
    //\r
    // Compute the top of the stack we were allocated. Pre-allocate a UINTN\r
    // for safety.\r
    //\r
    TopOfStack = BaseOfStack + EFI_SIZE_TO_PAGES (STACK_SIZE) * EFI_PAGE_SIZE - CPU_STACK_ALIGNMENT;\r
    TopOfStack = (EFI_PHYSICAL_ADDRESS) (UINTN) ALIGN_POINTER (TopOfStack, CPU_STACK_ALIGNMENT);\r
\r
    //\r
    // End of PEI phase singal\r
    //\r
    Status = PeiServicesInstallPpi (EndOfPeiSignal);\r
    ASSERT_EFI_ERROR (Status);\r
\r
    //\r
    // Update the contents of BSP stack HOB to reflect the real stack info passed to DxeCore.\r
    //    \r
    UpdateStackHob (BaseOfStack, STACK_SIZE);\r
    \r
    //\r
    // Transfer the control to the entry point of DxeCore.\r
    //\r
    SwitchStack (\r
      (SWITCH_STACK_ENTRY_POINT)(UINTN)DxeCoreEntryPoint,\r
      HobList.Raw,\r
      NULL,\r
      (VOID *) (UINTN) TopOfStack\r
      );\r
  } \r
}\r
\r
Commit	Line	Data
96226baa	1	/** @file\r
96226baa	2	Ia32-specifc functionality for DxeLoad.\r
95276127	3	\r
96226baa	4	Copyright (c) 2006 - 2008, Intel Corporation. <BR>\r
95276127	5	All rights reserved. This program and the accompanying materials\r
	6	are licensed and made available under the terms and conditions of the BSD License\r
	7	which accompanies this distribution. The full text of the license may be found at\r
	8	http://opensource.org/licenses/bsd-license.php\r
	9	\r
	10	THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
	11	WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
	12	\r
96226baa	13	**/\r
95276127	14	\r
95276127	15	#include "DxeIpl.h"\r
	16	#include "VirtualMemory.h"\r
	17	\r
	18	//\r
	19	// Global Descriptor Table (GDT)\r
	20	//\r
b98da1b1	21	GLOBAL_REMOVE_IF_UNREFERENCED IA32_GDT gGdtEntries[] = {\r
95276127	22	/* selector { Global Segment Descriptor } */ \r
	23	/* 0x00 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, //null descriptor \r
	24	/* 0x08 */ {{0xffff, 0, 0, 0x2, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //linear data segment descriptor\r
	25	/* 0x10 */ {{0xffff, 0, 0, 0xf, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //linear code segment descriptor\r
	26	/* 0x18 */ {{0xffff, 0, 0, 0x3, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //system data segment descriptor\r
	27	/* 0x20 */ {{0xffff, 0, 0, 0xa, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //system code segment descriptor\r
	28	/* 0x28 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, //spare segment descriptor\r
	29	/* 0x30 */ {{0xffff, 0, 0, 0x2, 1, 0, 1, 0xf, 0, 0, 1, 1, 0}}, //system data segment descriptor\r
	30	/* 0x38 */ {{0xffff, 0, 0, 0xa, 1, 0, 1, 0xf, 0, 1, 0, 1, 0}}, //system code segment descriptor\r
	31	/* 0x40 */ {{0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0}}, //spare segment descriptor\r
	32	};\r
	33	\r
	34	//\r
	35	// IA32 Gdt register\r
	36	//\r
	37	GLOBAL_REMOVE_IF_UNREFERENCED CONST IA32_DESCRIPTOR gGdt = {\r
	38	sizeof (gGdtEntries) - 1,\r
	39	(UINTN) gGdtEntries\r
	40	};\r
	41	\r
5d582956	42	GLOBAL_REMOVE_IF_UNREFERENCED IA32_DESCRIPTOR gLidtDescriptor = {\r
	43	sizeof (X64_IDT_GATE_DESCRIPTOR) * 32 - 1,\r
	44	0\r
	45	};\r
	46	\r
91d92e25	47	/**\r
	48	Transfers control to DxeCore.\r
	49	\r
	50	This function performs a CPU architecture specific operations to execute\r
	51	the entry point of DxeCore with the parameters of HobList.\r
	52	It also intalls EFI_END_OF_PEI_PPI to signal the end of PEI phase.\r
	53	\r
	54	@param DxeCoreEntryPoint The entrypoint of DxeCore.\r
	55	@param HobList The start of HobList passed to DxeCore.\r
	56	@param EndOfPeiSignal The PPI descriptor for EFI_END_OF_PEI_PPI.\r
	57	\r
	58	**/\r
95276127	59	VOID\r
	60	HandOffToDxeCore (\r
	61	IN EFI_PHYSICAL_ADDRESS DxeCoreEntryPoint,\r
	62	IN EFI_PEI_HOB_POINTERS HobList,\r
	63	IN EFI_PEI_PPI_DESCRIPTOR *EndOfPeiSignal\r
	64	)\r
	65	{\r
	66	EFI_STATUS Status;\r
	67	EFI_PHYSICAL_ADDRESS BaseOfStack;\r
	68	EFI_PHYSICAL_ADDRESS TopOfStack;\r
	69	UINTN PageTables;\r
5d582956	70	X64_IDT_GATE_DESCRIPTOR *IdtTable;\r
	71	UINTN SizeOfTemplate;\r
	72	VOID *TemplateBase;\r
	73	EFI_PHYSICAL_ADDRESS VectorAddress;\r
	74	UINT32 Index;\r
95276127	75	\r
	76	Status = PeiServicesAllocatePages (EfiBootServicesData, EFI_SIZE_TO_PAGES (STACK_SIZE), &BaseOfStack);\r
	77	ASSERT_EFI_ERROR (Status);\r
	78	\r
	79	if (FeaturePcdGet(PcdDxeIplSwitchToLongMode)) {\r
	80	//\r
	81	// Compute the top of the stack we were allocated, which is used to load X64 dxe core. \r
	82	// Pre-allocate a 32 bytes which confroms to x64 calling convention.\r
	83	//\r
	84	// The first four parameters to a function are passed in rcx, rdx, r8 and r9. \r
	85	// Any further parameters are pushed on the stack. Furthermore, space (4 * 8bytes) for the \r
	86	// register parameters is reserved on the stack, in case the called function \r
	87	// wants to spill them; this is important if the function is variadic. \r
	88	//\r
	89	TopOfStack = BaseOfStack + EFI_SIZE_TO_PAGES (STACK_SIZE) * EFI_PAGE_SIZE - 32;\r
	90	\r
	91	//\r
b98da1b1	92	// x64 Calling Conventions requires that the stack must be aligned to 16 bytes\r
95276127	93	//\r
	94	TopOfStack = (EFI_PHYSICAL_ADDRESS) (UINTN) ALIGN_POINTER (TopOfStack, 16);\r
	95	\r
	96	//\r
	97	// Load the GDT of Go64. Since the GDT of 32-bit Tiano locates in the BS_DATA\r
	98	// memory, it may be corrupted when copying FV to high-end memory \r
	99	//\r
	100	AsmWriteGdtr (&gGdt);\r
	101	//\r
	102	// Create page table and save PageMapLevel4 to CR3\r
	103	//\r
	104	PageTables = CreateIdentityMappingPageTables ();\r
	105	\r
	106	//\r
	107	// End of PEI phase singal\r
	108	//\r
	109	Status = PeiServicesInstallPpi (EndOfPeiSignal);\r
	110	ASSERT_EFI_ERROR (Status);\r
	111	\r
	112	AsmWriteCr3 (PageTables);\r
5d582956	113	\r
30c8f861	114	//\r
	115	// Update the contents of BSP stack HOB to reflect the real stack info passed to DxeCore.\r
	116	// \r
	117	UpdateStackHob (BaseOfStack, STACK_SIZE);\r
5d582956	118	\r
	119	if (FeaturePcdGet (PcdDxeIplEnableIdt)) {\r
	120	SizeOfTemplate = AsmGetVectorTemplatInfo (&TemplateBase);\r
	121	\r
	122	Status = PeiServicesAllocatePages (\r
	123	EfiBootServicesData, \r
	124	EFI_SIZE_TO_PAGES((SizeOfTemplate + sizeof (X64_IDT_GATE_DESCRIPTOR)) * 32), \r
	125	&VectorAddress\r
	126	);\r
5d582956	127	ASSERT_EFI_ERROR (Status);\r
	128	\r
	129	IdtTable = (X64_IDT_GATE_DESCRIPTOR ) (UINTN) (VectorAddress + SizeOfTemplate 32);\r
	130	for (Index = 0; Index < 32; Index++) {\r
	131	IdtTable[Index].Ia32IdtEntry.Bits.GateType = 0x8e;\r
	132	IdtTable[Index].Ia32IdtEntry.Bits.Reserved_0 = 0;\r
	133	IdtTable[Index].Ia32IdtEntry.Bits.Selector = SYS_CODE64_SEL;\r
	134	\r
	135	IdtTable[Index].Ia32IdtEntry.Bits.OffsetLow = (UINT16) VectorAddress;\r
f0a505a3	136	IdtTable[Index].Ia32IdtEntry.Bits.OffsetHigh = (UINT16) (RShiftU64 (VectorAddress, 16));\r
f0a505a3	137	IdtTable[Index].Offset32To63 = (UINT32) (RShiftU64 (VectorAddress, 32));\r
5d582956	138	IdtTable[Index].Reserved = 0;\r
	139	\r
	140	CopyMem ((VOID *) (UINTN) VectorAddress, TemplateBase, SizeOfTemplate);\r
	141	AsmVectorFixup ((VOID *) (UINTN) VectorAddress, (UINT8) Index);\r
	142	\r
	143	VectorAddress += SizeOfTemplate;\r
	144	}\r
	145	\r
	146	gLidtDescriptor.Base = (UINTN) IdtTable;\r
	147	AsmWriteIdtr (&gLidtDescriptor);\r
	148	}\r
	149	//\r
b98da1b1	150	// Go to Long Mode and transfer control to DxeCore.\r
b98da1b1	151	// Interrupts will not get turned on until the CPU AP is loaded.\r
95276127	152	// Call x64 drivers passing in single argument, a pointer to the HOBs.\r
	153	// \r
	154	AsmEnablePaging64 (\r
	155	SYS_CODE64_SEL,\r
	156	DxeCoreEntryPoint,\r
	157	(EFI_PHYSICAL_ADDRESS)(UINTN)(HobList.Raw),\r
	158	0,\r
	159	TopOfStack\r
	160	);\r
	161	} else {\r
	162	//\r
	163	// Compute the top of the stack we were allocated. Pre-allocate a UINTN\r
	164	// for safety.\r
	165	//\r
	166	TopOfStack = BaseOfStack + EFI_SIZE_TO_PAGES (STACK_SIZE) * EFI_PAGE_SIZE - CPU_STACK_ALIGNMENT;\r
	167	TopOfStack = (EFI_PHYSICAL_ADDRESS) (UINTN) ALIGN_POINTER (TopOfStack, CPU_STACK_ALIGNMENT);\r
	168	\r
	169	//\r
	170	// End of PEI phase singal\r
	171	//\r
	172	Status = PeiServicesInstallPpi (EndOfPeiSignal);\r
	173	ASSERT_EFI_ERROR (Status);\r
	174	\r
30c8f861	175	//\r
	176	// Update the contents of BSP stack HOB to reflect the real stack info passed to DxeCore.\r
	177	// \r
	178	UpdateStackHob (BaseOfStack, STACK_SIZE);\r
b98da1b1	179	\r
	180	//\r
	181	// Transfer the control to the entry point of DxeCore.\r
	182	//\r
95276127	183	SwitchStack (\r
	184	(SWITCH_STACK_ENTRY_POINT)(UINTN)DxeCoreEntryPoint,\r
	185	HobList.Raw,\r
	186	NULL,\r
	187	(VOID *) (UINTN) TopOfStack\r
	188	);\r
	189	} \r
	190	}\r
	191	\r