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1;/** @file\r
2;\r
3; IDT vector entry.\r
4;\r
5; Copyright (c) 2007 - 2016, Intel Corporation. All rights reserved.<BR>\r
9d510e61 6; SPDX-License-Identifier: BSD-2-Clause-Patent\r
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7;\r
8;**/\r
9\r
10 SECTION .text\r
11\r
12;\r
13;------------------------------------------------------------------------------\r
14; Generic IDT Vector Handlers for the Host.\r
15;\r
16;------------------------------------------------------------------------------\r
17\r
18ALIGN 8\r
19global ASM_PFX(AsmGetVectorTemplatInfo)\r
20global ASM_PFX(AsmVectorFixup)\r
21\r
22@VectorTemplateBase:\r
23 push eax\r
24 db 0x6a ; push #VectorNumber\r
25@VectorNum:\r
26 db 0\r
27 mov eax, CommonInterruptEntry\r
28 jmp eax\r
29@VectorTemplateEnd:\r
30\r
31global ASM_PFX(AsmGetVectorTemplatInfo)\r
32ASM_PFX(AsmGetVectorTemplatInfo):\r
33 mov ecx, [esp + 4]\r
34 mov dword [ecx], @VectorTemplateBase\r
35 mov eax, (@VectorTemplateEnd - @VectorTemplateBase)\r
36 ret\r
37\r
38global ASM_PFX(AsmVectorFixup)\r
39ASM_PFX(AsmVectorFixup):\r
40 mov eax, dword [esp + 8]\r
41 mov ecx, [esp + 4]\r
42 mov [ecx + (@VectorNum - @VectorTemplateBase)], al\r
43 ret\r
44\r
45;---------------------------------------;\r
46; CommonInterruptEntry ;\r
47;---------------------------------------;\r
48; The follow algorithm is used for the common interrupt routine.\r
49\r
50;\r
51; +---------------------+ <-- 16-byte aligned ensured by processor\r
52; + Old SS +\r
53; +---------------------+\r
54; + Old RSP +\r
55; +---------------------+\r
56; + RFlags +\r
57; +---------------------+\r
58; + CS +\r
59; +---------------------+\r
60; + RIP +\r
61; +---------------------+\r
62; + Error Code +\r
63; +---------------------+\r
64; + Vector Number +\r
65; +---------------------+\r
66\r
67CommonInterruptEntry:\r
68 cli\r
69\r
70 jmp $\r
71\r