[mirror_edk2.git] / MdeModulePkg / Core / Pei / Ipf / IpfCpuCore.s

//\r
// Include common header file for this module.\r
//\r
#include "CommonHeader.h"\r
\r
//++\r
// Copyright (c) 2006, Intel Corporation\r
// All rights reserved. This program and the accompanying materials\r
// are licensed and made available under the terms and conditions of the BSD License\r
// which accompanies this distribution.  The full text of the license may be found at\r
// http://opensource.org/licenses/bsd-license.php\r
//                                                                                           \r
// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
//\r
//  Module Name:\r
//\r
//    IpfCpuCore.s\r
//\r
//  Abstract:\r
//    IPF Specific assembly routines\r
//\r
//--\r
\r
.file  "IpfCpuCore.s"\r
\r
#include  "IpfMacro.i"\r
#include  "Ipf/IpfCpuCore.i"\r
\r
//----------------------------------------------------------------------------------\r
// This module supports terminating CAR (Cache As RAM) stage. It copies all the\r
// CAR data into real RAM and then makes a stack switch.\r
\r
// EFI_STATUS\r
// SwitchCoreStacks (\r
//   IN VOID  *EntryPoint,\r
//   IN UINTN CopySize,\r
//   IN VOID  *OldBase,\r
//   IN VOID  *NewBase\r
//   IN UINTN NewSP, OPTIONAL\r
//   IN UINTN NewBSP OPTIONAL\r
//   )\r
// EFI_STATUS\r
// SwitchCoreStacks (\r
//   IN VOID  *EntryPointForContinuationFunction,\r
//   IN UINTN StartupDescriptor,\r
//   IN VOID  PEICorePointer,\r
//   IN UINTN NewSP\r
//   )\r
//----------------------------------------------------------------------------------\r
PROCEDURE_ENTRY (SwitchCoreStacks)\r
\r
        NESTED_SETUP (4,2,0,0)\r
\r
        // first save all stack registers in GPRs.\r
        mov     r13 = in0;;             // this is a pointer to the PLABEL of the continuation function.\r
        ld8     r16 = [r13],8;;         // r16 = address of continuation function from the PLABEL\r
        ld8     gp = [r13];;            // gp  = gp of continuation function from the PLABEL\r
        mov     b1 = r16;;\r
\r
        // save the parameters in r5, r6. these 2 seemed to be preserved across PAL calls\r
        mov     r5 = in1;;              // this is the parameter1 to pass to the continuation function\r
        mov     r6 = in2;;              // this is the parameter2 to pass to the continuation function\r
        dep     r6=0,r6,63,1;;          // zero the bit 63.\r
\r
        mov     r8 = in3;;              // new stack pointer.\r
\r
        // r8 has the sp, this is 128K stack size, from this we will reserve 16K for the bspstore\r
        movl    r15 = PEI_BSP_STORE_SIZE;;\r
        sub     r8 = r8, r15;;\r
        add     r15 = (GuardBand),r8;;  // some little buffer, now r15 will be our bspstore\r
\r
        // save the bspstore value to r4, save sp value to r7\r
        mov     r4  = r15\r
        mov     r7  = r8\r
        mov     r16 = r8;;              // will be the new sp in uncache mode\r
\r
\r
        alloc   r11=0,0,0,0;;           // Set 0-size frame\r
        flushrs;;\r
\r
        mov     r21 = RSC_KERNEL_DISABLED;; // for rse disable\r
        mov     ar.rsc = r21;;          // turn off RSE\r
\r
        add     sp = r0, r16            // transfer to the EFI stack\r
        mov     ar.bspstore = r15       // switch to EFI BSP\r
        invala                          // change of ar.bspstore needs invala.\r
\r
        mov     r19 = RSC_KERNEL_LAZ;;  // RSC enabled, Lazy mode\r
        mov     ar.rsc = r19;;          // turn rse on, in kernel mode\r
\r
//-----------------------------------------------------------------------------------\r
// Save here the meaningful stuff for next few lines and then make the PAL call.\r
// Make PAL call to terminate the CAR status.\r
        // AVL: do this only for recovery check call...\r
\r
        mov     r28=ar.k3;;\r
        dep     r2 = r28,r0,0,8;;       // Extract Function bits from GR20.\r
        cmp.eq  p6,p7 = RecoveryFn,r2;; // Is it Recovery check\r
        (p7)  br.sptk.few DoneCARTermination; // if not, don't terminate car..\r
\r
TerminateCAR::\r
\r
        mov     r28 = ip;;\r
        add     r28 = (DoneCARTerminationPALCall - TerminateCAR),r28;;\r
        mov     b0 = r28\r
\r
        mov     r8 = ar.k5;;\r
        mov     b6 = r8\r
        mov     r28 = 0x208\r
\r
        mov     r29 = r0\r
        mov     r30 = r0\r
        mov     r31 = r0\r
        mov     r8 = r0;;\r
        br.sptk.few b6;;                // Call PAL-A call.\r
\r
DoneCARTerminationPALCall::\r
\r
// don't check error in soft sdv, it is always returning -1 for this call for some reason\r
#if SOFT_SDV\r
#else\r
ReturnToPEIMain::\r
        cmp.eq  p6,p7 = r8,r0;;\r
        //\r
        // dead loop if the PAL call failed, we have the CAR on but the stack is now pointing to memory\r
        //\r
        (p7) br.sptk.few ReturnToPEIMain;;\r
        //\r
        // PAL call successed,now the stack are in memory so come into cache mode\r
        // instead of uncache mode\r
        //\r
\r
        alloc   r11=0,0,0,0;;           // Set 0-size frame\r
        flushrs;;\r
\r
        mov     r21 = RSC_KERNEL_DISABLED;; // for rse disable\r
        mov     ar.rsc = r21;;          // turn off RSE\r
\r
        dep     r6 = 0,r6,63,1          // zero the bit 63\r
        dep     r7 = 0,r7,63,1          // zero the bit 63\r
        dep     r4 = 0,r4,63,1;;        // zero the bit 63\r
        add     sp = r0, r7             // transfer to the EFI stack in cache mode\r
        mov     ar.bspstore = r4        // switch to EFI BSP\r
        invala                          // change of ar.bspstore needs invala.\r
\r
        mov     r19 = RSC_KERNEL_LAZ;;  // RSC enabled, Lazy mode\r
        mov     ar.rsc = r19;;          // turn rse on, in kernel mode\r
\r
#endif\r
\r
DoneCARTermination::\r
\r
        // allocate a stack frame:\r
        alloc   r11=0,2,2,0 ;;          // alloc  outs going to ensuing DXE IPL service\r
                                                                                                // on the new stack\r
        mov     out0 = r5;;\r
        mov     out1 = r6;;\r
\r
        mov     r16 = b1;;\r
        mov     b6 = r16;;\r
        br.call.sptk.few b0=b6;;        // Call the continuation function\r
\r
        NESTED_RETURN\r
\r
PROCEDURE_EXIT(SwitchCoreStacks)\r
//-----------------------------------------------------------------------------------\r
\r
//---------------------------------------------------------------------------------\r
//++\r
// GetHandOffStatus\r
//\r
// This routine is called by all processors simultaneously, to get some hand-off\r
// status that has been captured by IPF dispatcher and recorded in kernel registers.\r
//\r
// Arguments :\r
//\r
// On Entry :  None.\r
//\r
// Return Value: Lid, R20Status.\r
//\r
//--\r
//----------------------------------------------------------------------------------\r
PROCEDURE_ENTRY (GetHandOffStatus)\r
\r
        NESTED_SETUP (0,2+0,0,0)\r
\r
        mov     r8 = ar.k6              // Health Status (Self test params)\r
        mov     r9 = ar.k4              // LID bits\r
        mov     r10 = ar.k3;;           // SAL_E entry state\r
        mov     r11 = ar.k7             // Return address to PAL\r
\r
        NESTED_RETURN\r
PROCEDURE_EXIT (GetHandOffStatus)\r
//----------------------------------------------------------------------------------\r
\r
\r
Commit	Line	Data
192f6d4c	1	//\r
	2	// Include common header file for this module.\r
	3	//\r
	4	#include "CommonHeader.h"\r
	5	\r
	6	//++\r
	7	// Copyright (c) 2006, Intel Corporation\r
	8	// All rights reserved. This program and the accompanying materials\r
	9	// are licensed and made available under the terms and conditions of the BSD License\r
	10	// which accompanies this distribution. The full text of the license may be found at\r
	11	// http://opensource.org/licenses/bsd-license.php\r
	12	// \r
	13	// THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
	14	// WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
	15	//\r
	16	// Module Name:\r
	17	//\r
	18	// IpfCpuCore.s\r
	19	//\r
	20	// Abstract:\r
	21	// IPF Specific assembly routines\r
	22	//\r
	23	//--\r
	24	\r
	25	.file "IpfCpuCore.s"\r
	26	\r
	27	#include "IpfMacro.i"\r
	28	#include "Ipf/IpfCpuCore.i"\r
	29	\r
	30	//----------------------------------------------------------------------------------\r
	31	// This module supports terminating CAR (Cache As RAM) stage. It copies all the\r
	32	// CAR data into real RAM and then makes a stack switch.\r
	33	\r
	34	// EFI_STATUS\r
	35	// SwitchCoreStacks (\r
	36	// IN VOID *EntryPoint,\r
	37	// IN UINTN CopySize,\r
	38	// IN VOID *OldBase,\r
	39	// IN VOID *NewBase\r
	40	// IN UINTN NewSP, OPTIONAL\r
	41	// IN UINTN NewBSP OPTIONAL\r
	42	// )\r
	43	// EFI_STATUS\r
	44	// SwitchCoreStacks (\r
	45	// IN VOID *EntryPointForContinuationFunction,\r
	46	// IN UINTN StartupDescriptor,\r
	47	// IN VOID PEICorePointer,\r
	48	// IN UINTN NewSP\r
	49	// )\r
	50	//----------------------------------------------------------------------------------\r
	51	PROCEDURE_ENTRY (SwitchCoreStacks)\r
	52	\r
	53	NESTED_SETUP (4,2,0,0)\r
	54	\r
	55	// first save all stack registers in GPRs.\r
	56	mov r13 = in0;; // this is a pointer to the PLABEL of the continuation function.\r
	57	ld8 r16 = [r13],8;; // r16 = address of continuation function from the PLABEL\r
	58	ld8 gp = [r13];; // gp = gp of continuation function from the PLABEL\r
	59	mov b1 = r16;;\r
	60	\r
	61	// save the parameters in r5, r6. these 2 seemed to be preserved across PAL calls\r
	62	mov r5 = in1;; // this is the parameter1 to pass to the continuation function\r
	63	mov r6 = in2;; // this is the parameter2 to pass to the continuation function\r
	64	dep r6=0,r6,63,1;; // zero the bit 63.\r
65	\r
66	mov r8 = in3;; // new stack pointer.\r
67	\r
68	// r8 has the sp, this is 128K stack size, from this we will reserve 16K for the bspstore\r
69	movl r15 = PEI_BSP_STORE_SIZE;;\r
70	sub r8 = r8, r15;;\r
71	add r15 = (GuardBand),r8;; // some little buffer, now r15 will be our bspstore\r
72	\r
73	// save the bspstore value to r4, save sp value to r7\r
74	mov r4 = r15\r
75	mov r7 = r8\r
76	mov r16 = r8;; // will be the new sp in uncache mode\r
77	\r
78	\r
79	alloc r11=0,0,0,0;; // Set 0-size frame\r
80	flushrs;;\r
81	\r
82	mov r21 = RSC_KERNEL_DISABLED;; // for rse disable\r
83	mov ar.rsc = r21;; // turn off RSE\r
84	\r
85	add sp = r0, r16 // transfer to the EFI stack\r
86	mov ar.bspstore = r15 // switch to EFI BSP\r
87	invala // change of ar.bspstore needs invala.\r
88	\r
89	mov r19 = RSC_KERNEL_LAZ;; // RSC enabled, Lazy mode\r
90	mov ar.rsc = r19;; // turn rse on, in kernel mode\r
91	\r
92	//-----------------------------------------------------------------------------------\r
93	// Save here the meaningful stuff for next few lines and then make the PAL call.\r
94	// Make PAL call to terminate the CAR status.\r
95	// AVL: do this only for recovery check call...\r
96	\r
97	mov r28=ar.k3;;\r
98	dep r2 = r28,r0,0,8;; // Extract Function bits from GR20.\r
99	cmp.eq p6,p7 = RecoveryFn,r2;; // Is it Recovery check\r
100	(p7) br.sptk.few DoneCARTermination; // if not, don't terminate car..\r
101	\r
102	TerminateCAR::\r
103	\r
104	mov r28 = ip;;\r
105	add r28 = (DoneCARTerminationPALCall - TerminateCAR),r28;;\r
106	mov b0 = r28\r
107	\r
108	mov r8 = ar.k5;;\r
109	mov b6 = r8\r
110	mov r28 = 0x208\r
111	\r
112	mov r29 = r0\r
113	mov r30 = r0\r
114	mov r31 = r0\r
115	mov r8 = r0;;\r
116	br.sptk.few b6;; // Call PAL-A call.\r
117	\r
118	DoneCARTerminationPALCall::\r
119	\r
120	// don't check error in soft sdv, it is always returning -1 for this call for some reason\r
121	#if SOFT_SDV\r
122	#else\r
123	ReturnToPEIMain::\r
124	cmp.eq p6,p7 = r8,r0;;\r
125	//\r
126	// dead loop if the PAL call failed, we have the CAR on but the stack is now pointing to memory\r
127	//\r
128	(p7) br.sptk.few ReturnToPEIMain;;\r
129	//\r
130	// PAL call successed,now the stack are in memory so come into cache mode\r
131	// instead of uncache mode\r
132	//\r
133	\r
134	alloc r11=0,0,0,0;; // Set 0-size frame\r
135	flushrs;;\r
136	\r
137	mov r21 = RSC_KERNEL_DISABLED;; // for rse disable\r
138	mov ar.rsc = r21;; // turn off RSE\r
139	\r
140	dep r6 = 0,r6,63,1 // zero the bit 63\r
141	dep r7 = 0,r7,63,1 // zero the bit 63\r
142	dep r4 = 0,r4,63,1;; // zero the bit 63\r
143	add sp = r0, r7 // transfer to the EFI stack in cache mode\r
144	mov ar.bspstore = r4 // switch to EFI BSP\r
145	invala // change of ar.bspstore needs invala.\r
146	\r
147	mov r19 = RSC_KERNEL_LAZ;; // RSC enabled, Lazy mode\r
148	mov ar.rsc = r19;; // turn rse on, in kernel mode\r
149	\r
150	#endif\r
151	\r
152	DoneCARTermination::\r
153	\r
154	// allocate a stack frame:\r
155	alloc r11=0,2,2,0 ;; // alloc outs going to ensuing DXE IPL service\r
156	// on the new stack\r
157	mov out0 = r5;;\r
158	mov out1 = r6;;\r
159	\r
160	mov r16 = b1;;\r
161	mov b6 = r16;;\r
162	br.call.sptk.few b0=b6;; // Call the continuation function\r
163	\r
164	NESTED_RETURN\r
165	\r
166	PROCEDURE_EXIT(SwitchCoreStacks)\r
167	//-----------------------------------------------------------------------------------\r
168	\r
169	//---------------------------------------------------------------------------------\r
170	//++\r
171	// GetHandOffStatus\r
172	//\r
173	// This routine is called by all processors simultaneously, to get some hand-off\r
174	// status that has been captured by IPF dispatcher and recorded in kernel registers.\r
175	//\r
176	// Arguments :\r
177	//\r
178	// On Entry : None.\r
179	//\r
180	// Return Value: Lid, R20Status.\r
181	//\r
182	//--\r
183	//----------------------------------------------------------------------------------\r
184	PROCEDURE_ENTRY (GetHandOffStatus)\r
185	\r
186	NESTED_SETUP (0,2+0,0,0)\r
187	\r
188	mov r8 = ar.k6 // Health Status (Self test params)\r
189	mov r9 = ar.k4 // LID bits\r
190	mov r10 = ar.k3;; // SAL_E entry state\r
191	mov r11 = ar.k7 // Return address to PAL\r
192	\r
193	NESTED_RETURN\r
194	PROCEDURE_EXIT (GetHandOffStatus)\r
195	//----------------------------------------------------------------------------------\r
196	\r
197	\r