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8d415937 | 1 | /** @file\r |
2 | The default version of EFI_PEI_PCI_CFG2_PPI support published by PeiServices in\r | |
3 | PeiCore initialization phase.\r | |
d1102dba LG |
4 | \r |
5 | EFI_PEI_PCI_CFG2_PPI is installed by the PEIM which supports a PCI root bridge.\r | |
6 | When PeiCore is started, the default version of EFI_PEI_PCI_CFG2_PPI will be assigned\r | |
8d415937 | 7 | to PeiServices table.\r |
d1102dba LG |
8 | \r |
9 | Copyright (c) 2009 - 2018, Intel Corporation. All rights reserved.<BR>\r | |
9d510e61 | 10 | SPDX-License-Identifier: BSD-2-Clause-Patent\r |
8d415937 | 11 | \r |
12 | **/\r | |
13 | \r | |
14 | #include "PeiMain.h"\r | |
15 | \r | |
16 | ///\r | |
d1102dba | 17 | /// This default instance of EFI_PEI_PCI_CFG2_PPI install assigned to EFI_PEI_SERVICE.PciCfg\r |
8d415937 | 18 | /// when PeiCore's initialization.\r |
19 | ///\r | |
1436aea4 | 20 | EFI_PEI_PCI_CFG2_PPI gPeiDefaultPciCfg2Ppi = {\r |
8d415937 | 21 | PeiDefaultPciCfg2Read,\r |
22 | PeiDefaultPciCfg2Write,\r | |
23 | PeiDefaultPciCfg2Modify\r | |
24 | };\r | |
25 | \r | |
26 | /**\r | |
27 | Reads from a given location in the PCI configuration space.\r | |
28 | \r | |
d1102dba LG |
29 | If the EFI_PEI_PCI_CFG2_PPI is not installed by platform/chipset PEIM, then\r |
30 | return EFI_NOT_YET_AVAILABLE.\r | |
31 | \r | |
8d415937 | 32 | @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r |
33 | @param This Pointer to local data for the interface.\r | |
34 | @param Width The width of the access. Enumerated in bytes.\r | |
35 | See EFI_PEI_PCI_CFG_PPI_WIDTH above.\r | |
36 | @param Address The physical address of the access. The format of\r | |
37 | the address is described by EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS.\r | |
38 | @param Buffer A pointer to the buffer of data.\r | |
39 | \r | |
40 | @retval EFI_SUCCESS The function completed successfully.\r | |
41 | @retval EFI_INVALID_PARAMETER The invalid access width.\r | |
42 | @retval EFI_NOT_YET_AVAILABLE If the EFI_PEI_PCI_CFG2_PPI is not installed by platform/chipset PEIM.\r | |
d1102dba | 43 | \r |
8d415937 | 44 | **/\r |
45 | EFI_STATUS\r | |
46 | EFIAPI\r | |
47 | PeiDefaultPciCfg2Read (\r | |
1436aea4 MK |
48 | IN CONST EFI_PEI_SERVICES **PeiServices,\r |
49 | IN CONST EFI_PEI_PCI_CFG2_PPI *This,\r | |
50 | IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r | |
51 | IN UINT64 Address,\r | |
52 | IN OUT VOID *Buffer\r | |
8d415937 | 53 | )\r |
54 | {\r | |
55 | return EFI_NOT_AVAILABLE_YET;\r | |
56 | }\r | |
57 | \r | |
58 | /**\r | |
59 | Write to a given location in the PCI configuration space.\r | |
60 | \r | |
d1102dba LG |
61 | If the EFI_PEI_PCI_CFG2_PPI is not installed by platform/chipset PEIM, then\r |
62 | return EFI_NOT_YET_AVAILABLE.\r | |
63 | \r | |
8d415937 | 64 | @param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r |
65 | @param This Pointer to local data for the interface.\r | |
66 | @param Width The width of the access. Enumerated in bytes.\r | |
67 | See EFI_PEI_PCI_CFG_PPI_WIDTH above.\r | |
68 | @param Address The physical address of the access. The format of\r | |
69 | the address is described by EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS.\r | |
70 | @param Buffer A pointer to the buffer of data.\r | |
71 | \r | |
72 | @retval EFI_SUCCESS The function completed successfully.\r | |
73 | @retval EFI_INVALID_PARAMETER The invalid access width.\r | |
74 | @retval EFI_NOT_YET_AVAILABLE If the EFI_PEI_PCI_CFG2_PPI is not installed by platform/chipset PEIM.\r | |
75 | **/\r | |
76 | EFI_STATUS\r | |
77 | EFIAPI\r | |
78 | PeiDefaultPciCfg2Write (\r | |
1436aea4 MK |
79 | IN CONST EFI_PEI_SERVICES **PeiServices,\r |
80 | IN CONST EFI_PEI_PCI_CFG2_PPI *This,\r | |
81 | IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r | |
82 | IN UINT64 Address,\r | |
83 | IN OUT VOID *Buffer\r | |
8d415937 | 84 | )\r |
85 | {\r | |
86 | return EFI_NOT_AVAILABLE_YET;\r | |
d1102dba | 87 | }\r |
8d415937 | 88 | \r |
89 | /**\r | |
90 | This function performs a read-modify-write operation on the contents from a given\r | |
91 | location in the PCI configuration space.\r | |
d1102dba LG |
92 | If the EFI_PEI_PCI_CFG2_PPI is not installed by platform/chipset PEIM, then\r |
93 | return EFI_NOT_YET_AVAILABLE.\r | |
8d415937 | 94 | \r |
95 | @param PeiServices An indirect pointer to the PEI Services Table\r | |
96 | published by the PEI Foundation.\r | |
97 | @param This Pointer to local data for the interface.\r | |
98 | @param Width The width of the access. Enumerated in bytes. Type\r | |
99 | EFI_PEI_PCI_CFG_PPI_WIDTH is defined in Read().\r | |
100 | @param Address The physical address of the access.\r | |
101 | @param SetBits Points to value to bitwise-OR with the read configuration value.\r | |
102 | The size of the value is determined by Width.\r | |
103 | @param ClearBits Points to the value to negate and bitwise-AND with the read configuration value.\r | |
104 | The size of the value is determined by Width.\r | |
105 | \r | |
106 | @retval EFI_SUCCESS The function completed successfully.\r | |
107 | @retval EFI_INVALID_PARAMETER The invalid access width.\r | |
108 | @retval EFI_NOT_YET_AVAILABLE If the EFI_PEI_PCI_CFG2_PPI is not installed by platform/chipset PEIM.\r | |
109 | **/\r | |
110 | EFI_STATUS\r | |
111 | EFIAPI\r | |
112 | PeiDefaultPciCfg2Modify (\r | |
1436aea4 MK |
113 | IN CONST EFI_PEI_SERVICES **PeiServices,\r |
114 | IN CONST EFI_PEI_PCI_CFG2_PPI *This,\r | |
115 | IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r | |
116 | IN UINT64 Address,\r | |
117 | IN VOID *SetBits,\r | |
118 | IN VOID *ClearBits\r | |
8d415937 | 119 | )\r |
120 | {\r | |
121 | return EFI_NOT_AVAILABLE_YET;\r | |
d1102dba | 122 | }\r |