[mirror_edk2.git] / MdeModulePkg / Include / Protocol / IoMmu.h

/** @file\r
  EFI IOMMU Protocol.\r
\r
Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>\r
SPDX-License-Identifier: BSD-2-Clause-Patent\r
\r
**/\r
\r
#ifndef __IOMMU_H__\r
#define __IOMMU_H__\r
\r
//\r
// IOMMU Protocol GUID value\r
//\r
#define EDKII_IOMMU_PROTOCOL_GUID \\r
    { \\r
      0x4e939de9, 0xd948, 0x4b0f, { 0x88, 0xed, 0xe6, 0xe1, 0xce, 0x51, 0x7c, 0x1e } \\r
    }\r
\r
//\r
// Forward reference for pure ANSI compatability\r
//\r
typedef struct _EDKII_IOMMU_PROTOCOL EDKII_IOMMU_PROTOCOL;\r
\r
//\r
// Revision The revision to which the IOMMU interface adheres.\r
//          All future revisions must be backwards compatible.\r
//          If a future version is not back wards compatible it is not the same GUID.\r
//\r
#define EDKII_IOMMU_PROTOCOL_REVISION  0x00010000\r
\r
//\r
// IOMMU Access for SetAttribute\r
//\r
// These types can be "ORed" together as needed.\r
// Any undefined bits are reserved and must be zero.\r
//\r
#define EDKII_IOMMU_ACCESS_READ   0x1\r
#define EDKII_IOMMU_ACCESS_WRITE  0x2\r
\r
//\r
// IOMMU Operation for Map\r
//\r
typedef enum {\r
  ///\r
  /// A read operation from system memory by a bus master that is not capable of producing\r
  /// PCI dual address cycles.\r
  ///\r
  EdkiiIoMmuOperationBusMasterRead,\r
  ///\r
  /// A write operation from system memory by a bus master that is not capable of producing\r
  /// PCI dual address cycles.\r
  ///\r
  EdkiiIoMmuOperationBusMasterWrite,\r
  ///\r
  /// Provides both read and write access to system memory by both the processor and a bus\r
  /// master that is not capable of producing PCI dual address cycles.\r
  ///\r
  EdkiiIoMmuOperationBusMasterCommonBuffer,\r
  ///\r
  /// A read operation from system memory by a bus master that is capable of producing PCI\r
  /// dual address cycles.\r
  ///\r
  EdkiiIoMmuOperationBusMasterRead64,\r
  ///\r
  /// A write operation to system memory by a bus master that is capable of producing PCI\r
  /// dual address cycles.\r
  ///\r
  EdkiiIoMmuOperationBusMasterWrite64,\r
  ///\r
  /// Provides both read and write access to system memory by both the processor and a bus\r
  /// master that is capable of producing PCI dual address cycles.\r
  ///\r
  EdkiiIoMmuOperationBusMasterCommonBuffer64,\r
  EdkiiIoMmuOperationMaximum\r
} EDKII_IOMMU_OPERATION;\r
\r
//\r
// IOMMU attribute for AllocateBuffer\r
// Any undefined bits are reserved and must be zero.\r
//\r
#define EDKII_IOMMU_ATTRIBUTE_MEMORY_WRITE_COMBINE  0x0080\r
#define EDKII_IOMMU_ATTRIBUTE_MEMORY_CACHED         0x0800\r
#define EDKII_IOMMU_ATTRIBUTE_DUAL_ADDRESS_CYCLE    0x8000\r
\r
#define EDKII_IOMMU_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER  (EDKII_IOMMU_ATTRIBUTE_MEMORY_WRITE_COMBINE | EDKII_IOMMU_ATTRIBUTE_MEMORY_CACHED | EDKII_IOMMU_ATTRIBUTE_DUAL_ADDRESS_CYCLE)\r
\r
#define EDKII_IOMMU_ATTRIBUTE_INVALID_FOR_ALLOCATE_BUFFER  (~EDKII_IOMMU_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER)\r
\r
/**\r
  Set IOMMU attribute for a system memory.\r
\r
  If the IOMMU protocol exists, the system memory cannot be used\r
  for DMA by default.\r
\r
  When a device requests a DMA access for a system memory,\r
  the device driver need use SetAttribute() to update the IOMMU\r
  attribute to request DMA access (read and/or write).\r
\r
  The DeviceHandle is used to identify which device submits the request.\r
  The IOMMU implementation need translate the device path to an IOMMU device ID,\r
  and set IOMMU hardware register accordingly.\r
  1) DeviceHandle can be a standard PCI device.\r
     The memory for BusMasterRead need set EDKII_IOMMU_ACCESS_READ.\r
     The memory for BusMasterWrite need set EDKII_IOMMU_ACCESS_WRITE.\r
     The memory for BusMasterCommonBuffer need set EDKII_IOMMU_ACCESS_READ|EDKII_IOMMU_ACCESS_WRITE.\r
     After the memory is used, the memory need set 0 to keep it being protected.\r
  2) DeviceHandle can be an ACPI device (ISA, I2C, SPI, etc).\r
     The memory for DMA access need set EDKII_IOMMU_ACCESS_READ and/or EDKII_IOMMU_ACCESS_WRITE.\r
\r
  @param[in]  This              The protocol instance pointer.\r
  @param[in]  DeviceHandle      The device who initiates the DMA access request.\r
  @param[in]  Mapping           The mapping value returned from Map().\r
  @param[in]  IoMmuAccess       The IOMMU access.\r
\r
  @retval EFI_SUCCESS            The IoMmuAccess is set for the memory range specified by DeviceAddress and Length.\r
  @retval EFI_INVALID_PARAMETER  DeviceHandle is an invalid handle.\r
  @retval EFI_INVALID_PARAMETER  Mapping is not a value that was returned by Map().\r
  @retval EFI_INVALID_PARAMETER  IoMmuAccess specified an illegal combination of access.\r
  @retval EFI_UNSUPPORTED        DeviceHandle is unknown by the IOMMU.\r
  @retval EFI_UNSUPPORTED        The bit mask of IoMmuAccess is not supported by the IOMMU.\r
  @retval EFI_UNSUPPORTED        The IOMMU does not support the memory range specified by Mapping.\r
  @retval EFI_OUT_OF_RESOURCES   There are not enough resources available to modify the IOMMU access.\r
  @retval EFI_DEVICE_ERROR       The IOMMU device reported an error while attempting the operation.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EDKII_IOMMU_SET_ATTRIBUTE)(\r
  IN EDKII_IOMMU_PROTOCOL  *This,\r
  IN EFI_HANDLE            DeviceHandle,\r
  IN VOID                  *Mapping,\r
  IN UINT64                IoMmuAccess\r
  );\r
\r
/**\r
  Provides the controller-specific addresses required to access system memory from a\r
  DMA bus master.\r
\r
  @param  This                  The protocol instance pointer.\r
  @param  Operation             Indicates if the bus master is going to read or write to system memory.\r
  @param  HostAddress           The system memory address to map to the PCI controller.\r
  @param  NumberOfBytes         On input the number of bytes to map. On output the number of bytes\r
                                that were mapped.\r
  @param  DeviceAddress         The resulting map address for the bus master PCI controller to use to\r
                                access the hosts HostAddress.\r
  @param  Mapping               A resulting value to pass to Unmap().\r
\r
  @retval EFI_SUCCESS           The range was mapped for the returned NumberOfBytes.\r
  @retval EFI_UNSUPPORTED       The HostAddress cannot be mapped as a common buffer.\r
  @retval EFI_INVALID_PARAMETER One or more parameters are invalid.\r
  @retval EFI_OUT_OF_RESOURCES  The request could not be completed due to a lack of resources.\r
  @retval EFI_DEVICE_ERROR      The system hardware could not map the requested address.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EDKII_IOMMU_MAP)(\r
  IN     EDKII_IOMMU_PROTOCOL                       *This,\r
  IN     EDKII_IOMMU_OPERATION                      Operation,\r
  IN     VOID                                       *HostAddress,\r
  IN OUT UINTN                                      *NumberOfBytes,\r
  OUT    EFI_PHYSICAL_ADDRESS                       *DeviceAddress,\r
  OUT    VOID                                       **Mapping\r
  );\r
\r
/**\r
  Completes the Map() operation and releases any corresponding resources.\r
\r
  @param  This                  The protocol instance pointer.\r
  @param  Mapping               The mapping value returned from Map().\r
\r
  @retval EFI_SUCCESS           The range was unmapped.\r
  @retval EFI_INVALID_PARAMETER Mapping is not a value that was returned by Map().\r
  @retval EFI_DEVICE_ERROR      The data was not committed to the target system memory.\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EDKII_IOMMU_UNMAP)(\r
  IN  EDKII_IOMMU_PROTOCOL                     *This,\r
  IN  VOID                                     *Mapping\r
  );\r
\r
/**\r
  Allocates pages that are suitable for an OperationBusMasterCommonBuffer or\r
  OperationBusMasterCommonBuffer64 mapping.\r
\r
  @param  This                  The protocol instance pointer.\r
  @param  Type                  This parameter is not used and must be ignored.\r
  @param  MemoryType            The type of memory to allocate, EfiBootServicesData or\r
                                EfiRuntimeServicesData.\r
  @param  Pages                 The number of pages to allocate.\r
  @param  HostAddress           A pointer to store the base system memory address of the\r
                                allocated range.\r
  @param  Attributes            The requested bit mask of attributes for the allocated range.\r
\r
  @retval EFI_SUCCESS           The requested memory pages were allocated.\r
  @retval EFI_UNSUPPORTED       Attributes is unsupported. The only legal attribute bits are\r
                                MEMORY_WRITE_COMBINE, MEMORY_CACHED and DUAL_ADDRESS_CYCLE.\r
  @retval EFI_INVALID_PARAMETER One or more parameters are invalid.\r
  @retval EFI_OUT_OF_RESOURCES  The memory pages could not be allocated.\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EDKII_IOMMU_ALLOCATE_BUFFER)(\r
  IN     EDKII_IOMMU_PROTOCOL                     *This,\r
  IN     EFI_ALLOCATE_TYPE                        Type,\r
  IN     EFI_MEMORY_TYPE                          MemoryType,\r
  IN     UINTN                                    Pages,\r
  IN OUT VOID                                     **HostAddress,\r
  IN     UINT64                                   Attributes\r
  );\r
\r
/**\r
  Frees memory that was allocated with AllocateBuffer().\r
\r
  @param  This                  The protocol instance pointer.\r
  @param  Pages                 The number of pages to free.\r
  @param  HostAddress           The base system memory address of the allocated range.\r
\r
  @retval EFI_SUCCESS           The requested memory pages were freed.\r
  @retval EFI_INVALID_PARAMETER The memory range specified by HostAddress and Pages\r
                                was not allocated with AllocateBuffer().\r
\r
**/\r
typedef\r
EFI_STATUS\r
(EFIAPI *EDKII_IOMMU_FREE_BUFFER)(\r
  IN  EDKII_IOMMU_PROTOCOL                     *This,\r
  IN  UINTN                                    Pages,\r
  IN  VOID                                     *HostAddress\r
  );\r
\r
///\r
/// IOMMU Protocol structure.\r
///\r
struct _EDKII_IOMMU_PROTOCOL {\r
  UINT64                         Revision;\r
  EDKII_IOMMU_SET_ATTRIBUTE      SetAttribute;\r
  EDKII_IOMMU_MAP                Map;\r
  EDKII_IOMMU_UNMAP              Unmap;\r
  EDKII_IOMMU_ALLOCATE_BUFFER    AllocateBuffer;\r
  EDKII_IOMMU_FREE_BUFFER        FreeBuffer;\r
};\r
\r
///\r
/// IOMMU Protocol GUID variable.\r
///\r
extern EFI_GUID  gEdkiiIoMmuProtocolGuid;\r
\r
#endif\r
Commit	Line	Data
d1fddc45 JY	1	/** @file\r
	2	EFI IOMMU Protocol.\r
	3	\r
	4	Copyright (c) 2017, Intel Corporation. All rights reserved.<BR>\r
9d510e61	5	SPDX-License-Identifier: BSD-2-Clause-Patent\r
d1fddc45 JY	6	\r
	7	**/\r
	8	\r
d1fddc45 JY	9	#ifndef __IOMMU_H__\r
	10	#define __IOMMU_H__\r
	11	\r
	12	//\r
	13	// IOMMU Protocol GUID value\r
	14	//\r
	15	#define EDKII_IOMMU_PROTOCOL_GUID \\r
	16	{ \\r
	17	0x4e939de9, 0xd948, 0x4b0f, { 0x88, 0xed, 0xe6, 0xe1, 0xce, 0x51, 0x7c, 0x1e } \\r
	18	}\r
	19	\r
	20	//\r
	21	// Forward reference for pure ANSI compatability\r
	22	//\r
1436aea4	23	typedef struct _EDKII_IOMMU_PROTOCOL EDKII_IOMMU_PROTOCOL;\r
d1fddc45 JY	24	\r
	25	//\r
	26	// Revision The revision to which the IOMMU interface adheres.\r
	27	// All future revisions must be backwards compatible.\r
	28	// If a future version is not back wards compatible it is not the same GUID.\r
	29	//\r
1436aea4	30	#define EDKII_IOMMU_PROTOCOL_REVISION 0x00010000\r
d1fddc45 JY	31	\r
	32	//\r
	33	// IOMMU Access for SetAttribute\r
	34	//\r
	35	// These types can be "ORed" together as needed.\r
	36	// Any undefined bits are reserved and must be zero.\r
	37	//\r
	38	#define EDKII_IOMMU_ACCESS_READ 0x1\r
	39	#define EDKII_IOMMU_ACCESS_WRITE 0x2\r
	40	\r
	41	//\r
	42	// IOMMU Operation for Map\r
	43	//\r
	44	typedef enum {\r
	45	///\r
	46	/// A read operation from system memory by a bus master that is not capable of producing\r
	47	/// PCI dual address cycles.\r
	48	///\r
	49	EdkiiIoMmuOperationBusMasterRead,\r
	50	///\r
	51	/// A write operation from system memory by a bus master that is not capable of producing\r
	52	/// PCI dual address cycles.\r
	53	///\r
	54	EdkiiIoMmuOperationBusMasterWrite,\r
	55	///\r
	56	/// Provides both read and write access to system memory by both the processor and a bus\r
	57	/// master that is not capable of producing PCI dual address cycles.\r
	58	///\r
	59	EdkiiIoMmuOperationBusMasterCommonBuffer,\r
	60	///\r
	61	/// A read operation from system memory by a bus master that is capable of producing PCI\r
	62	/// dual address cycles.\r
	63	///\r
	64	EdkiiIoMmuOperationBusMasterRead64,\r
	65	///\r
	66	/// A write operation to system memory by a bus master that is capable of producing PCI\r
	67	/// dual address cycles.\r
	68	///\r
	69	EdkiiIoMmuOperationBusMasterWrite64,\r
	70	///\r
	71	/// Provides both read and write access to system memory by both the processor and a bus\r
	72	/// master that is capable of producing PCI dual address cycles.\r
	73	///\r
	74	EdkiiIoMmuOperationBusMasterCommonBuffer64,\r
	75	EdkiiIoMmuOperationMaximum\r
	76	} EDKII_IOMMU_OPERATION;\r
	77	\r
	78	//\r
	79	// IOMMU attribute for AllocateBuffer\r
	80	// Any undefined bits are reserved and must be zero.\r
	81	//\r
1436aea4 MK	82	#define EDKII_IOMMU_ATTRIBUTE_MEMORY_WRITE_COMBINE 0x0080\r
	83	#define EDKII_IOMMU_ATTRIBUTE_MEMORY_CACHED 0x0800\r
	84	#define EDKII_IOMMU_ATTRIBUTE_DUAL_ADDRESS_CYCLE 0x8000\r
d1fddc45	85	\r
1436aea4	86	#define EDKII_IOMMU_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER (EDKII_IOMMU_ATTRIBUTE_MEMORY_WRITE_COMBINE \| EDKII_IOMMU_ATTRIBUTE_MEMORY_CACHED \| EDKII_IOMMU_ATTRIBUTE_DUAL_ADDRESS_CYCLE)\r
d1fddc45	87	\r
1436aea4	88	#define EDKII_IOMMU_ATTRIBUTE_INVALID_FOR_ALLOCATE_BUFFER (~EDKII_IOMMU_ATTRIBUTE_VALID_FOR_ALLOCATE_BUFFER)\r
d1fddc45 JY	89	\r
	90	/**\r
	91	Set IOMMU attribute for a system memory.\r
	92	\r
	93	If the IOMMU protocol exists, the system memory cannot be used\r
	94	for DMA by default.\r
	95	\r
	96	When a device requests a DMA access for a system memory,\r
	97	the device driver need use SetAttribute() to update the IOMMU\r
	98	attribute to request DMA access (read and/or write).\r
	99	\r
	100	The DeviceHandle is used to identify which device submits the request.\r
	101	The IOMMU implementation need translate the device path to an IOMMU device ID,\r
	102	and set IOMMU hardware register accordingly.\r
	103	1) DeviceHandle can be a standard PCI device.\r
	104	The memory for BusMasterRead need set EDKII_IOMMU_ACCESS_READ.\r
	105	The memory for BusMasterWrite need set EDKII_IOMMU_ACCESS_WRITE.\r
	106	The memory for BusMasterCommonBuffer need set EDKII_IOMMU_ACCESS_READ\|EDKII_IOMMU_ACCESS_WRITE.\r
	107	After the memory is used, the memory need set 0 to keep it being protected.\r
	108	2) DeviceHandle can be an ACPI device (ISA, I2C, SPI, etc).\r
	109	The memory for DMA access need set EDKII_IOMMU_ACCESS_READ and/or EDKII_IOMMU_ACCESS_WRITE.\r
	110	\r
	111	@param[in] This The protocol instance pointer.\r
	112	@param[in] DeviceHandle The device who initiates the DMA access request.\r
	113	@param[in] Mapping The mapping value returned from Map().\r
	114	@param[in] IoMmuAccess The IOMMU access.\r
	115	\r
	116	@retval EFI_SUCCESS The IoMmuAccess is set for the memory range specified by DeviceAddress and Length.\r
	117	@retval EFI_INVALID_PARAMETER DeviceHandle is an invalid handle.\r
	118	@retval EFI_INVALID_PARAMETER Mapping is not a value that was returned by Map().\r
	119	@retval EFI_INVALID_PARAMETER IoMmuAccess specified an illegal combination of access.\r
	120	@retval EFI_UNSUPPORTED DeviceHandle is unknown by the IOMMU.\r
	121	@retval EFI_UNSUPPORTED The bit mask of IoMmuAccess is not supported by the IOMMU.\r
	122	@retval EFI_UNSUPPORTED The IOMMU does not support the memory range specified by Mapping.\r
	123	@retval EFI_OUT_OF_RESOURCES There are not enough resources available to modify the IOMMU access.\r
	124	@retval EFI_DEVICE_ERROR The IOMMU device reported an error while attempting the operation.\r
	125	\r
	126	**/\r
	127	typedef\r
	128	EFI_STATUS\r
	129	(EFIAPI *EDKII_IOMMU_SET_ATTRIBUTE)(\r
	130	IN EDKII_IOMMU_PROTOCOL *This,\r
	131	IN EFI_HANDLE DeviceHandle,\r
	132	IN VOID *Mapping,\r
	133	IN UINT64 IoMmuAccess\r
	134	);\r
	135	\r
	136	/**\r
	137	Provides the controller-specific addresses required to access system memory from a\r
	138	DMA bus master.\r
	139	\r
	140	@param This The protocol instance pointer.\r
	141	@param Operation Indicates if the bus master is going to read or write to system memory.\r
	142	@param HostAddress The system memory address to map to the PCI controller.\r
	143	@param NumberOfBytes On input the number of bytes to map. On output the number of bytes\r
	144	that were mapped.\r
	145	@param DeviceAddress The resulting map address for the bus master PCI controller to use to\r
	146	access the hosts HostAddress.\r
	147	@param Mapping A resulting value to pass to Unmap().\r
	148	\r
	149	@retval EFI_SUCCESS The range was mapped for the returned NumberOfBytes.\r
	150	@retval EFI_UNSUPPORTED The HostAddress cannot be mapped as a common buffer.\r
	151	@retval EFI_INVALID_PARAMETER One or more parameters are invalid.\r
	152	@retval EFI_OUT_OF_RESOURCES The request could not be completed due to a lack of resources.\r
153	@retval EFI_DEVICE_ERROR The system hardware could not map the requested address.\r
154	\r
155	**/\r
156	typedef\r
157	EFI_STATUS\r
158	(EFIAPI *EDKII_IOMMU_MAP)(\r
159	IN EDKII_IOMMU_PROTOCOL *This,\r
160	IN EDKII_IOMMU_OPERATION Operation,\r
161	IN VOID *HostAddress,\r
162	IN OUT UINTN *NumberOfBytes,\r
163	OUT EFI_PHYSICAL_ADDRESS *DeviceAddress,\r
164	OUT VOID **Mapping\r
165	);\r
166	\r
167	/**\r
168	Completes the Map() operation and releases any corresponding resources.\r
169	\r
170	@param This The protocol instance pointer.\r
171	@param Mapping The mapping value returned from Map().\r
172	\r
173	@retval EFI_SUCCESS The range was unmapped.\r
174	@retval EFI_INVALID_PARAMETER Mapping is not a value that was returned by Map().\r
175	@retval EFI_DEVICE_ERROR The data was not committed to the target system memory.\r
176	**/\r
177	typedef\r
178	EFI_STATUS\r
179	(EFIAPI *EDKII_IOMMU_UNMAP)(\r
180	IN EDKII_IOMMU_PROTOCOL *This,\r
181	IN VOID *Mapping\r
182	);\r
183	\r
184	/**\r
185	Allocates pages that are suitable for an OperationBusMasterCommonBuffer or\r
186	OperationBusMasterCommonBuffer64 mapping.\r
187	\r
188	@param This The protocol instance pointer.\r
189	@param Type This parameter is not used and must be ignored.\r
190	@param MemoryType The type of memory to allocate, EfiBootServicesData or\r
191	EfiRuntimeServicesData.\r
192	@param Pages The number of pages to allocate.\r
193	@param HostAddress A pointer to store the base system memory address of the\r
194	allocated range.\r
195	@param Attributes The requested bit mask of attributes for the allocated range.\r
196	\r
197	@retval EFI_SUCCESS The requested memory pages were allocated.\r
198	@retval EFI_UNSUPPORTED Attributes is unsupported. The only legal attribute bits are\r
b02f14f3	199	MEMORY_WRITE_COMBINE, MEMORY_CACHED and DUAL_ADDRESS_CYCLE.\r
d1fddc45 JY	200	@retval EFI_INVALID_PARAMETER One or more parameters are invalid.\r
	201	@retval EFI_OUT_OF_RESOURCES The memory pages could not be allocated.\r
	202	\r
	203	**/\r
	204	typedef\r
	205	EFI_STATUS\r
	206	(EFIAPI *EDKII_IOMMU_ALLOCATE_BUFFER)(\r
	207	IN EDKII_IOMMU_PROTOCOL *This,\r
	208	IN EFI_ALLOCATE_TYPE Type,\r
	209	IN EFI_MEMORY_TYPE MemoryType,\r
	210	IN UINTN Pages,\r
	211	IN OUT VOID **HostAddress,\r
	212	IN UINT64 Attributes\r
	213	);\r
	214	\r
	215	/**\r
	216	Frees memory that was allocated with AllocateBuffer().\r
	217	\r
	218	@param This The protocol instance pointer.\r
	219	@param Pages The number of pages to free.\r
	220	@param HostAddress The base system memory address of the allocated range.\r
	221	\r
	222	@retval EFI_SUCCESS The requested memory pages were freed.\r
	223	@retval EFI_INVALID_PARAMETER The memory range specified by HostAddress and Pages\r
	224	was not allocated with AllocateBuffer().\r
	225	\r
	226	**/\r
	227	typedef\r
	228	EFI_STATUS\r
	229	(EFIAPI *EDKII_IOMMU_FREE_BUFFER)(\r
	230	IN EDKII_IOMMU_PROTOCOL *This,\r
	231	IN UINTN Pages,\r
	232	IN VOID *HostAddress\r
	233	);\r
	234	\r
	235	///\r
	236	/// IOMMU Protocol structure.\r
	237	///\r
	238	struct _EDKII_IOMMU_PROTOCOL {\r
1436aea4 MK	239	UINT64 Revision;\r
	240	EDKII_IOMMU_SET_ATTRIBUTE SetAttribute;\r
	241	EDKII_IOMMU_MAP Map;\r
	242	EDKII_IOMMU_UNMAP Unmap;\r
	243	EDKII_IOMMU_ALLOCATE_BUFFER AllocateBuffer;\r
	244	EDKII_IOMMU_FREE_BUFFER FreeBuffer;\r
d1fddc45 JY	245	};\r
	246	\r
	247	///\r
	248	/// IOMMU Protocol GUID variable.\r
	249	///\r
1436aea4	250	extern EFI_GUID gEdkiiIoMmuProtocolGuid;\r
d1fddc45 JY	251	\r
d1fddc45 JY	252	#endif\r