[mirror_edk2.git] / MdeModulePkg / Universal / DebugSupportDxe / X64 / AsmFuncs.nasm

;/** @file\r
;  Low level x64 routines used by the debug support driver.\r
;\r
;  Copyright (c) 2007 - 2022, Intel Corporation. All rights reserved.<BR>\r
;  SPDX-License-Identifier: BSD-2-Clause-Patent\r
;\r
;**/\r
\r
%define EXCPT64_DIVIDE_ERROR 0\r
%define EXCPT64_DEBUG 1\r
%define EXCPT64_NMI 2\r
%define EXCPT64_BREAKPOINT 3\r
%define EXCPT64_OVERFLOW 4\r
%define EXCPT64_BOUND 5\r
%define EXCPT64_INVALID_OPCODE 6\r
%define EXCPT64_DOUBLE_FAULT 8\r
%define EXCPT64_INVALID_TSS 10\r
%define EXCPT64_SEG_NOT_PRESENT 11\r
%define EXCPT64_STACK_FAULT 12\r
%define EXCPT64_GP_FAULT 13\r
%define EXCPT64_PAGE_FAULT 14\r
%define EXCPT64_FP_ERROR 16\r
%define EXCPT64_ALIGNMENT_CHECK 17\r
%define EXCPT64_MACHINE_CHECK 18\r
%define EXCPT64_SIMD 19\r
\r
%define FXSTOR_FLAG 0x1000000         ; bit cpuid 24 of feature flags\r
\r
SECTION .data\r
\r
global ASM_PFX(OrigVector)\r
global ASM_PFX(InterruptEntryStub)\r
global ASM_PFX(StubSize)\r
global ASM_PFX(CommonIdtEntry)\r
global ASM_PFX(FxStorSupport)\r
extern ASM_PFX(InterruptDistrubutionHub)\r
\r
ASM_PFX(StubSize): dd InterruptEntryStubEnd - ASM_PFX(InterruptEntryStub)\r
AppRsp: dq 0x1111111111111111 ; ?\r
DebugRsp: dq 0x2222222222222222 ; ?\r
ExtraPush: dq 0x3333333333333333 ; ?\r
ExceptData: dq 0x4444444444444444 ; ?\r
Rflags: dq 0x5555555555555555 ; ?\r
ASM_PFX(OrigVector): dq 0x6666666666666666 ; ?\r
\r
;; The declarations below define the memory region that will be used for the debug stack.\r
;; The context record will be built by pushing register values onto this stack.\r
;; It is imparitive that alignment be carefully managed, since the FXSTOR and\r
;; FXRSTOR instructions will GP fault if their memory operand is not 16 byte aligned.\r
;;\r
;; The stub will switch stacks from the application stack to the debuger stack\r
;; and pushes the exception number.\r
;;\r
;; Then we building the context record on the stack. Since the stack grows down,\r
;; we push the fields of the context record from the back to the front.  There\r
;; are 336 bytes of stack used prior allocating the 512 bytes of stack to be\r
;; used as the memory buffer for the fxstor instruction. Therefore address of\r
;; the buffer used for the FXSTOR instruction is &Eax - 336 - 512, which\r
;; must be 16 byte aligned.\r
;;\r
;; We carefully locate the stack to make this happen.\r
;;\r
;; For reference, the context structure looks like this:\r
;;      struct {\r
;;        UINT64            ExceptionData;\r
;;        FX_SAVE_STATE_X64 FxSaveState;    // 512 bytes, must be 16 byte aligned\r
;;        UINT64            Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
;;        UINT64            Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;\r
;;        UINT64            RFlags;\r
;;        UINT64            Ldtr, Tr;\r
;;        UINT64            Gdtr[2], Idtr[2];\r
;;        UINT64            Rip;\r
;;        UINT64            Gs, Fs, Es, Ds, Cs, Ss;\r
;;        UINT64            Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;\r
;;        UINT64            R8, R9, R10, R11, R12, R13, R14, R15;\r
;;      } SYSTEM_CONTEXT_X64;  // 64 bit system context record\r
\r
align           16\r
DebugStackEnd: db "DbgStkEnd >>>>>>"    ;; 16 byte long string - must be 16 bytes to preserve alignment\r
                times 0x1ffc dd    0x0  ;; 32K should be enough stack\r
                                        ;;   This allocation is coocked to insure\r
                                        ;;   that the the buffer for the FXSTORE instruction\r
                                        ;;   will be 16 byte aligned also.\r
                                        ;;\r
ExceptionNumber: dq 0                   ;; first entry will be the vector number pushed by the stub\r
\r
DebugStackBegin: db "<<<< DbgStkBegin"  ;; initial debug ESP == DebugStackBegin, set in stub\r
\r
DEFAULT REL\r
SECTION .text\r
\r
;------------------------------------------------------------------------------\r
; BOOLEAN\r
; FxStorSupport (\r
;   void\r
;   )\r
;\r
; Abstract: Returns TRUE if FxStor instructions are supported\r
;\r
global ASM_PFX(FxStorSupport)\r
ASM_PFX(FxStorSupport):\r
\r
;\r
; cpuid corrupts rbx which must be preserved per the C calling convention\r
;\r
                push    rbx\r
                mov     rax, dword 1\r
                cpuid\r
                mov     eax, edx\r
                and     rax, FXSTOR_FLAG\r
                shr     rax, 24\r
                pop     rbx\r
                ret\r
\r
;------------------------------------------------------------------------------\r
; void\r
; Vect2Desc (\r
;   IA32_IDT_GATE_DESCRIPTOR * DestDesc,  // rcx\r
;   void (*Vector) (void)   // rdx\r
;   )\r
;\r
; Abstract: Encodes an IDT descriptor with the given physical address\r
;\r
global ASM_PFX(Vect2Desc)\r
ASM_PFX(Vect2Desc):\r
\r
                mov     rax, rdx\r
                mov     word [rcx], ax                  ; write bits 15..0 of offset\r
                mov     dx, cs\r
                mov     word [rcx+2], dx                ; SYS_CODE_SEL from GDT\r
                mov     word [rcx+4], 0xe00 | 0x8000    ; type = 386 interrupt gate, present\r
                shr     rax, 16\r
                mov     word [rcx+6], ax                ; write bits 31..16 of offset\r
                shr     rax, 16\r
                mov     dword [rcx+8], eax              ; write bits 63..32 of offset\r
\r
                ret\r
\r
;------------------------------------------------------------------------------\r
; InterruptEntryStub\r
;\r
; Abstract: This code is not a function, but is a small piece of code that is\r
;               copied and fixed up once for each IDT entry that is hooked.\r
;\r
ASM_PFX(InterruptEntryStub):\r
                push    0                       ; push vector number - will be modified before installed\r
                db      0xe9                    ; jump rel32\r
                dd      0                       ; fixed up to relative address of CommonIdtEntry\r
InterruptEntryStubEnd:\r
\r
;------------------------------------------------------------------------------\r
; CommonIdtEntry\r
;\r
; Abstract: This code is not a function, but is the common part for all IDT\r
;               vectors.\r
;\r
ASM_PFX(CommonIdtEntry):\r
;;\r
;; At this point, the stub has saved the current application stack esp into AppRsp\r
;; and switched stacks to the debug stack, where it pushed the vector number\r
;;\r
;; The application stack looks like this:\r
;;\r
;;              ...\r
;;              (last application stack entry)\r
;;              [16 bytes alignment, do not care it]\r
;;              SS from interrupted task\r
;;              RSP from interrupted task\r
;;              rflags from interrupted task\r
;;              CS from interrupted task\r
;;              RIP from interrupted task\r
;;              Error code <-------------------- Only present for some exeption types\r
;;\r
;;              Vector Number <----------------- pushed in our IDT Entry\r
;;\r
\r
;; The stub switched us to the debug stack and pushed the interrupt number.\r
;;\r
;; Next, construct the context record.  It will be build on the debug stack by\r
;; pushing the registers in the correct order so as to create the context structure\r
;; on the debug stack.  The context record must be built from the end back to the\r
;; beginning because the stack grows down...\r
;\r
;; For reference, the context record looks like this:\r
;;\r
;; typedef\r
;; struct {\r
;;   UINT64            ExceptionData;\r
;;   FX_SAVE_STATE_X64 FxSaveState;\r
;;   UINT64            Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
;;   UINT64            Cr0, Cr2, Cr3, Cr4, Cr8;\r
;;   UINT64            RFlags;\r
;;   UINT64            Ldtr, Tr;\r
;;   UINT64            Gdtr[2], Idtr[2];\r
;;   UINT64            Rip;\r
;;   UINT64            Gs, Fs, Es, Ds, Cs, Ss;\r
;;   UINT64            Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;\r
;;   UINT64            R8, R9, R10, R11, R12, R13, R14, R15;\r
;; } SYSTEM_CONTEXT_X64;  // 64 bit system context record\r
\r
;; NOTE: we save rsp here to prevent compiler put rip reference cause error AppRsp\r
                push    rax\r
                mov     rax, qword [rsp+8]               ; save vector number\r
                mov     [ExceptionNumber], rax           ; save vector number\r
                pop     rax\r
                add     rsp, 8                           ; pop vector number\r
                mov     [AppRsp], rsp                    ; save stack top\r
                lea     rsp, [DebugStackBegin]           ; switch to debugger stack\r
                sub     rsp, 8                           ; leave space for vector number\r
\r
;; UINT64  Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;\r
;; UINT64  R8, R9, R10, R11, R12, R13, R14, R15;\r
                push    r15\r
                push    r14\r
                push    r13\r
                push    r12\r
                push    r11\r
                push    r10\r
                push    r9\r
                push    r8\r
                push    rax\r
                push    rcx\r
                push    rdx\r
                push    rbx\r
                push    rsp\r
                push    rbp\r
                push    rsi\r
                push    rdi\r
\r
;; Save interrupt state rflags register...\r
                pushfq\r
                pop     rax\r
                mov     [Rflags], rax\r
\r
;; We need to determine if any extra data was pushed by the exception, and if so, save it\r
;; To do this, we check the exception number pushed by the stub, and cache the\r
;; result in a variable since we'll need this again.\r
                cmp     qword [ExceptionNumber], EXCPT64_DOUBLE_FAULT\r
                jz      ExtraPushOne\r
                cmp     qword [ExceptionNumber], EXCPT64_INVALID_TSS\r
                jz      ExtraPushOne\r
                cmp     qword [ExceptionNumber], EXCPT64_SEG_NOT_PRESENT\r
                jz      ExtraPushOne\r
                cmp     qword [ExceptionNumber], EXCPT64_STACK_FAULT\r
                jz      ExtraPushOne\r
                cmp     qword [ExceptionNumber], EXCPT64_GP_FAULT\r
                jz      ExtraPushOne\r
                cmp     qword [ExceptionNumber], EXCPT64_PAGE_FAULT\r
                jz      ExtraPushOne\r
                cmp     qword [ExceptionNumber], EXCPT64_ALIGNMENT_CHECK\r
                jz      ExtraPushOne\r
                mov     qword [ExtraPush], 0\r
                mov     qword [ExceptData], 0\r
                jmp     ExtraPushDone\r
ExtraPushOne:\r
                mov     qword [ExtraPush], 1\r
\r
;; If there's some extra data, save it also, and modify the saved AppRsp to effectively\r
;; pop this value off the application's stack.\r
                mov     rax, [AppRsp]\r
                mov     rbx, [rax]\r
                mov     qword [ExceptData], rbx\r
                add     rax, 8\r
                mov     [AppRsp], rax\r
\r
ExtraPushDone:\r
\r
;; The "push" above pushed the debug stack rsp.  Since what we're actually doing\r
;; is building the context record on the debug stack, we need to save the pushed\r
;; debug RSP, and replace it with the application's last stack entry...\r
                mov     rax, [rsp + 24]\r
                mov     [DebugRsp], rax\r
                mov     rax, [AppRsp]\r
                mov     rax, QWORD [rax + 24]\r
                ; application stack has ss, rsp, rflags, cs, & rip, so\r
                ; last actual application stack entry is saved at offset\r
                ; 24 bytes from stack top.\r
                mov     [rsp + 24], rax\r
\r
;; continue building context record\r
;; UINT64  Gs, Fs, Es, Ds, Cs, Ss;  insure high 16 bits of each is zero\r
                mov     rax, ss\r
                push    rax\r
\r
                ; CS from application is one entry back in application stack\r
                mov     rax, [AppRsp]\r
                movzx   rax, word [rax + 8]\r
                push    rax\r
\r
                mov     rax, ds\r
                push    rax\r
                mov     rax, es\r
                push    rax\r
                mov     rax, fs\r
                push    rax\r
                mov     rax, gs\r
                push    rax\r
\r
;; UINT64  Rip;\r
                ; Rip from application is on top of application stack\r
                mov     rax, [AppRsp]\r
                push    qword [rax]\r
\r
;; UINT64  Gdtr[2], Idtr[2];\r
                push    0\r
                push    0\r
                sidt    [rsp]\r
                push    0\r
                push    0\r
                sgdt    [rsp]\r
\r
;; UINT64  Ldtr, Tr;\r
                xor     rax, rax\r
                str     ax\r
                push    rax\r
                sldt    ax\r
                push    rax\r
\r
;; UINT64  RFlags;\r
;; Rflags from application is two entries back in application stack\r
                mov     rax, [AppRsp]\r
                push    qword [rax + 16]\r
\r
;; UINT64  Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;\r
;; insure FXSAVE/FXRSTOR is enabled in CR4...\r
;; ... while we're at it, make sure DE is also enabled...\r
                mov     rax, cr8\r
                push    rax\r
                mov     rax, cr4\r
                or      rax, 0x208\r
                mov     cr4, rax\r
                push    rax\r
                mov     rax, cr3\r
                push    rax\r
                mov     rax, cr2\r
                push    rax\r
                push    0\r
                mov     rax, cr0\r
                push    rax\r
\r
;; UINT64  Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
                mov     rax, dr7\r
                push    rax\r
;; clear Dr7 while executing debugger itself\r
                xor     rax, rax\r
                mov     dr7, rax\r
\r
                mov     rax, dr6\r
                push    rax\r
;; insure all status bits in dr6 are clear...\r
                xor     rax, rax\r
                mov     dr6, rax\r
\r
                mov     rax, dr3\r
                push    rax\r
                mov     rax, dr2\r
                push    rax\r
                mov     rax, dr1\r
                push    rax\r
                mov     rax, dr0\r
                push    rax\r
\r
;; FX_SAVE_STATE_X64 FxSaveState;\r
                sub     rsp, 512\r
                mov     rdi, rsp\r
                ; IMPORTANT!! The debug stack has been carefully constructed to\r
                ; insure that rsp and rdi are 16 byte aligned when we get here.\r
                ; They MUST be.  If they are not, a GP fault will occur.\r
                fxsave  [rdi]\r
\r
;; UEFI calling convention for x64 requires that Direction flag in EFLAGs is clear\r
                cld\r
\r
;; UINT64  ExceptionData;\r
                mov     rax, [ExceptData]\r
                push    rax\r
\r
; call to C code which will in turn call registered handler\r
; pass in the vector number\r
                mov     rdx, rsp\r
                mov     rcx, [ExceptionNumber]\r
                sub     rsp, 40\r
                call    ASM_PFX(InterruptDistrubutionHub)\r
                add     rsp, 40\r
\r
; restore context...\r
;; UINT64  ExceptionData;\r
                add     rsp, 8\r
\r
;; FX_SAVE_STATE_X64 FxSaveState;\r
                mov     rsi, rsp\r
                fxrstor [rsi]\r
                add     rsp, 512\r
\r
;; UINT64  Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
                pop     rax\r
                mov     dr0, rax\r
                pop     rax\r
                mov     dr1, rax\r
                pop     rax\r
                mov     dr2, rax\r
                pop     rax\r
                mov     dr3, rax\r
;; skip restore of dr6.  We cleared dr6 during the context save.\r
                add     rsp, 8\r
                pop     rax\r
                mov     dr7, rax\r
\r
;; UINT64  Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;\r
                pop     rax\r
                mov     cr0, rax\r
                add     rsp, 8\r
                pop     rax\r
                mov     cr2, rax\r
                pop     rax\r
                mov     cr3, rax\r
                pop     rax\r
                mov     cr4, rax\r
                pop     rax\r
                mov     cr8, rax\r
\r
;; UINT64  RFlags;\r
                mov     rax, [AppRsp]\r
                pop     qword [rax + 16]\r
\r
;; UINT64  Ldtr, Tr;\r
;; UINT64  Gdtr[2], Idtr[2];\r
;; Best not let anyone mess with these particular registers...\r
                add     rsp, 48\r
\r
;; UINT64  Rip;\r
                pop     qword [rax]\r
\r
;; UINT64  Gs, Fs, Es, Ds, Cs, Ss;\r
;; NOTE - modified segment registers could hang the debugger...  We\r
;;        could attempt to insulate ourselves against this possibility,\r
;;        but that poses risks as well.\r
;;\r
\r
                pop     rax\r
                ; mov     gs, rax\r
                pop     rax\r
                ; mov     fs, rax\r
                pop     rax\r
                mov     es, rax\r
                pop     rax\r
                mov     ds, rax\r
                mov     rax, [AppRsp]\r
                pop     qword [rax + 8]\r
                pop     rax\r
                mov     ss, rax\r
\r
;; The next stuff to restore is the general purpose registers that were pushed\r
;; using the "push" instruction.\r
;;\r
;; The value of RSP as stored in the context record is the application RSP\r
;; including the 5 entries on the application stack caused by the exception\r
;; itself. It may have been modified by the debug agent, so we need to\r
;; determine if we need to relocate the application stack.\r
\r
                mov     rbx, [rsp + 24]  ; move the potentially modified AppRsp into rbx\r
                mov     rax, [AppRsp]\r
                mov     rax, QWORD [rax + 24]\r
                cmp     rbx, rax\r
                je      NoAppStackMove\r
\r
                mov     rax, [AppRsp]\r
                mov     rcx, [rax]       ; RIP\r
                mov     [rbx], rcx\r
\r
                mov     rcx, [rax + 8]   ; CS\r
                mov     [rbx + 8], rcx\r
\r
                mov     rcx, [rax + 16]  ; RFLAGS\r
                mov     [rbx + 16], rcx\r
\r
                mov     rcx, [rax + 24]  ; RSP\r
                mov     [rbx + 24], rcx\r
\r
                mov     rcx, [rax + 32]  ; SS\r
                mov     [rbx + 32], rcx\r
\r
                mov     rax, rbx         ; modify the saved AppRsp to the new AppRsp\r
                mov     [AppRsp], rax\r
NoAppStackMove:\r
                mov     rax, [DebugRsp]  ; restore the DebugRsp on the debug stack\r
                                         ; so our "pop" will not cause a stack switch\r
                mov     [rsp + 24], rax\r
\r
                cmp     qword [ExceptionNumber], 0x68\r
                jne     NoChain\r
\r
Chain:\r
\r
;; Restore rflags so when we chain, the flags will be exactly as if we were never here.\r
;; We gin up the stack to do an iretq so we can get ALL the flags.\r
                mov     rax, [AppRsp]\r
                mov     rbx, [rax + 40]\r
                push    rbx\r
                mov     rax, ss\r
                push    rax\r
                mov     rax, rsp\r
                add     rax, 16\r
                push    rax\r
                mov     rax, [AppRsp]\r
                mov     rbx, [rax + 16]\r
                and     rbx, ~ 0x300 ; special handling for IF and TF\r
                push    rbx\r
                mov     rax, cs\r
                push    rax\r
                lea     rax, [PhonyIretq]\r
                push    rax\r
                iretq\r
PhonyIretq:\r
\r
;; UINT64  Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;\r
;; UINT64  R8, R9, R10, R11, R12, R13, R14, R15;\r
                pop     rdi\r
                pop     rsi\r
                pop     rbp\r
                pop     rsp\r
                pop     rbx\r
                pop     rdx\r
                pop     rcx\r
                pop     rax\r
                pop     r8\r
                pop     r9\r
                pop     r10\r
                pop     r11\r
                pop     r12\r
                pop     r13\r
                pop     r14\r
                pop     r15\r
\r
;; Switch back to application stack\r
                mov     rsp, [AppRsp]\r
\r
;; Jump to original handler\r
                jmp     [ASM_PFX(OrigVector)]\r
\r
NoChain:\r
;; UINT64  Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;\r
;; UINT64  R8, R9, R10, R11, R12, R13, R14, R15;\r
                pop     rdi\r
                pop     rsi\r
                pop     rbp\r
                pop     rsp\r
                pop     rbx\r
                pop     rdx\r
                pop     rcx\r
                pop     rax\r
                pop     r8\r
                pop     r9\r
                pop     r10\r
                pop     r11\r
                pop     r12\r
                pop     r13\r
                pop     r14\r
                pop     r15\r
\r
;; Switch back to application stack\r
                mov     rsp, [AppRsp]\r
\r
;; We're outa here...\r
                iretq\r
\r
Commit	Line	Data
63b865c6 JJ	1	;/** @file\r
	2	; Low level x64 routines used by the debug support driver.\r
	3	;\r
84338c0d	4	; Copyright (c) 2007 - 2022, Intel Corporation. All rights reserved.<BR>\r
9d510e61	5	; SPDX-License-Identifier: BSD-2-Clause-Patent\r
63b865c6 JJ	6	;\r
	7	;**/\r
	8	\r
	9	%define EXCPT64_DIVIDE_ERROR 0\r
	10	%define EXCPT64_DEBUG 1\r
	11	%define EXCPT64_NMI 2\r
	12	%define EXCPT64_BREAKPOINT 3\r
	13	%define EXCPT64_OVERFLOW 4\r
	14	%define EXCPT64_BOUND 5\r
	15	%define EXCPT64_INVALID_OPCODE 6\r
	16	%define EXCPT64_DOUBLE_FAULT 8\r
	17	%define EXCPT64_INVALID_TSS 10\r
	18	%define EXCPT64_SEG_NOT_PRESENT 11\r
	19	%define EXCPT64_STACK_FAULT 12\r
	20	%define EXCPT64_GP_FAULT 13\r
	21	%define EXCPT64_PAGE_FAULT 14\r
	22	%define EXCPT64_FP_ERROR 16\r
	23	%define EXCPT64_ALIGNMENT_CHECK 17\r
	24	%define EXCPT64_MACHINE_CHECK 18\r
	25	%define EXCPT64_SIMD 19\r
	26	\r
	27	%define FXSTOR_FLAG 0x1000000 ; bit cpuid 24 of feature flags\r
	28	\r
63b865c6 JJ	29	SECTION .data\r
	30	\r
	31	global ASM_PFX(OrigVector)\r
	32	global ASM_PFX(InterruptEntryStub)\r
	33	global ASM_PFX(StubSize)\r
	34	global ASM_PFX(CommonIdtEntry)\r
	35	global ASM_PFX(FxStorSupport)\r
	36	extern ASM_PFX(InterruptDistrubutionHub)\r
	37	\r
	38	ASM_PFX(StubSize): dd InterruptEntryStubEnd - ASM_PFX(InterruptEntryStub)\r
	39	AppRsp: dq 0x1111111111111111 ; ?\r
	40	DebugRsp: dq 0x2222222222222222 ; ?\r
	41	ExtraPush: dq 0x3333333333333333 ; ?\r
	42	ExceptData: dq 0x4444444444444444 ; ?\r
	43	Rflags: dq 0x5555555555555555 ; ?\r
	44	ASM_PFX(OrigVector): dq 0x6666666666666666 ; ?\r
	45	\r
	46	;; The declarations below define the memory region that will be used for the debug stack.\r
	47	;; The context record will be built by pushing register values onto this stack.\r
	48	;; It is imparitive that alignment be carefully managed, since the FXSTOR and\r
	49	;; FXRSTOR instructions will GP fault if their memory operand is not 16 byte aligned.\r
	50	;;\r
	51	;; The stub will switch stacks from the application stack to the debuger stack\r
	52	;; and pushes the exception number.\r
	53	;;\r
	54	;; Then we building the context record on the stack. Since the stack grows down,\r
	55	;; we push the fields of the context record from the back to the front. There\r
	56	;; are 336 bytes of stack used prior allocating the 512 bytes of stack to be\r
	57	;; used as the memory buffer for the fxstor instruction. Therefore address of\r
	58	;; the buffer used for the FXSTOR instruction is &Eax - 336 - 512, which\r
	59	;; must be 16 byte aligned.\r
	60	;;\r
	61	;; We carefully locate the stack to make this happen.\r
	62	;;\r
	63	;; For reference, the context structure looks like this:\r
	64	;; struct {\r
	65	;; UINT64 ExceptionData;\r
	66	;; FX_SAVE_STATE_X64 FxSaveState; // 512 bytes, must be 16 byte aligned\r
	67	;; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
	68	;; UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;\r
	69	;; UINT64 RFlags;\r
	70	;; UINT64 Ldtr, Tr;\r
	71	;; UINT64 Gdtr[2], Idtr[2];\r
	72	;; UINT64 Rip;\r
	73	;; UINT64 Gs, Fs, Es, Ds, Cs, Ss;\r
	74	;; UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;\r
	75	;; UINT64 R8, R9, R10, R11, R12, R13, R14, R15;\r
	76	;; } SYSTEM_CONTEXT_X64; // 64 bit system context record\r
	77	\r
	78	align 16\r
	79	DebugStackEnd: db "DbgStkEnd >>>>>>" ;; 16 byte long string - must be 16 bytes to preserve alignment\r
	80	times 0x1ffc dd 0x0 ;; 32K should be enough stack\r
	81	;; This allocation is coocked to insure\r
	82	;; that the the buffer for the FXSTORE instruction\r
	83	;; will be 16 byte aligned also.\r
	84	;;\r
	85	ExceptionNumber: dq 0 ;; first entry will be the vector number pushed by the stub\r
	86	\r
	87	DebugStackBegin: db "<<<< DbgStkBegin" ;; initial debug ESP == DebugStackBegin, set in stub\r
	88	\r
	89	DEFAULT REL\r
	90	SECTION .text\r
	91	\r
	92	;------------------------------------------------------------------------------\r
93	; BOOLEAN\r
94	; FxStorSupport (\r
95	; void\r
96	; )\r
97	;\r
98	; Abstract: Returns TRUE if FxStor instructions are supported\r
99	;\r
100	global ASM_PFX(FxStorSupport)\r
101	ASM_PFX(FxStorSupport):\r
102	\r
103	;\r
104	; cpuid corrupts rbx which must be preserved per the C calling convention\r
105	;\r
106	push rbx\r
107	mov rax, dword 1\r
108	cpuid\r
109	mov eax, edx\r
110	and rax, FXSTOR_FLAG\r
111	shr rax, 24\r
112	pop rbx\r
113	ret\r
114	\r
115	;------------------------------------------------------------------------------\r
116	; void\r
117	; Vect2Desc (\r
118	; IA32_IDT_GATE_DESCRIPTOR * DestDesc, // rcx\r
119	; void (*Vector) (void) // rdx\r
120	; )\r
121	;\r
122	; Abstract: Encodes an IDT descriptor with the given physical address\r
123	;\r
124	global ASM_PFX(Vect2Desc)\r
125	ASM_PFX(Vect2Desc):\r
126	\r
127	mov rax, rdx\r
128	mov word [rcx], ax ; write bits 15..0 of offset\r
129	mov dx, cs\r
130	mov word [rcx+2], dx ; SYS_CODE_SEL from GDT\r
131	mov word [rcx+4], 0xe00 \| 0x8000 ; type = 386 interrupt gate, present\r
132	shr rax, 16\r
133	mov word [rcx+6], ax ; write bits 31..16 of offset\r
134	shr rax, 16\r
135	mov dword [rcx+8], eax ; write bits 63..32 of offset\r
136	\r
137	ret\r
138	\r
139	;------------------------------------------------------------------------------\r
140	; InterruptEntryStub\r
141	;\r
142	; Abstract: This code is not a function, but is a small piece of code that is\r
143	; copied and fixed up once for each IDT entry that is hooked.\r
144	;\r
145	ASM_PFX(InterruptEntryStub):\r
146	push 0 ; push vector number - will be modified before installed\r
147	db 0xe9 ; jump rel32\r
148	dd 0 ; fixed up to relative address of CommonIdtEntry\r
149	InterruptEntryStubEnd:\r
150	\r
151	;------------------------------------------------------------------------------\r
152	; CommonIdtEntry\r
153	;\r
154	; Abstract: This code is not a function, but is the common part for all IDT\r
155	; vectors.\r
156	;\r
157	ASM_PFX(CommonIdtEntry):\r
158	;;\r
159	;; At this point, the stub has saved the current application stack esp into AppRsp\r
160	;; and switched stacks to the debug stack, where it pushed the vector number\r
161	;;\r
162	;; The application stack looks like this:\r
163	;;\r
164	;; ...\r
165	;; (last application stack entry)\r
166	;; [16 bytes alignment, do not care it]\r
167	;; SS from interrupted task\r
168	;; RSP from interrupted task\r
169	;; rflags from interrupted task\r
170	;; CS from interrupted task\r
171	;; RIP from interrupted task\r
172	;; Error code <-------------------- Only present for some exeption types\r
173	;;\r
174	;; Vector Number <----------------- pushed in our IDT Entry\r
175	;;\r
176	\r
177	;; The stub switched us to the debug stack and pushed the interrupt number.\r
178	;;\r
179	;; Next, construct the context record. It will be build on the debug stack by\r
180	;; pushing the registers in the correct order so as to create the context structure\r
181	;; on the debug stack. The context record must be built from the end back to the\r
182	;; beginning because the stack grows down...\r
183	;\r
184	;; For reference, the context record looks like this:\r
185	;;\r
186	;; typedef\r
187	;; struct {\r
188	;; UINT64 ExceptionData;\r
189	;; FX_SAVE_STATE_X64 FxSaveState;\r
190	;; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
191	;; UINT64 Cr0, Cr2, Cr3, Cr4, Cr8;\r
192	;; UINT64 RFlags;\r
193	;; UINT64 Ldtr, Tr;\r
194	;; UINT64 Gdtr[2], Idtr[2];\r
195	;; UINT64 Rip;\r
196	;; UINT64 Gs, Fs, Es, Ds, Cs, Ss;\r
197	;; UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;\r
198	;; UINT64 R8, R9, R10, R11, R12, R13, R14, R15;\r
199	;; } SYSTEM_CONTEXT_X64; // 64 bit system context record\r
200	\r
201	;; NOTE: we save rsp here to prevent compiler put rip reference cause error AppRsp\r
202	push rax\r
203	mov rax, qword [rsp+8] ; save vector number\r
204	mov [ExceptionNumber], rax ; save vector number\r
205	pop rax\r
206	add rsp, 8 ; pop vector number\r
207	mov [AppRsp], rsp ; save stack top\r
62382925	208	lea rsp, [DebugStackBegin] ; switch to debugger stack\r
63b865c6 JJ	209	sub rsp, 8 ; leave space for vector number\r
	210	\r
	211	;; UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;\r
	212	;; UINT64 R8, R9, R10, R11, R12, R13, R14, R15;\r
	213	push r15\r
	214	push r14\r
	215	push r13\r
	216	push r12\r
	217	push r11\r
	218	push r10\r
	219	push r9\r
	220	push r8\r
	221	push rax\r
	222	push rcx\r
	223	push rdx\r
	224	push rbx\r
	225	push rsp\r
	226	push rbp\r
	227	push rsi\r
	228	push rdi\r
	229	\r
	230	;; Save interrupt state rflags register...\r
	231	pushfq\r
	232	pop rax\r
	233	mov [Rflags], rax\r
	234	\r
	235	;; We need to determine if any extra data was pushed by the exception, and if so, save it\r
	236	;; To do this, we check the exception number pushed by the stub, and cache the\r
	237	;; result in a variable since we'll need this again.\r
	238	cmp qword [ExceptionNumber], EXCPT64_DOUBLE_FAULT\r
	239	jz ExtraPushOne\r
	240	cmp qword [ExceptionNumber], EXCPT64_INVALID_TSS\r
	241	jz ExtraPushOne\r
	242	cmp qword [ExceptionNumber], EXCPT64_SEG_NOT_PRESENT\r
	243	jz ExtraPushOne\r
	244	cmp qword [ExceptionNumber], EXCPT64_STACK_FAULT\r
	245	jz ExtraPushOne\r
	246	cmp qword [ExceptionNumber], EXCPT64_GP_FAULT\r
	247	jz ExtraPushOne\r
	248	cmp qword [ExceptionNumber], EXCPT64_PAGE_FAULT\r
	249	jz ExtraPushOne\r
	250	cmp qword [ExceptionNumber], EXCPT64_ALIGNMENT_CHECK\r
	251	jz ExtraPushOne\r
	252	mov qword [ExtraPush], 0\r
	253	mov qword [ExceptData], 0\r
	254	jmp ExtraPushDone\r
	255	ExtraPushOne:\r
	256	mov qword [ExtraPush], 1\r
	257	\r
	258	;; If there's some extra data, save it also, and modify the saved AppRsp to effectively\r
	259	;; pop this value off the application's stack.\r
	260	mov rax, [AppRsp]\r
	261	mov rbx, [rax]\r
	262	mov qword [ExceptData], rbx\r
	263	add rax, 8\r
	264	mov [AppRsp], rax\r
	265	\r
	266	ExtraPushDone:\r
	267	\r
	268	;; The "push" above pushed the debug stack rsp. Since what we're actually doing\r
	269	;; is building the context record on the debug stack, we need to save the pushed\r
	270	;; debug RSP, and replace it with the application's last stack entry...\r
	271	mov rax, [rsp + 24]\r
	272	mov [DebugRsp], rax\r
273	mov rax, [AppRsp]\r
274	mov rax, QWORD [rax + 24]\r
275	; application stack has ss, rsp, rflags, cs, & rip, so\r
276	; last actual application stack entry is saved at offset\r
277	; 24 bytes from stack top.\r
278	mov [rsp + 24], rax\r
279	\r
280	;; continue building context record\r
281	;; UINT64 Gs, Fs, Es, Ds, Cs, Ss; insure high 16 bits of each is zero\r
282	mov rax, ss\r
283	push rax\r
284	\r
285	; CS from application is one entry back in application stack\r
286	mov rax, [AppRsp]\r
287	movzx rax, word [rax + 8]\r
288	push rax\r
289	\r
290	mov rax, ds\r
291	push rax\r
292	mov rax, es\r
293	push rax\r
294	mov rax, fs\r
295	push rax\r
296	mov rax, gs\r
297	push rax\r
298	\r
299	;; UINT64 Rip;\r
300	; Rip from application is on top of application stack\r
301	mov rax, [AppRsp]\r
302	push qword [rax]\r
303	\r
304	;; UINT64 Gdtr[2], Idtr[2];\r
305	push 0\r
306	push 0\r
307	sidt [rsp]\r
308	push 0\r
309	push 0\r
310	sgdt [rsp]\r
311	\r
312	;; UINT64 Ldtr, Tr;\r
313	xor rax, rax\r
314	str ax\r
315	push rax\r
316	sldt ax\r
317	push rax\r
318	\r
319	;; UINT64 RFlags;\r
320	;; Rflags from application is two entries back in application stack\r
321	mov rax, [AppRsp]\r
322	push qword [rax + 16]\r
323	\r
324	;; UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;\r
325	;; insure FXSAVE/FXRSTOR is enabled in CR4...\r
326	;; ... while we're at it, make sure DE is also enabled...\r
327	mov rax, cr8\r
328	push rax\r
329	mov rax, cr4\r
330	or rax, 0x208\r
331	mov cr4, rax\r
332	push rax\r
333	mov rax, cr3\r
334	push rax\r
335	mov rax, cr2\r
336	push rax\r
337	push 0\r
338	mov rax, cr0\r
339	push rax\r
340	\r
341	;; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
342	mov rax, dr7\r
343	push rax\r
344	;; clear Dr7 while executing debugger itself\r
345	xor rax, rax\r
346	mov dr7, rax\r
347	\r
348	mov rax, dr6\r
349	push rax\r
350	;; insure all status bits in dr6 are clear...\r
351	xor rax, rax\r
352	mov dr6, rax\r
353	\r
354	mov rax, dr3\r
355	push rax\r
356	mov rax, dr2\r
357	push rax\r
358	mov rax, dr1\r
359	push rax\r
360	mov rax, dr0\r
361	push rax\r
362	\r
363	;; FX_SAVE_STATE_X64 FxSaveState;\r
364	sub rsp, 512\r
365	mov rdi, rsp\r
366	; IMPORTANT!! The debug stack has been carefully constructed to\r
367	; insure that rsp and rdi are 16 byte aligned when we get here.\r
368	; They MUST be. If they are not, a GP fault will occur.\r
84338c0d	369	fxsave [rdi]\r
63b865c6 JJ	370	\r
	371	;; UEFI calling convention for x64 requires that Direction flag in EFLAGs is clear\r
	372	cld\r
	373	\r
	374	;; UINT64 ExceptionData;\r
	375	mov rax, [ExceptData]\r
	376	push rax\r
	377	\r
	378	; call to C code which will in turn call registered handler\r
	379	; pass in the vector number\r
	380	mov rdx, rsp\r
	381	mov rcx, [ExceptionNumber]\r
	382	sub rsp, 40\r
	383	call ASM_PFX(InterruptDistrubutionHub)\r
	384	add rsp, 40\r
	385	\r
	386	; restore context...\r
	387	;; UINT64 ExceptionData;\r
	388	add rsp, 8\r
	389	\r
	390	;; FX_SAVE_STATE_X64 FxSaveState;\r
	391	mov rsi, rsp\r
84338c0d	392	fxrstor [rsi]\r
63b865c6 JJ	393	add rsp, 512\r
	394	\r
	395	;; UINT64 Dr0, Dr1, Dr2, Dr3, Dr6, Dr7;\r
	396	pop rax\r
	397	mov dr0, rax\r
	398	pop rax\r
	399	mov dr1, rax\r
	400	pop rax\r
	401	mov dr2, rax\r
	402	pop rax\r
	403	mov dr3, rax\r
	404	;; skip restore of dr6. We cleared dr6 during the context save.\r
	405	add rsp, 8\r
	406	pop rax\r
	407	mov dr7, rax\r
	408	\r
	409	;; UINT64 Cr0, Cr1, Cr2, Cr3, Cr4, Cr8;\r
	410	pop rax\r
	411	mov cr0, rax\r
	412	add rsp, 8\r
	413	pop rax\r
	414	mov cr2, rax\r
	415	pop rax\r
	416	mov cr3, rax\r
	417	pop rax\r
	418	mov cr4, rax\r
	419	pop rax\r
	420	mov cr8, rax\r
	421	\r
	422	;; UINT64 RFlags;\r
	423	mov rax, [AppRsp]\r
	424	pop qword [rax + 16]\r
	425	\r
	426	;; UINT64 Ldtr, Tr;\r
	427	;; UINT64 Gdtr[2], Idtr[2];\r
	428	;; Best not let anyone mess with these particular registers...\r
	429	add rsp, 48\r
	430	\r
	431	;; UINT64 Rip;\r
	432	pop qword [rax]\r
	433	\r
	434	;; UINT64 Gs, Fs, Es, Ds, Cs, Ss;\r
	435	;; NOTE - modified segment registers could hang the debugger... We\r
	436	;; could attempt to insulate ourselves against this possibility,\r
	437	;; but that poses risks as well.\r
	438	;;\r
	439	\r
	440	pop rax\r
	441	; mov gs, rax\r
	442	pop rax\r
	443	; mov fs, rax\r
	444	pop rax\r
	445	mov es, rax\r
	446	pop rax\r
	447	mov ds, rax\r
	448	mov rax, [AppRsp]\r
	449	pop qword [rax + 8]\r
	450	pop rax\r
	451	mov ss, rax\r
	452	\r
	453	;; The next stuff to restore is the general purpose registers that were pushed\r
	454	;; using the "push" instruction.\r
	455	;;\r
	456	;; The value of RSP as stored in the context record is the application RSP\r
457	;; including the 5 entries on the application stack caused by the exception\r
458	;; itself. It may have been modified by the debug agent, so we need to\r
459	;; determine if we need to relocate the application stack.\r
460	\r
461	mov rbx, [rsp + 24] ; move the potentially modified AppRsp into rbx\r
462	mov rax, [AppRsp]\r
463	mov rax, QWORD [rax + 24]\r
464	cmp rbx, rax\r
465	je NoAppStackMove\r
466	\r
467	mov rax, [AppRsp]\r
468	mov rcx, [rax] ; RIP\r
469	mov [rbx], rcx\r
470	\r
471	mov rcx, [rax + 8] ; CS\r
472	mov [rbx + 8], rcx\r
473	\r
474	mov rcx, [rax + 16] ; RFLAGS\r
475	mov [rbx + 16], rcx\r
476	\r
477	mov rcx, [rax + 24] ; RSP\r
478	mov [rbx + 24], rcx\r
479	\r
480	mov rcx, [rax + 32] ; SS\r
481	mov [rbx + 32], rcx\r
482	\r
483	mov rax, rbx ; modify the saved AppRsp to the new AppRsp\r
484	mov [AppRsp], rax\r
485	NoAppStackMove:\r
486	mov rax, [DebugRsp] ; restore the DebugRsp on the debug stack\r
487	; so our "pop" will not cause a stack switch\r
488	mov [rsp + 24], rax\r
489	\r
490	cmp qword [ExceptionNumber], 0x68\r
491	jne NoChain\r
492	\r
493	Chain:\r
494	\r
495	;; Restore rflags so when we chain, the flags will be exactly as if we were never here.\r
496	;; We gin up the stack to do an iretq so we can get ALL the flags.\r
497	mov rax, [AppRsp]\r
498	mov rbx, [rax + 40]\r
499	push rbx\r
500	mov rax, ss\r
501	push rax\r
502	mov rax, rsp\r
503	add rax, 16\r
504	push rax\r
505	mov rax, [AppRsp]\r
506	mov rbx, [rax + 16]\r
507	and rbx, ~ 0x300 ; special handling for IF and TF\r
508	push rbx\r
509	mov rax, cs\r
510	push rax\r
62382925	511	lea rax, [PhonyIretq]\r
63b865c6 JJ	512	push rax\r
	513	iretq\r
	514	PhonyIretq:\r
	515	\r
	516	;; UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;\r
	517	;; UINT64 R8, R9, R10, R11, R12, R13, R14, R15;\r
	518	pop rdi\r
	519	pop rsi\r
	520	pop rbp\r
	521	pop rsp\r
	522	pop rbx\r
	523	pop rdx\r
	524	pop rcx\r
	525	pop rax\r
	526	pop r8\r
	527	pop r9\r
	528	pop r10\r
	529	pop r11\r
	530	pop r12\r
	531	pop r13\r
	532	pop r14\r
	533	pop r15\r
	534	\r
	535	;; Switch back to application stack\r
	536	mov rsp, [AppRsp]\r
	537	\r
	538	;; Jump to original handler\r
	539	jmp [ASM_PFX(OrigVector)]\r
	540	\r
	541	NoChain:\r
	542	;; UINT64 Rdi, Rsi, Rbp, Rsp, Rbx, Rdx, Rcx, Rax;\r
	543	;; UINT64 R8, R9, R10, R11, R12, R13, R14, R15;\r
	544	pop rdi\r
	545	pop rsi\r
	546	pop rbp\r
	547	pop rsp\r
	548	pop rbx\r
	549	pop rdx\r
	550	pop rcx\r
	551	pop rax\r
	552	pop r8\r
	553	pop r9\r
	554	pop r10\r
	555	pop r11\r
	556	pop r12\r
	557	pop r13\r
	558	pop r14\r
	559	pop r15\r
	560	\r
	561	;; Switch back to application stack\r
	562	mov rsp, [AppRsp]\r
	563	\r
	564	;; We're outa here...\r
	565	iretq\r
	566	\r