[mirror_edk2.git] / MdeModulePkg / Universal / PcatSingleSegmentPciCfg2Pei / PciCfg2.c

/** @file\r
  Installs Single Segment Pci Configuration PPI.\r
\r
  Copyright (c) 2006 - 2007, Intel Corporation\r
  All rights reserved. This program and the accompanying materials\r
  are licensed and made available under the terms and conditions of the BSD License\r
  which accompanies this distribution.  The full text of the license may be found at\r
  http://opensource.org/licenses/bsd-license.php\r
\r
  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
\r
**/\r
\r
#include <PiPei.h>\r
\r
#include <Ppi/PciCfg2.h>\r
\r
#include <Library/BaseLib.h>\r
#include <Library/DebugLib.h>\r
#include <Library/PciLib.h>\r
#include <Library/PeimEntryPoint.h>\r
\r
#include <IndustryStandard/Pci.h>\r
\r
/**\r
  Reads from a given location in the PCI configuration space.\r
\r
  @param  PeiServices     An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
\r
  @param  This            Pointer to local data for the interface.\r
\r
  @param  Width           The width of the access. Enumerated in bytes.\r
                          See EFI_PEI_PCI_CFG_PPI_WIDTH above.\r
\r
  @param  Address         The physical address of the access. The format of\r
                          the address is described by EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS.\r
\r
  @param  Buffer          A pointer to the buffer of data..\r
\r
\r
  @retval EFI_SUCCESS           The function completed successfully.\r
\r
  @retval EFI_DEVICE_ERROR      There was a problem with the transaction.\r
\r
  @retval EFI_DEVICE_NOT_READY  The device is not capable of supporting the operation at this\r
                                time.\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
PciCfg2Read (\r
  IN CONST  EFI_PEI_SERVICES          **PeiServices,\r
  IN CONST  EFI_PEI_PCI_CFG2_PPI      *This,\r
  IN        EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r
  IN        UINT64                    Address,\r
  IN OUT    VOID                      *Buffer\r
);\r
\r
/**\r
  Write to a given location in the PCI configuration space.\r
\r
  @param  PeiServices     An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
\r
  @param  This            Pointer to local data for the interface.\r
\r
  @param  Width           The width of the access. Enumerated in bytes.\r
                          See EFI_PEI_PCI_CFG_PPI_WIDTH above.\r
\r
  @param  Address         The physical address of the access. The format of\r
                          the address is described by EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS.\r
\r
  @param  Buffer          A pointer to the buffer of data..\r
\r
\r
  @retval EFI_SUCCESS           The function completed successfully.\r
\r
  @retval EFI_DEVICE_ERROR      There was a problem with the transaction.\r
\r
  @retval EFI_DEVICE_NOT_READY  The device is not capable of supporting the operation at this\r
                                time.\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
PciCfg2Write (\r
  IN CONST  EFI_PEI_SERVICES          **PeiServices,\r
  IN CONST  EFI_PEI_PCI_CFG2_PPI      *This,\r
  IN        EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r
  IN        UINT64                    Address,\r
  IN OUT    VOID                      *Buffer\r
);\r
\r
\r
/**\r
  PCI read-modify-write operation.\r
\r
  @param  PeiServices     An indirect pointer to the PEI Services Table\r
                          published by the PEI Foundation.\r
\r
  @param  This            Pointer to local data for the interface.\r
\r
  @param  Width           The width of the access. Enumerated in bytes. Type\r
                          EFI_PEI_PCI_CFG_PPI_WIDTH is defined in Read().\r
\r
  @param  Address         The physical address of the access.\r
\r
  @param  SetBits         Points to value to bitwise-OR with the read configuration value.\r
\r
                          The size of the value is determined by Width.\r
\r
  @param  ClearBits       Points to the value to negate and bitwise-AND with the read configuration value.\r
                          The size of the value is determined by Width.\r
\r
\r
  @retval EFI_SUCCESS           The function completed successfully.\r
\r
  @retval EFI_DEVICE_ERROR      There was a problem with the transaction.\r
\r
  @retval EFI_DEVICE_NOT_READY  The device is not capable of supporting\r
                                the operation at this time.\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
PciCfg2Modify (\r
  IN CONST  EFI_PEI_SERVICES          **PeiServices,\r
  IN CONST  EFI_PEI_PCI_CFG2_PPI      *This,\r
  IN        EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r
  IN        UINT64                    Address,\r
  IN        VOID                      *SetBits,\r
  IN        VOID                      *ClearBits\r
);\r
\r
\r
\r
/**\r
  @par Ppi Description:\r
  The EFI_PEI_PCI_CFG2_PPI interfaces are used to abstract\r
  accesses to PCI controllers behind a PCI root bridge\r
  controller.\r
\r
  @param Read     PCI read services.  See the Read() function description.\r
\r
  @param Write    PCI write services.  See the Write() function description.\r
\r
  @param Modify   PCI read-modify-write services.  See the Modify() function description.\r
\r
  @param Segment  The PCI bus segment which the specified functions will access.\r
\r
**/\r
GLOBAL_REMOVE_IF_UNREFERENCED\r
EFI_PEI_PCI_CFG2_PPI gPciCfg2Ppi = {\r
  PciCfg2Read,\r
  PciCfg2Write,\r
  PciCfg2Modify\r
};\r
\r
GLOBAL_REMOVE_IF_UNREFERENCED\r
EFI_PEI_PPI_DESCRIPTOR gPciCfg2PpiList = {\r
  (EFI_PEI_PPI_DESCRIPTOR_PPI | EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),\r
  &gEfiPciCfg2PpiGuid,\r
  &gPciCfg2Ppi\r
};\r
\r
\r
/**\r
   Convert EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS to PCI_LIB_ADDRESS.\r
\r
   @param Address   PCI address with\r
                    EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS format.\r
\r
   @return The PCI address with PCI_LIB_ADDRESS format.\r
\r
**/\r
UINTN\r
PciCfgAddressConvert (\r
  EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *Address\r
  )\r
{\r
  if (Address->ExtendedRegister == 0) {\r
    return PCI_LIB_ADDRESS (Address->Bus, Address->Device, Address->Function, Address->Register);\r
  }\r
\r
  return PCI_LIB_ADDRESS (Address->Bus, Address->Device, Address->Function, Address->ExtendedRegister);\r
}\r
\r
\r
/**\r
  Reads from a given location in the PCI configuration space.\r
\r
  @param  PeiServices     An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
\r
  @param  This            Pointer to local data for the interface.\r
\r
  @param  Width           The width of the access. Enumerated in bytes.\r
                          See EFI_PEI_PCI_CFG_PPI_WIDTH above.\r
\r
  @param  Address         The physical address of the access. The format of\r
                          the address is described by EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS.\r
\r
  @param  Buffer          A pointer to the buffer of data..\r
\r
\r
  @retval EFI_SUCCESS           The function completed successfully.\r
\r
  @retval EFI_DEVICE_ERROR      There was a problem with the transaction.\r
\r
  @retval EFI_DEVICE_NOT_READY  The device is not capable of supporting the operation at this\r
                                time.\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
PciCfg2Read (\r
  IN CONST  EFI_PEI_SERVICES          **PeiServices,\r
  IN CONST  EFI_PEI_PCI_CFG2_PPI      *This,\r
  IN        EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r
  IN        UINT64                    Address,\r
  IN OUT    VOID                      *Buffer\r
)\r
{\r
  UINTN  PciLibAddress;\r
\r
  PciLibAddress = PciCfgAddressConvert ((EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *) &Address);\r
\r
  if (Width == EfiPeiPciCfgWidthUint8) {\r
    *((UINT8 *) Buffer) = PciRead8 (PciLibAddress);\r
  } else if (Width == EfiPeiPciCfgWidthUint16) {\r
    *((UINT16 *) Buffer) = PciRead16 (PciLibAddress);\r
  } else if (Width == EfiPeiPciCfgWidthUint32) {\r
    *((UINT32 *) Buffer) = PciRead32 (PciLibAddress);\r
  } else {\r
    return EFI_INVALID_PARAMETER;\r
  }\r
\r
  return EFI_SUCCESS;\r
}\r
\r
/**\r
  Write to a given location in the PCI configuration space.\r
\r
  @param  PeiServices     An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
\r
  @param  This            Pointer to local data for the interface.\r
\r
  @param  Width           The width of the access. Enumerated in bytes.\r
                          See EFI_PEI_PCI_CFG_PPI_WIDTH above.\r
\r
  @param  Address         The physical address of the access. The format of\r
                          the address is described by EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS.\r
\r
  @param  Buffer          A pointer to the buffer of data..\r
\r
\r
  @retval EFI_SUCCESS           The function completed successfully.\r
\r
  @retval EFI_DEVICE_ERROR      There was a problem with the transaction.\r
\r
  @retval EFI_DEVICE_NOT_READY  The device is not capable of supporting the operation at this\r
                                time.\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
PciCfg2Write (\r
  IN CONST  EFI_PEI_SERVICES          **PeiServices,\r
  IN CONST  EFI_PEI_PCI_CFG2_PPI      *This,\r
  IN        EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r
  IN        UINT64                    Address,\r
  IN OUT    VOID                      *Buffer\r
)\r
{\r
  UINTN  PciLibAddress;\r
\r
  PciLibAddress = PciCfgAddressConvert ((EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *) &Address);\r
\r
  if (Width == EfiPeiPciCfgWidthUint8) {\r
    PciWrite8 (PciLibAddress, *((UINT8 *) Buffer));\r
  } else if (Width == EfiPeiPciCfgWidthUint16) {\r
    PciWrite16 (PciLibAddress, *((UINT16 *) Buffer));\r
  } else if (Width == EfiPeiPciCfgWidthUint32) {\r
    PciWrite32 (PciLibAddress, *((UINT32 *) Buffer));\r
  } else {\r
    return EFI_INVALID_PARAMETER;\r
  }\r
\r
  return EFI_SUCCESS;\r
}\r
\r
\r
/**\r
  PCI read-modify-write operation.\r
\r
  @param  PeiServices     An indirect pointer to the PEI Services Table\r
                          published by the PEI Foundation.\r
\r
  @param  This            Pointer to local data for the interface.\r
\r
  @param  Width           The width of the access. Enumerated in bytes. Type\r
                          EFI_PEI_PCI_CFG_PPI_WIDTH is defined in Read().\r
\r
  @param  Address         The physical address of the access.\r
\r
  @param  SetBits         Points to value to bitwise-OR with the read configuration value.\r
\r
                          The size of the value is determined by Width.\r
\r
  @param  ClearBits       Points to the value to negate and bitwise-AND with the read configuration value.\r
                          The size of the value is determined by Width.\r
\r
\r
  @retval EFI_SUCCESS           The function completed successfully.\r
\r
  @retval EFI_DEVICE_ERROR      There was a problem with the transaction.\r
\r
  @retval EFI_DEVICE_NOT_READY  The device is not capable of supporting\r
                                the operation at this time.\r
\r
**/\r
EFI_STATUS\r
EFIAPI\r
PciCfg2Modify (\r
  IN CONST  EFI_PEI_SERVICES          **PeiServices,\r
  IN CONST  EFI_PEI_PCI_CFG2_PPI      *This,\r
  IN        EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r
  IN        UINT64                    Address,\r
  IN        VOID                      *SetBits,\r
  IN        VOID                      *ClearBits\r
)\r
{\r
  UINTN   PciLibAddress;\r
  UINT16  ClearValue16;\r
  UINT16  SetValue16;\r
  UINT32  ClearValue32;\r
  UINT32  SetValue32;\r
\r
  PciLibAddress = PciCfgAddressConvert ((EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *) &Address);\r
\r
  if (Width == EfiPeiPciCfgWidthUint8) {\r
    PciAndThenOr8 (PciLibAddress, (UINT8) (~(*(UINT8 *) ClearBits)), *((UINT8 *) SetBits));\r
  } else if (Width == EfiPeiPciCfgWidthUint16) {\r
    ClearValue16  = (UINT16) (~ReadUnaligned16 ((UINT16 *) ClearBits));\r
    SetValue16    = ReadUnaligned16 ((UINT16 *) SetBits);\r
    PciAndThenOr16 (PciLibAddress, ClearValue16, SetValue16);\r
  } else if (Width == EfiPeiPciCfgWidthUint32) {\r
    ClearValue32  = (UINT32) (~ReadUnaligned32 ((UINT32 *) ClearBits));\r
    SetValue32    = ReadUnaligned32 ((UINT32 *) SetBits);\r
    PciAndThenOr32 (PciLibAddress, ClearValue32, SetValue32);\r
  } else {\r
    return EFI_INVALID_PARAMETER;\r
  }\r
  return EFI_SUCCESS;\r
}\r
\r
\r
EFI_STATUS\r
EFIAPI\r
PeimInitializePciCfg (\r
  IN       EFI_PEI_FILE_HANDLE  FileHandle,\r
  IN CONST EFI_PEI_SERVICES     **PeiServices\r
  )\r
{\r
  EFI_STATUS            Status;\r
\r
  ASSERT ((**PeiServices).Hdr.Revision >= PEI_SERVICES_REVISION);\r
\r
  (**(EFI_PEI_SERVICES **)PeiServices).PciCfg = &gPciCfg2Ppi;\r
  Status = (**PeiServices).InstallPpi ((CONST EFI_PEI_SERVICES **)PeiServices, &gPciCfg2PpiList);\r
\r
  return Status;\r
}\r
Commit	Line	Data
fb0b259e	1	/** @file\r
fb0b259e	2	Installs Single Segment Pci Configuration PPI.\r
12232778	3	\r
	4	Copyright (c) 2006 - 2007, Intel Corporation\r
	5	All rights reserved. This program and the accompanying materials\r
	6	are licensed and made available under the terms and conditions of the BSD License\r
	7	which accompanies this distribution. The full text of the license may be found at\r
	8	http://opensource.org/licenses/bsd-license.php\r
	9	\r
	10	THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,\r
	11	WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.\r
	12	\r
	13	**/\r
	14	\r
	15	#include <PiPei.h>\r
	16	\r
	17	#include <Ppi/PciCfg2.h>\r
	18	\r
	19	#include <Library/BaseLib.h>\r
	20	#include <Library/DebugLib.h>\r
	21	#include <Library/PciLib.h>\r
	22	#include <Library/PeimEntryPoint.h>\r
	23	\r
2d85ada2	24	#include <IndustryStandard/Pci.h>\r
12232778	25	\r
12232778	26	/**\r
	27	Reads from a given location in the PCI configuration space.\r
	28	\r
	29	@param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
	30	\r
	31	@param This Pointer to local data for the interface.\r
	32	\r
	33	@param Width The width of the access. Enumerated in bytes.\r
	34	See EFI_PEI_PCI_CFG_PPI_WIDTH above.\r
	35	\r
	36	@param Address The physical address of the access. The format of\r
	37	the address is described by EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS.\r
	38	\r
	39	@param Buffer A pointer to the buffer of data..\r
	40	\r
	41	\r
	42	@retval EFI_SUCCESS The function completed successfully.\r
	43	\r
	44	@retval EFI_DEVICE_ERROR There was a problem with the transaction.\r
	45	\r
	46	@retval EFI_DEVICE_NOT_READY The device is not capable of supporting the operation at this\r
	47	time.\r
	48	\r
	49	**/\r
	50	EFI_STATUS\r
fb0b259e	51	EFIAPI\r
12232778	52	PciCfg2Read (\r
	53	IN CONST EFI_PEI_SERVICES **PeiServices,\r
	54	IN CONST EFI_PEI_PCI_CFG2_PPI *This,\r
	55	IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r
	56	IN UINT64 Address,\r
	57	IN OUT VOID *Buffer\r
	58	);\r
	59	\r
	60	/**\r
	61	Write to a given location in the PCI configuration space.\r
	62	\r
	63	@param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
	64	\r
	65	@param This Pointer to local data for the interface.\r
	66	\r
	67	@param Width The width of the access. Enumerated in bytes.\r
	68	See EFI_PEI_PCI_CFG_PPI_WIDTH above.\r
	69	\r
	70	@param Address The physical address of the access. The format of\r
	71	the address is described by EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS.\r
	72	\r
	73	@param Buffer A pointer to the buffer of data..\r
	74	\r
	75	\r
	76	@retval EFI_SUCCESS The function completed successfully.\r
	77	\r
	78	@retval EFI_DEVICE_ERROR There was a problem with the transaction.\r
	79	\r
	80	@retval EFI_DEVICE_NOT_READY The device is not capable of supporting the operation at this\r
	81	time.\r
	82	\r
	83	**/\r
	84	EFI_STATUS\r
fb0b259e	85	EFIAPI\r
12232778	86	PciCfg2Write (\r
	87	IN CONST EFI_PEI_SERVICES **PeiServices,\r
	88	IN CONST EFI_PEI_PCI_CFG2_PPI *This,\r
	89	IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r
	90	IN UINT64 Address,\r
	91	IN OUT VOID *Buffer\r
	92	);\r
	93	\r
	94	\r
	95	/**\r
	96	PCI read-modify-write operation.\r
	97	\r
	98	@param PeiServices An indirect pointer to the PEI Services Table\r
	99	published by the PEI Foundation.\r
	100	\r
	101	@param This Pointer to local data for the interface.\r
	102	\r
	103	@param Width The width of the access. Enumerated in bytes. Type\r
	104	EFI_PEI_PCI_CFG_PPI_WIDTH is defined in Read().\r
	105	\r
	106	@param Address The physical address of the access.\r
	107	\r
	108	@param SetBits Points to value to bitwise-OR with the read configuration value.\r
	109	\r
	110	The size of the value is determined by Width.\r
	111	\r
	112	@param ClearBits Points to the value to negate and bitwise-AND with the read configuration value.\r
	113	The size of the value is determined by Width.\r
	114	\r
	115	\r
	116	@retval EFI_SUCCESS The function completed successfully.\r
	117	\r
	118	@retval EFI_DEVICE_ERROR There was a problem with the transaction.\r
	119	\r
	120	@retval EFI_DEVICE_NOT_READY The device is not capable of supporting\r
	121	the operation at this time.\r
	122	\r
	123	**/\r
	124	EFI_STATUS\r
fb0b259e	125	EFIAPI\r
12232778	126	PciCfg2Modify (\r
	127	IN CONST EFI_PEI_SERVICES **PeiServices,\r
	128	IN CONST EFI_PEI_PCI_CFG2_PPI *This,\r
	129	IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r
	130	IN UINT64 Address,\r
6fc2b00b	131	IN VOID *SetBits,\r
6fc2b00b	132	IN VOID *ClearBits\r
12232778	133	);\r
	134	\r
	135	\r
	136	\r
	137	/**\r
	138	@par Ppi Description:\r
	139	The EFI_PEI_PCI_CFG2_PPI interfaces are used to abstract\r
	140	accesses to PCI controllers behind a PCI root bridge\r
	141	controller.\r
	142	\r
	143	@param Read PCI read services. See the Read() function description.\r
	144	\r
	145	@param Write PCI write services. See the Write() function description.\r
	146	\r
	147	@param Modify PCI read-modify-write services. See the Modify() function description.\r
	148	\r
	149	@param Segment The PCI bus segment which the specified functions will access.\r
	150	\r
	151	**/\r
	152	GLOBAL_REMOVE_IF_UNREFERENCED\r
	153	EFI_PEI_PCI_CFG2_PPI gPciCfg2Ppi = {\r
	154	PciCfg2Read,\r
	155	PciCfg2Write,\r
	156	PciCfg2Modify\r
	157	};\r
	158	\r
	159	GLOBAL_REMOVE_IF_UNREFERENCED\r
	160	EFI_PEI_PPI_DESCRIPTOR gPciCfg2PpiList = {\r
	161	(EFI_PEI_PPI_DESCRIPTOR_PPI \| EFI_PEI_PPI_DESCRIPTOR_TERMINATE_LIST),\r
	162	&gEfiPciCfg2PpiGuid,\r
	163	&gPciCfg2Ppi\r
	164	};\r
	165	\r
aa79b0b3	166	\r
	167	/**\r
	168	Convert EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS to PCI_LIB_ADDRESS.\r
	169	\r
	170	@param Address PCI address with\r
	171	EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS format.\r
	172	\r
	173	@return The PCI address with PCI_LIB_ADDRESS format.\r
	174	\r
	175	**/\r
	176	UINTN\r
	177	PciCfgAddressConvert (\r
	178	EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *Address\r
	179	)\r
	180	{\r
	181	if (Address->ExtendedRegister == 0) {\r
	182	return PCI_LIB_ADDRESS (Address->Bus, Address->Device, Address->Function, Address->Register);\r
	183	}\r
	184	\r
	185	return PCI_LIB_ADDRESS (Address->Bus, Address->Device, Address->Function, Address->ExtendedRegister);\r
	186	}\r
	187	\r
	188	\r
12232778	189	/**\r
	190	Reads from a given location in the PCI configuration space.\r
	191	\r
	192	@param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
	193	\r
	194	@param This Pointer to local data for the interface.\r
	195	\r
	196	@param Width The width of the access. Enumerated in bytes.\r
	197	See EFI_PEI_PCI_CFG_PPI_WIDTH above.\r
	198	\r
	199	@param Address The physical address of the access. The format of\r
	200	the address is described by EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS.\r
	201	\r
	202	@param Buffer A pointer to the buffer of data..\r
	203	\r
	204	\r
	205	@retval EFI_SUCCESS The function completed successfully.\r
	206	\r
	207	@retval EFI_DEVICE_ERROR There was a problem with the transaction.\r
	208	\r
	209	@retval EFI_DEVICE_NOT_READY The device is not capable of supporting the operation at this\r
	210	time.\r
	211	\r
	212	**/\r
	213	EFI_STATUS\r
fb0b259e	214	EFIAPI\r
12232778	215	PciCfg2Read (\r
	216	IN CONST EFI_PEI_SERVICES **PeiServices,\r
	217	IN CONST EFI_PEI_PCI_CFG2_PPI *This,\r
	218	IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r
	219	IN UINT64 Address,\r
	220	IN OUT VOID *Buffer\r
	221	)\r
	222	{\r
	223	UINTN PciLibAddress;\r
	224	\r
d8b61daa	225	PciLibAddress = PciCfgAddressConvert ((EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *) &Address);\r
12232778	226	\r
	227	if (Width == EfiPeiPciCfgWidthUint8) {\r
	228	((UINT8 ) Buffer) = PciRead8 (PciLibAddress);\r
	229	} else if (Width == EfiPeiPciCfgWidthUint16) {\r
	230	((UINT16 ) Buffer) = PciRead16 (PciLibAddress);\r
	231	} else if (Width == EfiPeiPciCfgWidthUint32) {\r
	232	((UINT32 ) Buffer) = PciRead32 (PciLibAddress);\r
	233	} else {\r
	234	return EFI_INVALID_PARAMETER;\r
	235	}\r
	236	\r
	237	return EFI_SUCCESS;\r
	238	}\r
	239	\r
	240	/**\r
	241	Write to a given location in the PCI configuration space.\r
	242	\r
	243	@param PeiServices An indirect pointer to the PEI Services Table published by the PEI Foundation.\r
	244	\r
	245	@param This Pointer to local data for the interface.\r
	246	\r
	247	@param Width The width of the access. Enumerated in bytes.\r
	248	See EFI_PEI_PCI_CFG_PPI_WIDTH above.\r
	249	\r
	250	@param Address The physical address of the access. The format of\r
	251	the address is described by EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS.\r
	252	\r
	253	@param Buffer A pointer to the buffer of data..\r
	254	\r
	255	\r
	256	@retval EFI_SUCCESS The function completed successfully.\r
	257	\r
	258	@retval EFI_DEVICE_ERROR There was a problem with the transaction.\r
	259	\r
	260	@retval EFI_DEVICE_NOT_READY The device is not capable of supporting the operation at this\r
	261	time.\r
	262	\r
	263	**/\r
	264	EFI_STATUS\r
fb0b259e	265	EFIAPI\r
12232778	266	PciCfg2Write (\r
	267	IN CONST EFI_PEI_SERVICES **PeiServices,\r
	268	IN CONST EFI_PEI_PCI_CFG2_PPI *This,\r
	269	IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r
	270	IN UINT64 Address,\r
	271	IN OUT VOID *Buffer\r
	272	)\r
	273	{\r
	274	UINTN PciLibAddress;\r
	275	\r
d8b61daa	276	PciLibAddress = PciCfgAddressConvert ((EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *) &Address);\r
12232778	277	\r
	278	if (Width == EfiPeiPciCfgWidthUint8) {\r
	279	PciWrite8 (PciLibAddress, ((UINT8 ) Buffer));\r
	280	} else if (Width == EfiPeiPciCfgWidthUint16) {\r
	281	PciWrite16 (PciLibAddress, ((UINT16 ) Buffer));\r
	282	} else if (Width == EfiPeiPciCfgWidthUint32) {\r
	283	PciWrite32 (PciLibAddress, ((UINT32 ) Buffer));\r
	284	} else {\r
	285	return EFI_INVALID_PARAMETER;\r
	286	}\r
	287	\r
	288	return EFI_SUCCESS;\r
	289	}\r
	290	\r
	291	\r
	292	/**\r
	293	PCI read-modify-write operation.\r
	294	\r
	295	@param PeiServices An indirect pointer to the PEI Services Table\r
	296	published by the PEI Foundation.\r
	297	\r
	298	@param This Pointer to local data for the interface.\r
	299	\r
	300	@param Width The width of the access. Enumerated in bytes. Type\r
	301	EFI_PEI_PCI_CFG_PPI_WIDTH is defined in Read().\r
	302	\r
	303	@param Address The physical address of the access.\r
	304	\r
	305	@param SetBits Points to value to bitwise-OR with the read configuration value.\r
	306	\r
	307	The size of the value is determined by Width.\r
	308	\r
	309	@param ClearBits Points to the value to negate and bitwise-AND with the read configuration value.\r
	310	The size of the value is determined by Width.\r
	311	\r
	312	\r
	313	@retval EFI_SUCCESS The function completed successfully.\r
	314	\r
	315	@retval EFI_DEVICE_ERROR There was a problem with the transaction.\r
	316	\r
	317	@retval EFI_DEVICE_NOT_READY The device is not capable of supporting\r
	318	the operation at this time.\r
	319	\r
	320	**/\r
	321	EFI_STATUS\r
fb0b259e	322	EFIAPI\r
12232778	323	PciCfg2Modify (\r
	324	IN CONST EFI_PEI_SERVICES **PeiServices,\r
	325	IN CONST EFI_PEI_PCI_CFG2_PPI *This,\r
	326	IN EFI_PEI_PCI_CFG_PPI_WIDTH Width,\r
	327	IN UINT64 Address,\r
01edaf2a	328	IN VOID *SetBits,\r
01edaf2a	329	IN VOID *ClearBits\r
12232778	330	)\r
12232778	331	{\r
702887db	332	UINTN PciLibAddress;\r
	333	UINT16 ClearValue16;\r
	334	UINT16 SetValue16;\r
	335	UINT32 ClearValue32;\r
	336	UINT32 SetValue32;\r
12232778	337	\r
d8b61daa	338	PciLibAddress = PciCfgAddressConvert ((EFI_PEI_PCI_CFG_PPI_PCI_ADDRESS *) &Address);\r
12232778	339	\r
12232778	340	if (Width == EfiPeiPciCfgWidthUint8) {\r
702887db	341	PciAndThenOr8 (PciLibAddress, (UINT8) (~((UINT8 ) ClearBits)), ((UINT8 ) SetBits));\r
12232778	342	} else if (Width == EfiPeiPciCfgWidthUint16) {\r
702887db	343	ClearValue16 = (UINT16) (~ReadUnaligned16 ((UINT16 *) ClearBits));\r
	344	SetValue16 = ReadUnaligned16 ((UINT16 *) SetBits);\r
	345	PciAndThenOr16 (PciLibAddress, ClearValue16, SetValue16);\r
12232778	346	} else if (Width == EfiPeiPciCfgWidthUint32) {\r
702887db	347	ClearValue32 = (UINT32) (~ReadUnaligned32 ((UINT32 *) ClearBits));\r
	348	SetValue32 = ReadUnaligned32 ((UINT32 *) SetBits);\r
	349	PciAndThenOr32 (PciLibAddress, ClearValue32, SetValue32);\r
12232778	350	} else {\r
	351	return EFI_INVALID_PARAMETER;\r
	352	}\r
	353	return EFI_SUCCESS;\r
	354	}\r
	355	\r
	356	\r
	357	EFI_STATUS\r
	358	EFIAPI\r
	359	PeimInitializePciCfg (\r
8bd22b8a LG	360	IN EFI_PEI_FILE_HANDLE FileHandle,\r
8bd22b8a LG	361	IN CONST EFI_PEI_SERVICES **PeiServices\r
12232778	362	)\r
	363	{\r
	364	EFI_STATUS Status;\r
	365	\r
	366	ASSERT ((**PeiServices).Hdr.Revision >= PEI_SERVICES_REVISION);\r
	367	\r
8bd22b8a	368	((EFI_PEI_SERVICES )PeiServices).PciCfg = &gPciCfg2Ppi;\r
0c2b5da8	369	Status = (PeiServices).InstallPpi ((CONST EFI_PEI_SERVICES )PeiServices, &gPciCfg2PpiList);\r
12232778	370	\r
	371	return Status;\r
	372	}\r