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878ddf1f | 1 | /** @file\r |
2 | This file declares the related BootScript definitions and some SMBus definitions.\r | |
3 | \r | |
4 | Copyright (c) 2006, Intel Corporation \r | |
5 | All rights reserved. This program and the accompanying materials \r | |
6 | are licensed and made available under the terms and conditions of the BSD License \r | |
7 | which accompanies this distribution. The full text of the license may be found at \r | |
8 | http://opensource.org/licenses/bsd-license.php \r | |
9 | \r | |
10 | THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r | |
11 | WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r | |
12 | \r | |
13 | Module Name: BootScript.h\r | |
14 | \r | |
15 | @par Revision Reference:\r | |
16 | These definitions are defined in BootScript Spec 0.91 and SmBus PPI spec 0.9.\r | |
17 | \r | |
18 | **/\r | |
19 | \r | |
20 | #ifndef _EFI_SCRIPT_H_\r | |
21 | #define _EFI_SCRIPT_H_\r | |
22 | \r | |
23 | #define EFI_ACPI_S3_RESUME_SCRIPT_TABLE 0x00\r | |
24 | \r | |
25 | //\r | |
26 | // Boot Script Opcode Definitions\r | |
27 | //\r | |
28 | \r | |
29 | #define EFI_BOOT_SCRIPT_IO_WRITE_OPCODE 0x00\r | |
30 | #define EFI_BOOT_SCRIPT_IO_READ_WRITE_OPCODE 0x01\r | |
31 | #define EFI_BOOT_SCRIPT_MEM_WRITE_OPCODE 0x02\r | |
32 | #define EFI_BOOT_SCRIPT_MEM_READ_WRITE_OPCODE 0x03\r | |
33 | #define EFI_BOOT_SCRIPT_PCI_CONFIG_WRITE_OPCODE 0x04\r | |
34 | #define EFI_BOOT_SCRIPT_PCI_CONFIG_READ_WRITE_OPCODE 0x05\r | |
35 | #define EFI_BOOT_SCRIPT_SMBUS_EXECUTE_OPCODE 0x06\r | |
36 | #define EFI_BOOT_SCRIPT_STALL_OPCODE 0x07\r | |
37 | #define EFI_BOOT_SCRIPT_DISPATCH_OPCODE 0x08\r | |
64ec22c0 | 38 | #define EFI_BOOT_SCRIPT_DISPATCH_2_OPCODE 0x09\r |
1ee7ae6e | 39 | #define EFI_BOOT_SCRIPT_INFORMATION_OPCODE 0x0A\r |
878ddf1f | 40 | \r |
41 | #define EFI_BOOT_SCRIPT_TABLE_OPCODE 0xAA\r | |
42 | #define EFI_BOOT_SCRIPT_TERMINATE_OPCODE 0xFF\r | |
43 | \r | |
b026832e | 44 | #ifndef __GNUC__\r |
4a0b6afe | 45 | #pragma pack(1)\r |
b026832e | 46 | #endif\r |
4a0b6afe | 47 | \r |
878ddf1f | 48 | //\r |
49 | // EFI Boot Script Width\r | |
50 | //\r | |
51 | typedef enum {\r | |
52 | EfiBootScriptWidthUint8,\r | |
53 | EfiBootScriptWidthUint16,\r | |
54 | EfiBootScriptWidthUint32,\r | |
55 | EfiBootScriptWidthUint64,\r | |
56 | EfiBootScriptWidthFifoUint8,\r | |
57 | EfiBootScriptWidthFifoUint16,\r | |
58 | EfiBootScriptWidthFifoUint32,\r | |
59 | EfiBootScriptWidthFifoUint64,\r | |
60 | EfiBootScriptWidthFillUint8,\r | |
61 | EfiBootScriptWidthFillUint16,\r | |
62 | EfiBootScriptWidthFillUint32,\r | |
63 | EfiBootScriptWidthFillUint64,\r | |
64 | EfiBootScriptWidthMaximum\r | |
65 | } EFI_BOOT_SCRIPT_WIDTH;\r | |
66 | \r | |
67 | //\r | |
68 | // EFI Smbus Device Address, Smbus Device Command, Smbus Operation\r | |
69 | //\r | |
70 | typedef struct {\r | |
71 | UINTN SmbusDeviceAddress : 7;\r | |
72 | } EFI_SMBUS_DEVICE_ADDRESS;\r | |
73 | \r | |
74 | typedef UINTN EFI_SMBUS_DEVICE_COMMAND;\r | |
75 | \r | |
76 | typedef enum _EFI_SMBUS_OPERATION\r | |
77 | {\r | |
78 | EfiSmbusQuickRead,\r | |
79 | EfiSmbusQuickWrite,\r | |
80 | EfiSmbusReceiveByte,\r | |
81 | EfiSmbusSendByte,\r | |
82 | EfiSmbusReadByte,\r | |
83 | EfiSmbusWriteByte,\r | |
84 | EfiSmbusReadWord,\r | |
85 | EfiSmbusWriteWord,\r | |
86 | EfiSmbusReadBlock,\r | |
87 | EfiSmbusWriteBlock,\r | |
88 | EfiSmbusProcessCall,\r | |
89 | EfiSmbusBWBRProcessCall\r | |
90 | } EFI_SMBUS_OPERATION;\r | |
91 | \r | |
92 | //\r | |
93 | // Boot Script Opcode Header Structure Definitions\r | |
94 | //\r | |
95 | \r | |
96 | typedef struct {\r | |
97 | UINT16 OpCode;\r | |
98 | UINT8 Length;\r | |
99 | } EFI_BOOT_SCRIPT_GENERIC_HEADER;\r | |
100 | \r | |
101 | typedef struct {\r | |
102 | UINT16 OpCode;\r | |
103 | UINT8 Length;\r | |
104 | UINT16 Version;\r | |
105 | UINT32 TableLength;\r | |
106 | UINT16 Reserved[2];\r | |
107 | } EFI_BOOT_SCRIPT_TABLE_HEADER;\r | |
108 | \r | |
109 | typedef struct {\r | |
110 | UINT16 OpCode;\r | |
111 | UINT8 Length;\r | |
ada5e827 | 112 | UINT32 Width;\r |
878ddf1f | 113 | } EFI_BOOT_SCRIPT_COMMON_HEADER;\r |
114 | \r | |
115 | typedef struct {\r | |
116 | UINT16 OpCode;\r | |
117 | UINT8 Length;\r | |
ada5e827 | 118 | UINT32 Width;\r |
119 | UINT32 Count;\r | |
878ddf1f | 120 | UINT64 Address;\r |
121 | } EFI_BOOT_SCRIPT_IO_WRITE;\r | |
122 | \r | |
123 | typedef struct {\r | |
124 | UINT16 OpCode;\r | |
125 | UINT8 Length;\r | |
ada5e827 | 126 | UINT32 Width;\r |
878ddf1f | 127 | UINT64 Address;\r |
128 | } EFI_BOOT_SCRIPT_IO_READ_WRITE;\r | |
129 | \r | |
130 | typedef struct {\r | |
131 | UINT16 OpCode;\r | |
132 | UINT8 Length;\r | |
ada5e827 | 133 | UINT32 Width;\r |
134 | UINT32 Count;\r | |
878ddf1f | 135 | UINT64 Address;\r |
136 | } EFI_BOOT_SCRIPT_MEM_WRITE;\r | |
137 | \r | |
138 | typedef struct {\r | |
139 | UINT16 OpCode;\r | |
140 | UINT8 Length;\r | |
ada5e827 | 141 | UINT32 Width;\r |
878ddf1f | 142 | UINT64 Address;\r |
143 | } EFI_BOOT_SCRIPT_MEM_READ_WRITE;\r | |
144 | \r | |
145 | typedef struct {\r | |
146 | UINT16 OpCode;\r | |
147 | UINT8 Length;\r | |
ada5e827 | 148 | UINT32 Width;\r |
149 | UINT32 Count;\r | |
878ddf1f | 150 | UINT64 Address;\r |
151 | } EFI_BOOT_SCRIPT_PCI_CONFIG_WRITE;\r | |
152 | \r | |
153 | typedef struct {\r | |
154 | UINT16 OpCode;\r | |
155 | UINT8 Length;\r | |
ada5e827 | 156 | UINT32 Width;\r |
878ddf1f | 157 | UINT64 Address;\r |
158 | } EFI_BOOT_SCRIPT_PCI_CONFIG_READ_WRITE;\r | |
159 | \r | |
160 | typedef struct {\r | |
161 | UINT16 OpCode;\r | |
162 | UINT8 Length;\r | |
ada5e827 | 163 | UINT64 SlaveAddress;\r |
164 | UINT64 Command;\r | |
165 | UINT32 Operation;\r | |
878ddf1f | 166 | BOOLEAN PecCheck;\r |
ada5e827 | 167 | UINT32 DataSize;\r |
878ddf1f | 168 | } EFI_BOOT_SCRIPT_SMBUS_EXECUTE;\r |
169 | \r | |
170 | typedef struct {\r | |
171 | UINT16 OpCode;\r | |
172 | UINT8 Length;\r | |
ada5e827 | 173 | UINT64 Duration;\r |
878ddf1f | 174 | } EFI_BOOT_SCRIPT_STALL;\r |
175 | \r | |
176 | typedef struct {\r | |
177 | UINT16 OpCode;\r | |
178 | UINT8 Length;\r | |
179 | EFI_PHYSICAL_ADDRESS EntryPoint;\r | |
180 | } EFI_BOOT_SCRIPT_DISPATCH;\r | |
181 | \r | |
64ec22c0 | 182 | typedef struct {\r |
183 | UINT16 OpCode;\r | |
184 | UINT8 Length;\r | |
185 | EFI_PHYSICAL_ADDRESS EntryPoint;\r | |
186 | EFI_PHYSICAL_ADDRESS Context;\r | |
187 | } EFI_BOOT_SCRIPT_DISPATCH_2;\r | |
188 | \r | |
1ee7ae6e | 189 | typedef struct {\r |
190 | UINT16 OpCode;\r | |
191 | UINT8 Length;\r | |
192 | UINT32 InformationLength; \r | |
193 | EFI_PHYSICAL_ADDRESS Information;\r | |
194 | } EFI_BOOT_SCRIPT_INFORMATION;\r | |
195 | \r | |
878ddf1f | 196 | typedef struct {\r |
197 | UINT16 OpCode;\r | |
198 | UINT8 Length;\r | |
199 | } EFI_BOOT_SCRIPT_TERMINATE;\r | |
200 | \r | |
201 | typedef union {\r | |
202 | EFI_BOOT_SCRIPT_GENERIC_HEADER *Header;\r | |
203 | EFI_BOOT_SCRIPT_TABLE_HEADER *TableInfo;\r | |
204 | EFI_BOOT_SCRIPT_IO_WRITE *IoWrite;\r | |
205 | EFI_BOOT_SCRIPT_IO_READ_WRITE *IoReadWrite;\r | |
206 | EFI_BOOT_SCRIPT_MEM_WRITE *MemWrite;\r | |
207 | EFI_BOOT_SCRIPT_MEM_READ_WRITE *MemReadWrite;\r | |
208 | EFI_BOOT_SCRIPT_PCI_CONFIG_WRITE *PciWrite;\r | |
209 | EFI_BOOT_SCRIPT_PCI_CONFIG_READ_WRITE *PciReadWrite;\r | |
210 | EFI_BOOT_SCRIPT_SMBUS_EXECUTE *SmbusExecute;\r | |
211 | EFI_BOOT_SCRIPT_STALL *Stall;\r | |
212 | EFI_BOOT_SCRIPT_DISPATCH *Dispatch;\r | |
64ec22c0 | 213 | EFI_BOOT_SCRIPT_DISPATCH_2 *Dispatch2; \r |
1ee7ae6e | 214 | EFI_BOOT_SCRIPT_INFORMATION *Information;\r |
878ddf1f | 215 | EFI_BOOT_SCRIPT_TERMINATE *Terminate;\r |
216 | EFI_BOOT_SCRIPT_COMMON_HEADER *CommonHeader;\r | |
217 | UINT8 *Raw;\r | |
218 | } BOOT_SCRIPT_POINTERS;\r | |
219 | \r | |
b026832e | 220 | #ifndef __GNUC__\r |
4a0b6afe | 221 | #pragma pack()\r |
b026832e | 222 | #endif\r |
4a0b6afe | 223 | \r |
878ddf1f | 224 | #endif\r |