[mirror_edk2.git] / MdePkg / Include / IndustryStandard / Acpi2_0.h

/** @file   \r
	ACPI 2.0 definitions from the ACPI Specification, revision 2.0\r
\r
  Copyright (c) 2006 - 2007, Intel Corporation\r
  All rights reserved. This program and the accompanying materials                          \r
  are licensed and made available under the terms and conditions of the BSD License         \r
  which accompanies this distribution.  The full text of the license may be found at        \r
  http://opensource.org/licenses/bsd-license.php                                            \r
\r
  THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS,                     \r
  WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED.             \r
**/\r
\r
#ifndef _ACPI_2_0_H_\r
#define _ACPI_2_0_H_\r
\r
#include <IndustryStandard/Acpi1_0.h>\r
\r
//\r
// Ensure proper structure formats\r
//\r
#pragma pack(1)\r
//\r
// ACPI Specification Revision\r
//\r
#define EFI_ACPI_2_0_REVISION 0x02\r
\r
///\r
/// ACPI 2.0 Generic Address Space definition\r
///\r
typedef struct {\r
  UINT8   AddressSpaceId;\r
  UINT8   RegisterBitWidth;\r
  UINT8   RegisterBitOffset;\r
  UINT8   Reserved;\r
  UINT64  Address;\r
} EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE;\r
\r
//\r
// Generic Address Space Address IDs\r
//\r
#define EFI_ACPI_2_0_SYSTEM_MEMORY              0\r
#define EFI_ACPI_2_0_SYSTEM_IO                  1\r
#define EFI_ACPI_2_0_PCI_CONFIGURATION_SPACE    2\r
#define EFI_ACPI_2_0_EMBEDDED_CONTROLLER        3\r
#define EFI_ACPI_2_0_SMBUS                      4\r
#define EFI_ACPI_2_0_FUNCTIONAL_FIXED_HARDWARE  0x7F\r
\r
//\r
// ACPI 2.0 table structures\r
//\r
\r
///\r
/// Root System Description Pointer Structure\r
///\r
typedef struct {\r
  UINT64  Signature;\r
  UINT8   Checksum;\r
  UINT8   OemId[6];\r
  UINT8   Revision;\r
  UINT32  RsdtAddress;\r
  UINT32  Length;\r
  UINT64  XsdtAddress;\r
  UINT8   ExtendedChecksum;\r
  UINT8   Reserved[3];\r
} EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER;\r
\r
///\r
/// RSD_PTR Revision (as defined in ACPI 2.0 spec.)\r
///\r
#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02\r
\r
///\r
/// Common table header, this prefaces all ACPI tables, including FACS, but\r
/// excluding the RSD PTR structure\r
///\r
typedef struct {\r
  UINT32  Signature;\r
  UINT32  Length;\r
} EFI_ACPI_2_0_COMMON_HEADER;\r
\r
//\r
// Root System Description Table\r
// No definition needed as it is a common description table header followed by a\r
// variable number of UINT32 table pointers.\r
//\r
\r
///\r
/// RSDT Revision (as defined in ACPI 2.0 spec.)\r
///\r
#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
\r
//\r
// Extended System Description Table\r
// No definition needed as it is a common description table header followed by a\r
// variable number of UINT64 table pointers.\r
//\r
\r
///\r
/// XSDT Revision (as defined in ACPI 2.0 spec.)\r
///\r
#define EFI_ACPI_2_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
\r
///\r
/// Fixed ACPI Description Table Structure (FADT)\r
///\r
typedef struct {\r
  EFI_ACPI_DESCRIPTION_HEADER             Header;\r
  UINT32                                  FirmwareCtrl;\r
  UINT32                                  Dsdt;\r
  UINT8                                   Reserved0;\r
  UINT8                                   PreferredPmProfile;\r
  UINT16                                  SciInt;\r
  UINT32                                  SmiCmd;\r
  UINT8                                   AcpiEnable;\r
  UINT8                                   AcpiDisable;\r
  UINT8                                   S4BiosReq;\r
  UINT8                                   PstateCnt;\r
  UINT32                                  Pm1aEvtBlk;\r
  UINT32                                  Pm1bEvtBlk;\r
  UINT32                                  Pm1aCntBlk;\r
  UINT32                                  Pm1bCntBlk;\r
  UINT32                                  Pm2CntBlk;\r
  UINT32                                  PmTmrBlk;\r
  UINT32                                  Gpe0Blk;\r
  UINT32                                  Gpe1Blk;\r
  UINT8                                   Pm1EvtLen;\r
  UINT8                                   Pm1CntLen;\r
  UINT8                                   Pm2CntLen;\r
  UINT8                                   PmTmrLen;\r
  UINT8                                   Gpe0BlkLen;\r
  UINT8                                   Gpe1BlkLen;\r
  UINT8                                   Gpe1Base;\r
  UINT8                                   CstCnt;\r
  UINT16                                  PLvl2Lat;\r
  UINT16                                  PLvl3Lat;\r
  UINT16                                  FlushSize;\r
  UINT16                                  FlushStride;\r
  UINT8                                   DutyOffset;\r
  UINT8                                   DutyWidth;\r
  UINT8                                   DayAlrm;\r
  UINT8                                   MonAlrm;\r
  UINT8                                   Century;\r
  UINT16                                  IaPcBootArch;\r
  UINT8                                   Reserved1;\r
  UINT32                                  Flags;\r
  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  ResetReg;\r
  UINT8                                   ResetValue;\r
  UINT8                                   Reserved2[3];\r
  UINT64                                  XFirmwareCtrl;\r
  UINT64                                  XDsdt;\r
  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XPm1aEvtBlk;\r
  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XPm1bEvtBlk;\r
  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XPm1aCntBlk;\r
  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XPm1bCntBlk;\r
  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XPm2CntBlk;\r
  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XPmTmrBlk;\r
  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XGpe0Blk;\r
  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  XGpe1Blk;\r
} EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE;\r
\r
///\r
/// FADT Version (as defined in ACPI 2.0 spec.)\r
///\r
#define EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION  0x03\r
\r
///\r
/// Fixed ACPI Description Table Boot Architecture Flags\r
/// All other bits are reserved and must be set to 0.\r
///\r
#define EFI_ACPI_2_0_LEGACY_DEVICES (1 << 0)\r
#define EFI_ACPI_2_0_8042           (1 << 1)\r
\r
//\r
// Fixed ACPI Description Table Fixed Feature Flags\r
// All other bits are reserved and must be set to 0.\r
//\r
#define EFI_ACPI_2_0_WBINVD         (1 << 0)\r
#define EFI_ACPI_2_0_WBINVD_FLUSH   (1 << 1)\r
#define EFI_ACPI_2_0_PROC_C1        (1 << 2)\r
#define EFI_ACPI_2_0_P_LVL2_UP      (1 << 3)\r
#define EFI_ACPI_2_0_PWR_BUTTON     (1 << 4)\r
#define EFI_ACPI_2_0_SLP_BUTTON     (1 << 5)\r
#define EFI_ACPI_2_0_FIX_RTC        (1 << 6)\r
#define EFI_ACPI_2_0_RTC_S4         (1 << 7)\r
#define EFI_ACPI_2_0_TMR_VAL_EXT    (1 << 8)\r
#define EFI_ACPI_2_0_DCK_CAP        (1 << 9)\r
#define EFI_ACPI_2_0_RESET_REG_SUP  (1 << 10)\r
#define EFI_ACPI_2_0_SEALED_CASE    (1 << 11)\r
#define EFI_ACPI_2_0_HEADLESS       (1 << 12)\r
#define EFI_ACPI_2_0_CPU_SW_SLP     (1 << 13)\r
\r
///\r
/// Firmware ACPI Control Structure\r
///\r
typedef struct {\r
  UINT32  Signature;\r
  UINT32  Length;\r
  UINT32  HardwareSignature;\r
  UINT32  FirmwareWakingVector;\r
  UINT32  GlobalLock;\r
  UINT32  Flags;\r
  UINT64  XFirmwareWakingVector;\r
  UINT8   Version;\r
  UINT8   Reserved[31];\r
} EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE;\r
\r
///\r
/// FACS Version (as defined in ACPI 2.0 spec.)\r
///\r
#define EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION  0x01\r
\r
///\r
/// Firmware Control Structure Feature Flags\r
/// All other bits are reserved and must be set to 0.\r
///\r
#define EFI_ACPI_2_0_S4BIOS_F (1 << 0)\r
\r
///\r
/// Multiple APIC Description Table header definition.  The rest of the table\r
/// must be defined in a platform specific manner.\r
///\r
typedef struct {\r
  EFI_ACPI_DESCRIPTION_HEADER Header;\r
  UINT32                      LocalApicAddress;\r
  UINT32                      Flags;\r
} EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;\r
\r
///\r
/// MADT Revision (as defined in ACPI 2.0 spec.)\r
///\r
#define EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x01\r
\r
///\r
/// Multiple APIC Flags\r
/// All other bits are reserved and must be set to 0.\r
///\r
#define EFI_ACPI_2_0_PCAT_COMPAT  (1 << 0)\r
\r
//\r
// Multiple APIC Description Table APIC structure types\r
// All other values between 0x09 an 0xFF are reserved and\r
// will be ignored by OSPM.\r
//\r
#define EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC           0x00\r
#define EFI_ACPI_2_0_IO_APIC                        0x01\r
#define EFI_ACPI_2_0_INTERRUPT_SOURCE_OVERRIDE      0x02\r
#define EFI_ACPI_2_0_NON_MASKABLE_INTERRUPT_SOURCE  0x03\r
#define EFI_ACPI_2_0_LOCAL_APIC_NMI                 0x04\r
#define EFI_ACPI_2_0_LOCAL_APIC_ADDRESS_OVERRIDE    0x05\r
#define EFI_ACPI_2_0_IO_SAPIC                       0x06\r
#define EFI_ACPI_2_0_PROCESSOR_LOCAL_SAPIC          0x07\r
#define EFI_ACPI_2_0_PLATFORM_INTERRUPT_SOURCES     0x08\r
\r
//\r
// APIC Structure Definitions\r
//\r
\r
///\r
/// Processor Local APIC Structure Definition\r
///\r
typedef struct {\r
  UINT8   Type;\r
  UINT8   Length;\r
  UINT8   AcpiProcessorId;\r
  UINT8   ApicId;\r
  UINT32  Flags;\r
} EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC_STRUCTURE;\r
\r
///\r
/// Local APIC Flags.  All other bits are reserved and must be 0.\r
///\r
#define EFI_ACPI_2_0_LOCAL_APIC_ENABLED (1 << 0)\r
\r
///\r
/// IO APIC Structure\r
///\r
typedef struct {\r
  UINT8   Type;\r
  UINT8   Length;\r
  UINT8   IoApicId;\r
  UINT8   Reserved;\r
  UINT32  IoApicAddress;\r
  UINT32  GlobalSystemInterruptBase;\r
} EFI_ACPI_2_0_IO_APIC_STRUCTURE;\r
\r
///\r
/// Interrupt Source Override Structure\r
///\r
typedef struct {\r
  UINT8   Type;\r
  UINT8   Length;\r
  UINT8   Bus;\r
  UINT8   Source;\r
  UINT32  GlobalSystemInterrupt;\r
  UINT16  Flags;\r
} EFI_ACPI_2_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;\r
\r
///\r
/// Non-Maskable Interrupt Source Structure\r
///\r
typedef struct {\r
  UINT8   Type;\r
  UINT8   Length;\r
  UINT16  Flags;\r
  UINT32  GlobalSystemInterrupt;\r
} EFI_ACPI_2_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;\r
\r
///\r
/// Local APIC NMI Structure\r
///\r
typedef struct {\r
  UINT8   Type;\r
  UINT8   Length;\r
  UINT8   AcpiProcessorId;\r
  UINT16  Flags;\r
  UINT8   LocalApicLint;\r
} EFI_ACPI_2_0_LOCAL_APIC_NMI_STRUCTURE;\r
\r
///\r
/// Local APIC Address Override Structure\r
///\r
typedef struct {\r
  UINT8   Type;\r
  UINT8   Length;\r
  UINT16  Reserved;\r
  UINT64  LocalApicAddress;\r
} EFI_ACPI_2_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;\r
\r
///\r
/// IO SAPIC Structure\r
///\r
typedef struct {\r
  UINT8   Type;\r
  UINT8   Length;\r
  UINT8   IoApicId;\r
  UINT8   Reserved;\r
  UINT32  GlobalSystemInterruptBase;\r
  UINT64  IoSapicAddress;\r
} EFI_ACPI_2_0_IO_SAPIC_STRUCTURE;\r
\r
///\r
/// Local SAPIC Structure\r
///\r
typedef struct {\r
  UINT8   Type;\r
  UINT8   Length;\r
  UINT8   AcpiProcessorId;\r
  UINT8   LocalSapicId;\r
  UINT8   LocalSapicEid;\r
  UINT8   Reserved[3];\r
  UINT32  Flags;\r
} EFI_ACPI_2_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE;\r
\r
///\r
/// Platform Interrupt Sources Structure\r
///\r
typedef struct {\r
  UINT8   Type;\r
  UINT8   Length;\r
  UINT16  Flags;\r
  UINT8   InterruptType;\r
  UINT8   ProcessorId;\r
  UINT8   ProcessorEid;\r
  UINT8   IoSapicVector;\r
  UINT32  GlobalSystemInterrupt;\r
  UINT32  Reserved;\r
} EFI_ACPI_2_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;\r
\r
///\r
/// Smart Battery Description Table (SBST)\r
///\r
typedef struct {\r
  EFI_ACPI_DESCRIPTION_HEADER Header;\r
  UINT32                      WarningEnergyLevel;\r
  UINT32                      LowEnergyLevel;\r
  UINT32                      CriticalEnergyLevel;\r
} EFI_ACPI_2_0_SMART_BATTERY_DESCRIPTION_TABLE;\r
\r
///\r
/// SBST Version (as defined in ACPI 2.0 spec.)\r
///\r
#define EFI_ACPI_2_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01\r
\r
///\r
/// Embedded Controller Boot Resources Table (ECDT)\r
/// The table is followed by a null terminated ASCII string that contains\r
/// a fully qualified reference to the name space object.\r
///\r
typedef struct {\r
  EFI_ACPI_DESCRIPTION_HEADER             Header;\r
  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  EcControl;\r
  EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE  EcData;\r
  UINT32                                  Uid;\r
  UINT8                                   GpeBit;\r
} EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;\r
\r
///\r
/// ECDT Version (as defined in ACPI 2.0 spec.)\r
///\r
#define EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION  0x01\r
\r
//\r
// Known table signatures\r
//\r
\r
///\r
/// "RSD PTR " Root System Description Pointer\r
///\r
#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE  0x2052545020445352\r
\r
///\r
/// "SPIC" Multiple SAPIC Description Table\r
///\r
/// BUGBUG: Don't know where this came from except SR870BN4 uses it.\r
/// #define EFI_ACPI_2_0_MULTIPLE_SAPIC_DESCRIPTION_TABLE_SIGNATURE 0x43495053\r
///\r
#define EFI_ACPI_2_0_MULTIPLE_SAPIC_DESCRIPTION_TABLE_SIGNATURE 0x43495041\r
\r
///\r
/// "BOOT" MS Simple Boot Spec\r
///\r
#define EFI_ACPI_2_0_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE 0x544F4F42\r
\r
///\r
/// "DBGP" MS Bebug Port Spec\r
///\r
#define EFI_ACPI_2_0_DEBUG_PORT_TABLE_SIGNATURE 0x50474244\r
\r
///\r
/// "DSDT" Differentiated System Description Table\r
///\r
#define EFI_ACPI_2_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  0x54445344\r
\r
///\r
/// "ECDT" Embedded Controller Boot Resources Table\r
///\r
#define EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE 0x54444345\r
\r
///\r
/// "ETDT" Event Timer Description Table\r
///\r
#define EFI_ACPI_2_0_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE  0x54445445\r
\r
///\r
/// "FACS" Firmware ACPI Control Structure\r
///\r
#define EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE  0x53434146\r
\r
///\r
/// "FACP" Fixed ACPI Description Table\r
///\r
#define EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE 0x50434146\r
\r
///\r
/// "APIC" Multiple APIC Description Table\r
///\r
#define EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE  0x43495041\r
\r
///\r
/// "PSDT" Persistent System Description Table\r
///\r
#define EFI_ACPI_2_0_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  0x54445350\r
\r
///\r
/// "RSDT" Root System Description Table\r
///\r
#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  0x54445352\r
\r
///\r
/// "SBST" Smart Battery Specification Table\r
///\r
#define EFI_ACPI_2_0_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE  0x54534253\r
\r
///\r
/// "SLIT" System Locality Information Table\r
///\r
#define EFI_ACPI_2_0_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE  0x54494C53\r
\r
///\r
/// "SPCR" Serial Port Concole Redirection Table\r
///\r
#define EFI_ACPI_2_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE  0x52435053\r
\r
///\r
/// "SRAT" Static Resource Affinity Table\r
///\r
#define EFI_ACPI_2_0_STATIC_RESOURCE_AFFINITY_TABLE_SIGNATURE 0x54415253\r
\r
///\r
/// "SSDT" Secondary System Description Table\r
///\r
#define EFI_ACPI_2_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445353\r
\r
///\r
/// "SPMI" Server Platform Management Interface Table\r
///\r
#define EFI_ACPI_2_0_SERVER_PLATFORM_MANAGEMENT_INTERFACE_SIGNATURE 0x494D5053\r
\r
///\r
/// "XSDT" Extended System Description Table\r
///\r
#define EFI_ACPI_2_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE  0x54445358\r
\r
///\r
/// "MCFG" Static Resource Affinity Table\r
///\r
#define EFI_ACPI_2_0_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE_SIGNATURE 0x4746434D\r
\r
#pragma pack()\r
\r
#endif\r
Commit	Line	Data
42eedea9	1	/** @file \r
568eb0cb	2	ACPI 2.0 definitions from the ACPI Specification, revision 2.0\r
	3	\r
	4	Copyright (c) 2006 - 2007, Intel Corporation\r
	5	All rights reserved. This program and the accompanying materials \r
	6	are licensed and made available under the terms and conditions of the BSD License \r
	7	which accompanies this distribution. The full text of the license may be found at \r
	8	http://opensource.org/licenses/bsd-license.php \r
	9	\r
	10	THE PROGRAM IS DISTRIBUTED UNDER THE BSD LICENSE ON AN "AS IS" BASIS, \r
	11	WITHOUT WARRANTIES OR REPRESENTATIONS OF ANY KIND, EITHER EXPRESS OR IMPLIED. \r
	12	**/\r
	13	\r
	14	#ifndef _ACPI_2_0_H_\r
	15	#define _ACPI_2_0_H_\r
	16	\r
ecc40942	17	#include <IndustryStandard/Acpi1_0.h>\r
568eb0cb	18	\r
	19	//\r
	20	// Ensure proper structure formats\r
	21	//\r
	22	#pragma pack(1)\r
	23	//\r
	24	// ACPI Specification Revision\r
	25	//\r
	26	#define EFI_ACPI_2_0_REVISION 0x02\r
	27	\r
1bc5d021	28	///\r
	29	/// ACPI 2.0 Generic Address Space definition\r
	30	///\r
568eb0cb	31	typedef struct {\r
	32	UINT8 AddressSpaceId;\r
	33	UINT8 RegisterBitWidth;\r
	34	UINT8 RegisterBitOffset;\r
	35	UINT8 Reserved;\r
	36	UINT64 Address;\r
	37	} EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE;\r
	38	\r
	39	//\r
	40	// Generic Address Space Address IDs\r
	41	//\r
	42	#define EFI_ACPI_2_0_SYSTEM_MEMORY 0\r
	43	#define EFI_ACPI_2_0_SYSTEM_IO 1\r
	44	#define EFI_ACPI_2_0_PCI_CONFIGURATION_SPACE 2\r
	45	#define EFI_ACPI_2_0_EMBEDDED_CONTROLLER 3\r
	46	#define EFI_ACPI_2_0_SMBUS 4\r
	47	#define EFI_ACPI_2_0_FUNCTIONAL_FIXED_HARDWARE 0x7F\r
	48	\r
	49	//\r
	50	// ACPI 2.0 table structures\r
	51	//\r
1bc5d021	52	\r
	53	///\r
	54	/// Root System Description Pointer Structure\r
	55	///\r
568eb0cb	56	typedef struct {\r
	57	UINT64 Signature;\r
	58	UINT8 Checksum;\r
	59	UINT8 OemId[6];\r
	60	UINT8 Revision;\r
	61	UINT32 RsdtAddress;\r
	62	UINT32 Length;\r
	63	UINT64 XsdtAddress;\r
	64	UINT8 ExtendedChecksum;\r
	65	UINT8 Reserved[3];\r
	66	} EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER;\r
	67	\r
1bc5d021	68	///\r
	69	/// RSD_PTR Revision (as defined in ACPI 2.0 spec.)\r
	70	///\r
568eb0cb	71	#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER_REVISION 0x02\r
568eb0cb	72	\r
1bc5d021	73	///\r
	74	/// Common table header, this prefaces all ACPI tables, including FACS, but\r
	75	/// excluding the RSD PTR structure\r
	76	///\r
568eb0cb	77	typedef struct {\r
	78	UINT32 Signature;\r
	79	UINT32 Length;\r
	80	} EFI_ACPI_2_0_COMMON_HEADER;\r
	81	\r
	82	//\r
	83	// Root System Description Table\r
	84	// No definition needed as it is a common description table header followed by a\r
	85	// variable number of UINT32 table pointers.\r
	86	//\r
1bc5d021	87	\r
	88	///\r
	89	/// RSDT Revision (as defined in ACPI 2.0 spec.)\r
	90	///\r
568eb0cb	91	#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
	92	\r
	93	//\r
	94	// Extended System Description Table\r
	95	// No definition needed as it is a common description table header followed by a\r
	96	// variable number of UINT64 table pointers.\r
	97	//\r
1bc5d021	98	\r
	99	///\r
	100	/// XSDT Revision (as defined in ACPI 2.0 spec.)\r
	101	///\r
568eb0cb	102	#define EFI_ACPI_2_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_REVISION 0x01\r
568eb0cb	103	\r
1bc5d021	104	///\r
	105	/// Fixed ACPI Description Table Structure (FADT)\r
	106	///\r
568eb0cb	107	typedef struct {\r
	108	EFI_ACPI_DESCRIPTION_HEADER Header;\r
	109	UINT32 FirmwareCtrl;\r
	110	UINT32 Dsdt;\r
	111	UINT8 Reserved0;\r
	112	UINT8 PreferredPmProfile;\r
	113	UINT16 SciInt;\r
	114	UINT32 SmiCmd;\r
	115	UINT8 AcpiEnable;\r
	116	UINT8 AcpiDisable;\r
	117	UINT8 S4BiosReq;\r
	118	UINT8 PstateCnt;\r
	119	UINT32 Pm1aEvtBlk;\r
	120	UINT32 Pm1bEvtBlk;\r
	121	UINT32 Pm1aCntBlk;\r
	122	UINT32 Pm1bCntBlk;\r
	123	UINT32 Pm2CntBlk;\r
	124	UINT32 PmTmrBlk;\r
	125	UINT32 Gpe0Blk;\r
	126	UINT32 Gpe1Blk;\r
	127	UINT8 Pm1EvtLen;\r
	128	UINT8 Pm1CntLen;\r
	129	UINT8 Pm2CntLen;\r
	130	UINT8 PmTmrLen;\r
	131	UINT8 Gpe0BlkLen;\r
	132	UINT8 Gpe1BlkLen;\r
	133	UINT8 Gpe1Base;\r
	134	UINT8 CstCnt;\r
	135	UINT16 PLvl2Lat;\r
	136	UINT16 PLvl3Lat;\r
	137	UINT16 FlushSize;\r
	138	UINT16 FlushStride;\r
	139	UINT8 DutyOffset;\r
	140	UINT8 DutyWidth;\r
	141	UINT8 DayAlrm;\r
	142	UINT8 MonAlrm;\r
	143	UINT8 Century;\r
	144	UINT16 IaPcBootArch;\r
	145	UINT8 Reserved1;\r
	146	UINT32 Flags;\r
	147	EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE ResetReg;\r
	148	UINT8 ResetValue;\r
	149	UINT8 Reserved2[3];\r
	150	UINT64 XFirmwareCtrl;\r
	151	UINT64 XDsdt;\r
	152	EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1aEvtBlk;\r
	153	EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1bEvtBlk;\r
	154	EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1aCntBlk;\r
	155	EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm1bCntBlk;\r
	156	EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPm2CntBlk;\r
	157	EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XPmTmrBlk;\r
	158	EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XGpe0Blk;\r
	159	EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE XGpe1Blk;\r
	160	} EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE;\r
	161	\r
1bc5d021	162	///\r
	163	/// FADT Version (as defined in ACPI 2.0 spec.)\r
	164	///\r
568eb0cb	165	#define EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE_REVISION 0x03\r
568eb0cb	166	\r
1bc5d021	167	///\r
	168	/// Fixed ACPI Description Table Boot Architecture Flags\r
	169	/// All other bits are reserved and must be set to 0.\r
	170	///\r
568eb0cb	171	#define EFI_ACPI_2_0_LEGACY_DEVICES (1 << 0)\r
	172	#define EFI_ACPI_2_0_8042 (1 << 1)\r
	173	\r
	174	//\r
	175	// Fixed ACPI Description Table Fixed Feature Flags\r
	176	// All other bits are reserved and must be set to 0.\r
	177	//\r
	178	#define EFI_ACPI_2_0_WBINVD (1 << 0)\r
	179	#define EFI_ACPI_2_0_WBINVD_FLUSH (1 << 1)\r
	180	#define EFI_ACPI_2_0_PROC_C1 (1 << 2)\r
	181	#define EFI_ACPI_2_0_P_LVL2_UP (1 << 3)\r
	182	#define EFI_ACPI_2_0_PWR_BUTTON (1 << 4)\r
	183	#define EFI_ACPI_2_0_SLP_BUTTON (1 << 5)\r
	184	#define EFI_ACPI_2_0_FIX_RTC (1 << 6)\r
	185	#define EFI_ACPI_2_0_RTC_S4 (1 << 7)\r
	186	#define EFI_ACPI_2_0_TMR_VAL_EXT (1 << 8)\r
	187	#define EFI_ACPI_2_0_DCK_CAP (1 << 9)\r
	188	#define EFI_ACPI_2_0_RESET_REG_SUP (1 << 10)\r
	189	#define EFI_ACPI_2_0_SEALED_CASE (1 << 11)\r
	190	#define EFI_ACPI_2_0_HEADLESS (1 << 12)\r
	191	#define EFI_ACPI_2_0_CPU_SW_SLP (1 << 13)\r
	192	\r
1bc5d021	193	///\r
	194	/// Firmware ACPI Control Structure\r
	195	///\r
568eb0cb	196	typedef struct {\r
	197	UINT32 Signature;\r
	198	UINT32 Length;\r
	199	UINT32 HardwareSignature;\r
	200	UINT32 FirmwareWakingVector;\r
	201	UINT32 GlobalLock;\r
	202	UINT32 Flags;\r
	203	UINT64 XFirmwareWakingVector;\r
	204	UINT8 Version;\r
	205	UINT8 Reserved[31];\r
	206	} EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE;\r
	207	\r
1bc5d021	208	///\r
	209	/// FACS Version (as defined in ACPI 2.0 spec.)\r
	210	///\r
568eb0cb	211	#define EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_VERSION 0x01\r
568eb0cb	212	\r
1bc5d021	213	///\r
	214	/// Firmware Control Structure Feature Flags\r
	215	/// All other bits are reserved and must be set to 0.\r
	216	///\r
568eb0cb	217	#define EFI_ACPI_2_0_S4BIOS_F (1 << 0)\r
568eb0cb	218	\r
1bc5d021	219	///\r
	220	/// Multiple APIC Description Table header definition. The rest of the table\r
	221	/// must be defined in a platform specific manner.\r
	222	///\r
568eb0cb	223	typedef struct {\r
	224	EFI_ACPI_DESCRIPTION_HEADER Header;\r
	225	UINT32 LocalApicAddress;\r
	226	UINT32 Flags;\r
	227	} EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_HEADER;\r
	228	\r
1bc5d021	229	///\r
	230	/// MADT Revision (as defined in ACPI 2.0 spec.)\r
	231	///\r
568eb0cb	232	#define EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_REVISION 0x01\r
568eb0cb	233	\r
1bc5d021	234	///\r
	235	/// Multiple APIC Flags\r
	236	/// All other bits are reserved and must be set to 0.\r
	237	///\r
568eb0cb	238	#define EFI_ACPI_2_0_PCAT_COMPAT (1 << 0)\r
	239	\r
	240	//\r
	241	// Multiple APIC Description Table APIC structure types\r
	242	// All other values between 0x09 an 0xFF are reserved and\r
	243	// will be ignored by OSPM.\r
	244	//\r
	245	#define EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC 0x00\r
	246	#define EFI_ACPI_2_0_IO_APIC 0x01\r
	247	#define EFI_ACPI_2_0_INTERRUPT_SOURCE_OVERRIDE 0x02\r
	248	#define EFI_ACPI_2_0_NON_MASKABLE_INTERRUPT_SOURCE 0x03\r
	249	#define EFI_ACPI_2_0_LOCAL_APIC_NMI 0x04\r
	250	#define EFI_ACPI_2_0_LOCAL_APIC_ADDRESS_OVERRIDE 0x05\r
	251	#define EFI_ACPI_2_0_IO_SAPIC 0x06\r
	252	#define EFI_ACPI_2_0_PROCESSOR_LOCAL_SAPIC 0x07\r
	253	#define EFI_ACPI_2_0_PLATFORM_INTERRUPT_SOURCES 0x08\r
	254	\r
	255	//\r
	256	// APIC Structure Definitions\r
	257	//\r
1bc5d021	258	\r
	259	///\r
	260	/// Processor Local APIC Structure Definition\r
	261	///\r
568eb0cb	262	typedef struct {\r
	263	UINT8 Type;\r
	264	UINT8 Length;\r
	265	UINT8 AcpiProcessorId;\r
	266	UINT8 ApicId;\r
	267	UINT32 Flags;\r
	268	} EFI_ACPI_2_0_PROCESSOR_LOCAL_APIC_STRUCTURE;\r
	269	\r
1bc5d021	270	///\r
	271	/// Local APIC Flags. All other bits are reserved and must be 0.\r
	272	///\r
568eb0cb	273	#define EFI_ACPI_2_0_LOCAL_APIC_ENABLED (1 << 0)\r
568eb0cb	274	\r
1bc5d021	275	///\r
	276	/// IO APIC Structure\r
	277	///\r
568eb0cb	278	typedef struct {\r
	279	UINT8 Type;\r
	280	UINT8 Length;\r
	281	UINT8 IoApicId;\r
	282	UINT8 Reserved;\r
	283	UINT32 IoApicAddress;\r
	284	UINT32 GlobalSystemInterruptBase;\r
	285	} EFI_ACPI_2_0_IO_APIC_STRUCTURE;\r
	286	\r
1bc5d021	287	///\r
	288	/// Interrupt Source Override Structure\r
	289	///\r
568eb0cb	290	typedef struct {\r
	291	UINT8 Type;\r
	292	UINT8 Length;\r
	293	UINT8 Bus;\r
	294	UINT8 Source;\r
	295	UINT32 GlobalSystemInterrupt;\r
	296	UINT16 Flags;\r
	297	} EFI_ACPI_2_0_INTERRUPT_SOURCE_OVERRIDE_STRUCTURE;\r
	298	\r
1bc5d021	299	///\r
	300	/// Non-Maskable Interrupt Source Structure\r
	301	///\r
568eb0cb	302	typedef struct {\r
	303	UINT8 Type;\r
	304	UINT8 Length;\r
	305	UINT16 Flags;\r
	306	UINT32 GlobalSystemInterrupt;\r
	307	} EFI_ACPI_2_0_NON_MASKABLE_INTERRUPT_SOURCE_STRUCTURE;\r
	308	\r
1bc5d021	309	///\r
	310	/// Local APIC NMI Structure\r
	311	///\r
568eb0cb	312	typedef struct {\r
	313	UINT8 Type;\r
	314	UINT8 Length;\r
	315	UINT8 AcpiProcessorId;\r
	316	UINT16 Flags;\r
	317	UINT8 LocalApicLint;\r
	318	} EFI_ACPI_2_0_LOCAL_APIC_NMI_STRUCTURE;\r
	319	\r
1bc5d021	320	///\r
	321	/// Local APIC Address Override Structure\r
	322	///\r
568eb0cb	323	typedef struct {\r
	324	UINT8 Type;\r
	325	UINT8 Length;\r
	326	UINT16 Reserved;\r
	327	UINT64 LocalApicAddress;\r
	328	} EFI_ACPI_2_0_LOCAL_APIC_ADDRESS_OVERRIDE_STRUCTURE;\r
	329	\r
1bc5d021	330	///\r
	331	/// IO SAPIC Structure\r
	332	///\r
568eb0cb	333	typedef struct {\r
	334	UINT8 Type;\r
	335	UINT8 Length;\r
	336	UINT8 IoApicId;\r
	337	UINT8 Reserved;\r
	338	UINT32 GlobalSystemInterruptBase;\r
	339	UINT64 IoSapicAddress;\r
	340	} EFI_ACPI_2_0_IO_SAPIC_STRUCTURE;\r
	341	\r
1bc5d021	342	///\r
	343	/// Local SAPIC Structure\r
	344	///\r
568eb0cb	345	typedef struct {\r
	346	UINT8 Type;\r
	347	UINT8 Length;\r
	348	UINT8 AcpiProcessorId;\r
	349	UINT8 LocalSapicId;\r
	350	UINT8 LocalSapicEid;\r
	351	UINT8 Reserved[3];\r
	352	UINT32 Flags;\r
	353	} EFI_ACPI_2_0_PROCESSOR_LOCAL_SAPIC_STRUCTURE;\r
	354	\r
1bc5d021	355	///\r
	356	/// Platform Interrupt Sources Structure\r
	357	///\r
568eb0cb	358	typedef struct {\r
	359	UINT8 Type;\r
	360	UINT8 Length;\r
	361	UINT16 Flags;\r
	362	UINT8 InterruptType;\r
	363	UINT8 ProcessorId;\r
	364	UINT8 ProcessorEid;\r
	365	UINT8 IoSapicVector;\r
	366	UINT32 GlobalSystemInterrupt;\r
	367	UINT32 Reserved;\r
	368	} EFI_ACPI_2_0_PLATFORM_INTERRUPT_SOURCES_STRUCTURE;\r
	369	\r
1bc5d021	370	///\r
	371	/// Smart Battery Description Table (SBST)\r
	372	///\r
568eb0cb	373	typedef struct {\r
	374	EFI_ACPI_DESCRIPTION_HEADER Header;\r
	375	UINT32 WarningEnergyLevel;\r
	376	UINT32 LowEnergyLevel;\r
	377	UINT32 CriticalEnergyLevel;\r
	378	} EFI_ACPI_2_0_SMART_BATTERY_DESCRIPTION_TABLE;\r
	379	\r
1bc5d021	380	///\r
	381	/// SBST Version (as defined in ACPI 2.0 spec.)\r
	382	///\r
568eb0cb	383	#define EFI_ACPI_2_0_SMART_BATTERY_DESCRIPTION_TABLE_REVISION 0x01\r
568eb0cb	384	\r
1bc5d021	385	///\r
	386	/// Embedded Controller Boot Resources Table (ECDT)\r
	387	/// The table is followed by a null terminated ASCII string that contains\r
	388	/// a fully qualified reference to the name space object.\r
	389	///\r
568eb0cb	390	typedef struct {\r
	391	EFI_ACPI_DESCRIPTION_HEADER Header;\r
	392	EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE EcControl;\r
	393	EFI_ACPI_2_0_GENERIC_ADDRESS_STRUCTURE EcData;\r
	394	UINT32 Uid;\r
	395	UINT8 GpeBit;\r
	396	} EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE;\r
	397	\r
1bc5d021	398	///\r
	399	/// ECDT Version (as defined in ACPI 2.0 spec.)\r
	400	///\r
568eb0cb	401	#define EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_REVISION 0x01\r
	402	\r
	403	//\r
	404	// Known table signatures\r
	405	//\r
1bc5d021	406	\r
	407	///\r
	408	/// "RSD PTR " Root System Description Pointer\r
	409	///\r
568eb0cb	410	#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_POINTER_SIGNATURE 0x2052545020445352\r
568eb0cb	411	\r
1bc5d021	412	///\r
	413	/// "SPIC" Multiple SAPIC Description Table\r
	414	///\r
	415	/// BUGBUG: Don't know where this came from except SR870BN4 uses it.\r
	416	/// #define EFI_ACPI_2_0_MULTIPLE_SAPIC_DESCRIPTION_TABLE_SIGNATURE 0x43495053\r
	417	///\r
568eb0cb	418	#define EFI_ACPI_2_0_MULTIPLE_SAPIC_DESCRIPTION_TABLE_SIGNATURE 0x43495041\r
568eb0cb	419	\r
1bc5d021	420	///\r
	421	/// "BOOT" MS Simple Boot Spec\r
	422	///\r
568eb0cb	423	#define EFI_ACPI_2_0_SIMPLE_BOOT_FLAG_TABLE_SIGNATURE 0x544F4F42\r
568eb0cb	424	\r
1bc5d021	425	///\r
	426	/// "DBGP" MS Bebug Port Spec\r
	427	///\r
568eb0cb	428	#define EFI_ACPI_2_0_DEBUG_PORT_TABLE_SIGNATURE 0x50474244\r
568eb0cb	429	\r
1bc5d021	430	///\r
	431	/// "DSDT" Differentiated System Description Table\r
	432	///\r
568eb0cb	433	#define EFI_ACPI_2_0_DIFFERENTIATED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445344\r
568eb0cb	434	\r
1bc5d021	435	///\r
	436	/// "ECDT" Embedded Controller Boot Resources Table\r
	437	///\r
568eb0cb	438	#define EFI_ACPI_2_0_EMBEDDED_CONTROLLER_BOOT_RESOURCES_TABLE_SIGNATURE 0x54444345\r
568eb0cb	439	\r
1bc5d021	440	///\r
	441	/// "ETDT" Event Timer Description Table\r
	442	///\r
568eb0cb	443	#define EFI_ACPI_2_0_EVENT_TIMER_DESCRIPTION_TABLE_SIGNATURE 0x54445445\r
568eb0cb	444	\r
1bc5d021	445	///\r
	446	/// "FACS" Firmware ACPI Control Structure\r
	447	///\r
568eb0cb	448	#define EFI_ACPI_2_0_FIRMWARE_ACPI_CONTROL_STRUCTURE_SIGNATURE 0x53434146\r
568eb0cb	449	\r
1bc5d021	450	///\r
	451	/// "FACP" Fixed ACPI Description Table\r
	452	///\r
568eb0cb	453	#define EFI_ACPI_2_0_FIXED_ACPI_DESCRIPTION_TABLE_SIGNATURE 0x50434146\r
568eb0cb	454	\r
1bc5d021	455	///\r
	456	/// "APIC" Multiple APIC Description Table\r
	457	///\r
568eb0cb	458	#define EFI_ACPI_2_0_MULTIPLE_APIC_DESCRIPTION_TABLE_SIGNATURE 0x43495041\r
568eb0cb	459	\r
1bc5d021	460	///\r
	461	/// "PSDT" Persistent System Description Table\r
	462	///\r
568eb0cb	463	#define EFI_ACPI_2_0_PERSISTENT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445350\r
568eb0cb	464	\r
1bc5d021	465	///\r
	466	/// "RSDT" Root System Description Table\r
	467	///\r
568eb0cb	468	#define EFI_ACPI_2_0_ROOT_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445352\r
568eb0cb	469	\r
1bc5d021	470	///\r
	471	/// "SBST" Smart Battery Specification Table\r
	472	///\r
568eb0cb	473	#define EFI_ACPI_2_0_SMART_BATTERY_SPECIFICATION_TABLE_SIGNATURE 0x54534253\r
568eb0cb	474	\r
1bc5d021	475	///\r
	476	/// "SLIT" System Locality Information Table\r
	477	///\r
568eb0cb	478	#define EFI_ACPI_2_0_SYSTEM_LOCALITY_INFORMATION_TABLE_SIGNATURE 0x54494C53\r
568eb0cb	479	\r
1bc5d021	480	///\r
	481	/// "SPCR" Serial Port Concole Redirection Table\r
	482	///\r
568eb0cb	483	#define EFI_ACPI_2_0_SERIAL_PORT_CONSOLE_REDIRECTION_TABLE_SIGNATURE 0x52435053\r
568eb0cb	484	\r
1bc5d021	485	///\r
	486	/// "SRAT" Static Resource Affinity Table\r
	487	///\r
568eb0cb	488	#define EFI_ACPI_2_0_STATIC_RESOURCE_AFFINITY_TABLE_SIGNATURE 0x54415253\r
568eb0cb	489	\r
1bc5d021	490	///\r
	491	/// "SSDT" Secondary System Description Table\r
	492	///\r
568eb0cb	493	#define EFI_ACPI_2_0_SECONDARY_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445353\r
568eb0cb	494	\r
1bc5d021	495	///\r
	496	/// "SPMI" Server Platform Management Interface Table\r
	497	///\r
568eb0cb	498	#define EFI_ACPI_2_0_SERVER_PLATFORM_MANAGEMENT_INTERFACE_SIGNATURE 0x494D5053\r
568eb0cb	499	\r
1bc5d021	500	///\r
	501	/// "XSDT" Extended System Description Table\r
	502	///\r
568eb0cb	503	#define EFI_ACPI_2_0_EXTENDED_SYSTEM_DESCRIPTION_TABLE_SIGNATURE 0x54445358\r
568eb0cb	504	\r
1bc5d021	505	///\r
	506	/// "MCFG" Static Resource Affinity Table\r
	507	///\r
3431f363	508	#define EFI_ACPI_2_0_MEMORY_MAPPED_CONFIGURATION_BASE_ADDRESS_TABLE_SIGNATURE 0x4746434D\r
3431f363	509	\r
568eb0cb	510	#pragma pack()\r
	511	\r
	512	#endif\r